2 /******************************************************************************
4 * (c) Copyright 2010-2014 Xilinx, Inc. All rights reserved.
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7 * software and associated documentation files (the "Software"), to deal in the Software
8 * without restriction, including without limitation the rights to use, copy, modify, merge,
9 * publish, distribute, sublicense, and/or sell copies of the Software, and to permit
10 * persons to whom the Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be included in all copies or
13 * substantial portions of the Software.
15 * Use of the Software is limited solely to applications: (a) running on a Xilinx device, or
16 * (b) that interact with a Xilinx device through a bus or interconnect.
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22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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28 *******************************************************************************/
29 /****************************************************************************/
34 * This file can be included in FSBL code
35 * to get prototype of ps7_init() function
38 *****************************************************************************/
45 //typedef unsigned int u32;
48 /** do we need to make this name more unique ? **/
49 //extern u32 ps7_init_data[];
50 extern unsigned long * ps7_ddr_init_data;
51 extern unsigned long * ps7_mio_init_data;
52 extern unsigned long * ps7_pll_init_data;
53 extern unsigned long * ps7_clock_init_data;
54 extern unsigned long * ps7_peripherals_init_data;
58 #define OPCODE_EXIT 0U
59 #define OPCODE_CLEAR 1U
60 #define OPCODE_WRITE 2U
61 #define OPCODE_MASKWRITE 3U
62 #define OPCODE_MASKPOLL 4U
63 #define OPCODE_MASKDELAY 5U
64 #define NEW_PS7_ERR_CODE 1
66 /* Encode number of arguments in last nibble */
67 #define EMIT_EXIT() ( (OPCODE_EXIT << 4 ) | 0 )
68 #define EMIT_CLEAR(addr) ( (OPCODE_CLEAR << 4 ) | 1 ) , addr
69 #define EMIT_WRITE(addr,val) ( (OPCODE_WRITE << 4 ) | 2 ) , addr, val
70 #define EMIT_MASKWRITE(addr,mask,val) ( (OPCODE_MASKWRITE << 4 ) | 3 ) , addr, mask, val
71 #define EMIT_MASKPOLL(addr,mask) ( (OPCODE_MASKPOLL << 4 ) | 2 ) , addr, mask
72 #define EMIT_MASKDELAY(addr,mask) ( (OPCODE_MASKDELAY << 4 ) | 2 ) , addr, mask
74 /* Returns codes of PS7_Init */
75 #define PS7_INIT_SUCCESS (0) // 0 is success in good old C
76 #define PS7_INIT_CORRUPT (1) // 1 the data is corrupted, and slcr reg are in corrupted state now
77 #define PS7_INIT_TIMEOUT (2) // 2 when a poll operation timed out
78 #define PS7_POLL_FAILED_DDR_INIT (3) // 3 when a poll operation timed out for ddr init
79 #define PS7_POLL_FAILED_DMA (4) // 4 when a poll operation timed out for dma done bit
80 #define PS7_POLL_FAILED_PLL (5) // 5 when a poll operation timed out for pll sequence init
83 /* Silicon Versions */
84 #define PCW_SILICON_VERSION_1 0
85 #define PCW_SILICON_VERSION_2 1
86 #define PCW_SILICON_VERSION_3 2
88 /* This flag to be used by FSBL to check whether ps7_post_config() proc exixts */
89 #define PS7_POST_CONFIG
91 /* Freq of all peripherals */
93 #define APU_FREQ 666666687
94 #define DDR_FREQ 533333374
95 #define DCI_FREQ 10158730
96 #define QSPI_FREQ 200000000
97 #define SMC_FREQ 10000000
98 #define ENET0_FREQ 25000000
99 #define ENET1_FREQ 10000000
100 #define USB0_FREQ 60000000
101 #define USB1_FREQ 60000000
102 #define SDIO_FREQ 50000000
103 #define UART_FREQ 50000000
104 #define SPI_FREQ 10000000
105 #define I2C_FREQ 111111115
106 #define WDT_FREQ 111111115
107 #define TTC_FREQ 50000000
108 #define CAN_FREQ 23809523
109 #define PCAP_FREQ 200000000
110 #define TPIU_FREQ 200000000
111 #define FPGA0_FREQ 50000000
112 #define FPGA1_FREQ 10000000
113 #define FPGA2_FREQ 10000000
114 #define FPGA3_FREQ 10000000
117 /* For delay calculation using global registers*/
118 #define SCU_GLOBAL_TIMER_COUNT_L32 0xF8F00200
119 #define SCU_GLOBAL_TIMER_COUNT_U32 0xF8F00204
120 #define SCU_GLOBAL_TIMER_CONTROL 0xF8F00208
121 #define SCU_GLOBAL_TIMER_AUTO_INC 0xF8F00218
123 int ps7_config( unsigned long*);
125 int ps7_post_config();
127 char* getPS7MessageInfo(unsigned key);
129 void perf_start_clock(void);
130 void perf_disable_clock(void);
131 void perf_reset_clock(void);
132 void perf_reset_and_start_timer();
133 int get_number_of_cycles_for_delay(unsigned int delay);