4 * \brief Startup file for SAM3X.
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6 * Copyright (c) 2011-2012 Atmel Corporation. All rights reserved.
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12 * Redistribution and use in source and binary forms, with or without
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13 * modification, are permitted provided that the following conditions are met:
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15 * 1. Redistributions of source code must retain the above copyright notice,
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16 * this list of conditions and the following disclaimer.
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18 * 2. Redistributions in binary form must reproduce the above copyright notice,
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19 * this list of conditions and the following disclaimer in the documentation
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20 * and/or other materials provided with the distribution.
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22 * 3. The name of Atmel may not be used to endorse or promote products derived
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23 * from this software without specific prior written permission.
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25 * 4. This software may only be redistributed and used in connection with an
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26 * Atmel microcontroller product.
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28 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
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29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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30 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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31 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
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32 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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38 * POSSIBILITY OF SUCH DAMAGE.
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44 #include "exceptions.h"
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46 #include "system_sam3x.h"
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48 /* Initialize segments */
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49 extern uint32_t _sfixed;
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50 extern uint32_t _efixed;
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51 extern uint32_t _etext;
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52 extern uint32_t _srelocate;
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53 extern uint32_t _erelocate;
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54 extern uint32_t _szero;
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55 extern uint32_t _ezero;
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56 extern uint32_t _sstack;
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57 extern uint32_t _estack;
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59 /** \cond DOXYGEN_SHOULD_SKIP_THIS */
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63 void __libc_init_array(void);
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65 /* Exception Table */
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66 __attribute__ ((section(".vectors")))
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67 IntFunc exception_table[] = {
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69 /* Configure Initial Stack Pointer, using linker-generated symbols */
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70 (IntFunc) (&_estack),
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71 (void*) Reset_Handler,
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73 (void*) NMI_Handler,
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74 (void*) HardFault_Handler,
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75 (void*) MemManage_Handler,
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76 (void*) BusFault_Handler,
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77 (void*) UsageFault_Handler,
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78 (void*) (0UL), /* Reserved */
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79 (void*) (0UL), /* Reserved */
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80 (void*) (0UL), /* Reserved */
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81 (void*) (0UL), /* Reserved */
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82 (void*) SVC_Handler,
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83 (void*) DebugMon_Handler,
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84 (void*) (0UL), /* Reserved */
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85 (void*) PendSV_Handler,
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86 (void*) SysTick_Handler,
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88 /* Configurable interrupts */
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89 (void*) SUPC_Handler, /* 0 Supply Controller */
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90 (void*) RSTC_Handler, /* 1 Reset Controller */
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91 (void*) RTC_Handler, /* 2 Real Time Clock */
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92 (void*) RTT_Handler, /* 3 Real Time Timer */
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93 (void*) WDT_Handler, /* 4 Watchdog Timer */
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94 (void*) PMC_Handler, /* 5 PMC */
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95 (void*) EFC0_Handler, /* 6 EFC 0 */
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96 (void*) EFC1_Handler, /* 7 EFC 1 */
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97 (void*) UART_Handler, /* 8 UART */
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98 #ifdef _SAM3XA_SMC_INSTANCE_
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99 (void*) SMC_Handler, /* 9 SMC */
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101 (void*) (0UL), /* 9 Reserved */
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102 #endif /* _SAM3XA_SMC_INSTANCE_ */
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103 #ifdef _SAM3XA_SDRAMC_INSTANCE_
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104 (void*) SDRAMC_Handler, /* 10 SDRAMC */
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106 (void*) (0UL), /* 10 Reserved */
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107 #endif /* _SAM3XA_SDRAMC_INSTANCE_ */
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108 (void*) PIOA_Handler, /* 11 Parallel IO Controller A */
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109 (void*) PIOB_Handler, /* 12 Parallel IO Controller B */
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110 #ifdef _SAM3XA_PIOC_INSTANCE_
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111 (void*) PIOC_Handler, /* 13 Parallel IO Controller C */
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113 (void*) (0UL), /* 13 Reserved */
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114 #endif /* _SAM3XA_PIOC_INSTANCE_ */
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115 #ifdef _SAM3XA_PIOD_INSTANCE_
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116 (void*) PIOD_Handler, /* 14 Parallel IO Controller D */
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118 (void*) (0UL), /* 14 Reserved */
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119 #endif /* _SAM3XA_PIOD_INSTANCE_ */
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120 #ifdef _SAM3XA_PIOE_INSTANCE_
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121 (void*) PIOE_Handler, /* 15 Parallel IO Controller E */
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123 (void*) (0UL), /* 15 Reserved */
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124 #endif /* _SAM3XA_PIOE_INSTANCE_ */
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125 #ifdef _SAM3XA_PIOF_INSTANCE_
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126 (void*) PIOF_Handler, /* 16 Parallel IO Controller F */
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128 (void*) (0UL), /* 16 Reserved */
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129 #endif /* _SAM3XA_PIOF_INSTANCE_ */
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130 (void*) USART0_Handler, /* 17 USART 0 */
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131 (void*) USART1_Handler, /* 18 USART 1 */
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132 (void*) USART2_Handler, /* 19 USART 2 */
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133 #ifdef _SAM3XA_USART3_INSTANCE_
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134 (void*) USART3_Handler, /* 20 USART 3 */
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136 (void*) (0UL), /* 20 Reserved */
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137 #endif /* _SAM3XA_USART3_INSTANCE_ */
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138 (void*) HSMCI_Handler, /* 21 MCI */
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139 (void*) TWI0_Handler, /* 22 TWI 0 */
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140 (void*) TWI1_Handler, /* 23 TWI 1 */
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141 (void*) SPI0_Handler, /* 24 SPI 0 */
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142 #ifdef _SAM3XA_SPI1_INSTANCE_
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143 (void*) SPI1_Handler, /* 25 SPI 1 */
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145 (void*) (0UL), /* 25 Reserved */
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146 #endif /* _SAM3XA_SPI1_INSTANCE_ */
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147 (void*) SSC_Handler, /* 26 SSC */
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148 (void*) TC0_Handler, /* 27 Timer Counter 0 */
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149 (void*) TC1_Handler, /* 28 Timer Counter 1 */
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150 (void*) TC2_Handler, /* 29 Timer Counter 2 */
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151 (void*) TC3_Handler, /* 30 Timer Counter 3 */
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152 (void*) TC4_Handler, /* 31 Timer Counter 4 */
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153 (void*) TC5_Handler, /* 32 Timer Counter 5 */
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154 #ifdef _SAM3XA_TC2_INSTANCE_
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155 (void*) TC6_Handler, /* 33 Timer Counter 6 */
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156 (void*) TC7_Handler, /* 34 Timer Counter 7 */
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157 (void*) TC8_Handler, /* 35 Timer Counter 8 */
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159 (void*) (0UL), /* 33 Reserved */
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160 (void*) (0UL), /* 34 Reserved */
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161 (void*) (0UL), /* 35 Reserved */
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162 #endif /* _SAM3XA_TC2_INSTANCE_ */
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163 (void*) PWM_Handler, /* 36 PWM */
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164 (void*) ADC_Handler, /* 37 ADC controller */
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165 (void*) DACC_Handler, /* 38 DAC controller */
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166 (void*) DMAC_Handler, /* 39 DMA Controller */
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167 (void*) UOTGHS_Handler, /* 40 USB OTG High Speed */
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168 (void*) TRNG_Handler, /* 41 True Random Number Generator */
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169 #ifdef _SAM3XA_EMAC_INSTANCE_
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170 (void*) EMAC_Handler, /* 42 Ethernet MAC */
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172 (void*) (0UL), /* 42 Reserved */
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173 #endif /* _SAM3XA_EMAC_INSTANCE_ */
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174 (void*) CAN0_Handler, /* 43 CAN Controller 0 */
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175 (void*) CAN1_Handler /* 44 CAN Controller 1 */
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178 /* TEMPORARY PATCH FOR SCB */
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179 #define SCB_VTOR_TBLBASE_Pos 29 /*!< SCB VTOR: TBLBASE Position */
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180 #define SCB_VTOR_TBLBASE_Msk (1UL << SCB_VTOR_TBLBASE_Pos) /*!< SCB VTOR: TBLBASE Mask */
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183 * \brief This is the code that gets called on processor reset.
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184 * To initialize the device, and call the main() routine.
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186 void Reset_Handler(void)
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188 uint32_t *pSrc, *pDest;
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190 /* Initialize the relocate segment */
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192 pDest = &_srelocate;
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194 if (pSrc != pDest) {
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195 for (; pDest < &_erelocate;) {
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196 *pDest++ = *pSrc++;
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200 /* Clear the zero segment */
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201 for (pDest = &_szero; pDest < &_ezero;) {
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205 /* Set the vector table base address */
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206 pSrc = (uint32_t *) & _sfixed;
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207 SCB->VTOR = ((uint32_t) pSrc & SCB_VTOR_TBLOFF_Msk);
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209 if (((uint32_t) pSrc >= IRAM0_ADDR) && ((uint32_t) pSrc < NFC_RAM_ADDR)) {
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210 SCB->VTOR |= 1 << SCB_VTOR_TBLBASE_Pos;
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213 /* Initialize the C library */
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214 __libc_init_array();
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216 /* Branch to main function */
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219 /* Infinite loop */
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