1 /***************************************************************************//**
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3 * @brief Real Time Counter (RTC) Peripheral API
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5 *******************************************************************************
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7 * <b>(C) Copyright 2015 Silicon Labs, http://www.silabs.com</b>
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8 *******************************************************************************
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10 * Permission is granted to anyone to use this software for any purpose,
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11 * including commercial applications, and to alter it and redistribute it
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12 * freely, subject to the following restrictions:
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14 * 1. The origin of this software must not be misrepresented; you must not
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15 * claim that you wrote the original software.
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16 * 2. Altered source versions must be plainly marked as such, and must not be
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17 * misrepresented as being the original software.
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18 * 3. This notice may not be removed or altered from any source distribution.
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20 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no
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21 * obligation to support this Software. Silicon Labs is providing the
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22 * Software "AS IS", with no express or implied warranties of any kind,
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23 * including, but not limited to, any implied warranties of merchantability
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24 * or fitness for any particular purpose or warranties against infringement
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25 * of any proprietary rights of a third party.
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27 * Silicon Labs will not be liable for any consequential, incidental, or
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28 * special damages, or any other relief, or for any claim by any third party,
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29 * arising from your use of this Software.
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31 ******************************************************************************/
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34 #if defined(RTC_COUNT) && (RTC_COUNT > 0)
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36 #include "em_assert.h"
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39 /***************************************************************************//**
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40 * @addtogroup EM_Library
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42 ******************************************************************************/
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44 /***************************************************************************//**
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46 * @brief Real Time Counter (RTC) Peripheral API
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48 ******************************************************************************/
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50 /*******************************************************************************
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51 ******************************* DEFINES ***********************************
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52 ******************************************************************************/
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54 /** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */
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56 /** Validation of valid comparator register for assert statements. */
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57 #define RTC_COMP_REG_VALID(reg) (((reg) <= 1))
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62 /*******************************************************************************
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63 ************************** LOCAL FUNCTIONS ********************************
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64 ******************************************************************************/
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66 /** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */
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68 #if defined(_EFM32_GECKO_FAMILY)
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69 /***************************************************************************//**
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71 * Wait for ongoing sync of register(s) to low frequency domain to complete.
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74 * This only applies to the Gecko Family, see the reference manual
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75 * chapter about Access to Low Energy Peripherals (Asynchronos Registers)
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76 * for details. For Tiny Gecko and Giant Gecko, the RTC supports immediate
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77 * updates of registers, and will automatically hold the bus until the
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78 * register has been updated.
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81 * Bitmask corresponding to SYNCBUSY register defined bits, indicating
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82 * registers that must complete any ongoing synchronization.
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83 ******************************************************************************/
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84 __STATIC_INLINE void regSync(uint32_t mask)
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86 /* Avoid deadlock if modifying the same register twice when freeze mode is */
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88 if (RTC->FREEZE & RTC_FREEZE_REGFREEZE)
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91 /* Wait for any pending previous write operation to have been completed */
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92 /* in low frequency domain. This is only required for the Gecko Family */
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93 while (RTC->SYNCBUSY & mask)
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100 /*******************************************************************************
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101 ************************** GLOBAL FUNCTIONS *******************************
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102 ******************************************************************************/
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104 /***************************************************************************//**
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106 * Get RTC compare register value.
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109 * Compare register to get, either 0 or 1
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112 * Compare register value, 0 if invalid register selected.
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113 ******************************************************************************/
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114 uint32_t RTC_CompareGet(unsigned int comp)
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118 EFM_ASSERT(RTC_COMP_REG_VALID(comp));
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120 /* Initialize selected compare value */
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132 /* Unknown compare register selected */
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141 /***************************************************************************//**
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143 * Set RTC compare register value.
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146 * The setting of a compare register requires synchronization into the
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147 * low frequency domain. If the same register is modified before a previous
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148 * update has completed, this function will stall until the previous
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149 * synchronization has completed. This only applies to the Gecko Family, see
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150 * comment in the regSync() internal function call.
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153 * Compare register to set, either 0 or 1
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156 * Initialization value (<= 0x00ffffff)
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157 ******************************************************************************/
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158 void RTC_CompareSet(unsigned int comp, uint32_t value)
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160 volatile uint32_t *compReg;
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161 #if defined(_EFM32_GECKO_FAMILY)
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165 EFM_ASSERT(RTC_COMP_REG_VALID(comp)
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166 && ((value & ~(_RTC_COMP0_COMP0_MASK
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167 >> _RTC_COMP0_COMP0_SHIFT)) == 0));
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169 /* Initialize selected compare value */
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173 compReg = &(RTC->COMP0);
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174 #if defined(_EFM32_GECKO_FAMILY)
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175 syncbusy = RTC_SYNCBUSY_COMP0;
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180 compReg = &(RTC->COMP1);
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181 #if defined(_EFM32_GECKO_FAMILY)
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182 syncbusy = RTC_SYNCBUSY_COMP1;
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187 /* Unknown compare register selected, abort */
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190 #if defined(_EFM32_GECKO_FAMILY)
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191 /* LF register about to be modified require sync. busy check */
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199 /***************************************************************************//**
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201 * Enable/disable RTC.
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204 * The enabling/disabling of the RTC modifies the RTC CTRL register which
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205 * requires synchronization into the low frequency domain. If this register is
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206 * modified before a previous update to the same register has completed, this
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207 * function will stall until the previous synchronization has completed. This
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208 * only applies to the Gecko Family, see comment in the regSync() internal
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211 * @param[in] enable
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212 * true to enable counting, false to disable.
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213 ******************************************************************************/
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214 void RTC_Enable(bool enable)
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216 #if defined(_EFM32_GECKO_FAMILY)
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217 /* LF register about to be modified require sync. busy check */
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218 regSync(RTC_SYNCBUSY_CTRL);
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221 BUS_RegBitWrite(&(RTC->CTRL), _RTC_CTRL_EN_SHIFT, enable);
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223 #if defined(_EFM32_GECKO_FAMILY)
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224 /* Wait for CTRL to be updated before returning, because calling code may
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225 depend upon that the CTRL register is updated after this function has
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227 regSync(RTC_SYNCBUSY_CTRL);
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232 /***************************************************************************//**
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234 * RTC register synchronization freeze control.
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237 * Some RTC registers require synchronization into the low frequency (LF)
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238 * domain. The freeze feature allows for several such registers to be
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239 * modified before passing them to the LF domain simultaneously (which
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240 * takes place when the freeze mode is disabled).
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243 * When enabling freeze mode, this function will wait for all current
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244 * ongoing RTC synchronization to LF domain to complete (Normally
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245 * synchronization will not be in progress.) However for this reason, when
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246 * using freeze mode, modifications of registers requiring LF synchronization
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247 * should be done within one freeze enable/disable block to avoid unecessary
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248 * stalling. This only applies to the Gecko Family, see the reference manual
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249 * chapter about Access to Low Energy Peripherals (Asynchronos Registers)
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252 * @param[in] enable
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253 * @li true - enable freeze, modified registers are not propagated to the
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255 * @li false - disables freeze, modified registers are propagated to LF
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257 ******************************************************************************/
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258 void RTC_FreezeEnable(bool enable)
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262 #if defined(_EFM32_GECKO_FAMILY)
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263 /* Wait for any ongoing LF synchronization to complete. This is just to */
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264 /* protect against the rare case when a user */
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265 /* - modifies a register requiring LF sync */
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266 /* - then enables freeze before LF sync completed */
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267 /* - then modifies the same register again */
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268 /* since modifying a register while it is in sync progress should be */
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270 while (RTC->SYNCBUSY)
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273 RTC->FREEZE = RTC_FREEZE_REGFREEZE;
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282 /***************************************************************************//**
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287 * Note that the compare values must be set separately with RTC_CompareSet().
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288 * That should probably be done prior to the use of this function if
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289 * configuring the RTC to start when initialization is completed.
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292 * The initialization of the RTC modifies the RTC CTRL register which requires
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293 * synchronization into the low frequency domain. If this register is
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294 * modified before a previous update to the same register has completed, this
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295 * function will stall until the previous synchronization has completed. This
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296 * only applies to the Gecko Family, see comment in the regSync() internal
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300 * Pointer to RTC initialization structure.
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301 ******************************************************************************/
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302 void RTC_Init(const RTC_Init_TypeDef *init)
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315 /* Configure DEBUGRUN flag, sets whether or not counter should be
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316 * updated when debugger is active */
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317 if (init->debugRun)
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319 tmp |= RTC_CTRL_DEBUGRUN;
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322 /* Configure COMP0TOP, this will use the COMP0 compare value as an
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323 * overflow value, instead of default 24-bit 0x00ffffff */
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324 if (init->comp0Top)
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326 tmp |= RTC_CTRL_COMP0TOP;
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329 #if defined(_EFM32_GECKO_FAMILY)
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330 /* LF register about to be modified require sync. busy check */
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331 regSync(RTC_SYNCBUSY_CTRL);
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339 /***************************************************************************//**
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341 * Restore RTC to reset state
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342 ******************************************************************************/
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343 void RTC_Reset(void)
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345 /* Restore all essential RTC register to default config */
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346 RTC->FREEZE = _RTC_FREEZE_RESETVALUE;
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347 RTC->CTRL = _RTC_CTRL_RESETVALUE;
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348 RTC->COMP0 = _RTC_COMP0_RESETVALUE;
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349 RTC->COMP1 = _RTC_COMP1_RESETVALUE;
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350 RTC->IEN = _RTC_IEN_RESETVALUE;
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351 RTC->IFC = _RTC_IFC_RESETVALUE;
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353 #if defined(_EFM32_GECKO_FAMILY)
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354 /* Wait for CTRL, COMP0 and COMP1 to be updated before returning, because the
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355 calling code may depend upon that the register values are updated after
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356 this function has returned. */
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357 regSync(RTC_SYNCBUSY_CTRL | RTC_SYNCBUSY_COMP0 | RTC_SYNCBUSY_COMP1);
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363 /***************************************************************************//**
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365 * Restart RTC counter from zero
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366 ******************************************************************************/
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367 void RTC_CounterReset(void)
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369 /* A disable/enable sequnce will start the counter at zero */
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375 /** @} (end addtogroup RTC) */
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376 /** @} (end addtogroup EM_Library) */
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377 #endif /* defined(RTC_COUNT) && (RTC_COUNT > 0) */
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