2 * FreeRTOS Kernel V10.0.0
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3 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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5 * Permission is hereby granted, free of charge, to any person obtaining a copy of
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6 * this software and associated documentation files (the "Software"), to deal in
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7 * the Software without restriction, including without limitation the rights to
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8 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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9 * the Software, and to permit persons to whom the Software is furnished to do so,
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10 * subject to the following conditions:
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12 * The above copyright notice and this permission notice shall be included in all
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13 * copies or substantial portions of the Software. If you wish to use our Amazon
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14 * FreeRTOS name, please do so in a fair use way that does not cause confusion.
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16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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18 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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19 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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20 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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23 * http://www.FreeRTOS.org
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24 * http://aws.amazon.com/freertos
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26 * 1 tab == 4 spaces!
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30 * "Reg test" tasks - These fill the registers with known values, then check
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31 * that each register maintains its expected value for the lifetime of the
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32 * task. Each task uses a different set of values. The reg test tasks execute
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33 * with a very low priority, so get preempted very frequently. A register
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34 * containing an unexpected value is indicative of an error in the context
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35 * switching mechanism.
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38 void vRegTest1Implementation( void ) __attribute__ ((naked));
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39 void vRegTest2Implementation( void ) __attribute__ ((naked));
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41 void vRegTest1Implementation( void )
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45 ".extern ulRegTest1LoopCounter \n"
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47 /* Fill the core registers with known values. */
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62 /* Fill the VFP registers with known values. */
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63 "vmov d0, r0, r1 \n"
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64 "vmov d1, r2, r3 \n"
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65 "vmov d2, r4, r5 \n"
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66 "vmov d3, r6, r7 \n"
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67 "vmov d4, r8, r9 \n"
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68 "vmov d5, r10, r11 \n"
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69 "vmov d6, r0, r1 \n"
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70 "vmov d7, r2, r3 \n"
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71 "vmov d8, r4, r5 \n"
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72 "vmov d9, r6, r7 \n"
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73 "vmov d10, r8, r9 \n"
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74 "vmov d11, r10, r11 \n"
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75 "vmov d12, r0, r1 \n"
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76 "vmov d13, r2, r3 \n"
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77 "vmov d14, r4, r5 \n"
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78 "vmov d15, r6, r7 \n"
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81 /* Check all the VFP registers still contain the values set above.
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82 First save registers that are clobbered by the test. */
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85 "vmov r0, r1, d0 \n"
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87 "bne reg1_error_loopf \n"
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89 "bne reg1_error_loopf \n"
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90 "vmov r0, r1, d1 \n"
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92 "bne reg1_error_loopf \n"
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94 "bne reg1_error_loopf \n"
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95 "vmov r0, r1, d2 \n"
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97 "bne reg1_error_loopf \n"
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99 "bne reg1_error_loopf \n"
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100 "vmov r0, r1, d3 \n"
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102 "bne reg1_error_loopf \n"
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104 "bne reg1_error_loopf \n"
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105 "vmov r0, r1, d4 \n"
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107 "bne reg1_error_loopf \n"
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109 "bne reg1_error_loopf \n"
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110 "vmov r0, r1, d5 \n"
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112 "bne reg1_error_loopf \n"
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114 "bne reg1_error_loopf \n"
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115 "vmov r0, r1, d6 \n"
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117 "bne reg1_error_loopf \n"
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119 "bne reg1_error_loopf \n"
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120 "vmov r0, r1, d7 \n"
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122 "bne reg1_error_loopf \n"
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124 "bne reg1_error_loopf \n"
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125 "vmov r0, r1, d8 \n"
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127 "bne reg1_error_loopf \n"
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129 "bne reg1_error_loopf \n"
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130 "vmov r0, r1, d9 \n"
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132 "bne reg1_error_loopf \n"
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134 "bne reg1_error_loopf \n"
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135 "vmov r0, r1, d10 \n"
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137 "bne reg1_error_loopf \n"
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139 "bne reg1_error_loopf \n"
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140 "vmov r0, r1, d11 \n"
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142 "bne reg1_error_loopf \n"
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144 "bne reg1_error_loopf \n"
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145 "vmov r0, r1, d12 \n"
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147 "bne reg1_error_loopf \n"
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149 "bne reg1_error_loopf \n"
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150 "vmov r0, r1, d13 \n"
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152 "bne reg1_error_loopf \n"
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154 "bne reg1_error_loopf \n"
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155 "vmov r0, r1, d14 \n"
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157 "bne reg1_error_loopf \n"
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159 "bne reg1_error_loopf \n"
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160 "vmov r0, r1, d15 \n"
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162 "bne reg1_error_loopf \n"
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164 "bne reg1_error_loopf \n"
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166 /* Restore the registers that were clobbered by the test. */
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169 /* VFP register test passed. Jump to the core register test. */
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170 "b reg1_loopf_pass \n"
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172 "reg1_error_loopf: \n"
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173 /* If this line is hit then a VFP register value was found to be
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175 "b reg1_error_loopf \n"
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177 "reg1_loopf_pass: \n"
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180 "bne reg1_error_loop \n"
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182 "bne reg1_error_loop \n"
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184 "bne reg1_error_loop \n"
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186 "bne reg1_error_loop \n"
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188 "bne reg1_error_loop \n"
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190 "bne reg1_error_loop \n"
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192 "bne reg1_error_loop \n"
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194 "bne reg1_error_loop \n"
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196 "bne reg1_error_loop \n"
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198 "bne reg1_error_loop \n"
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200 "bne reg1_error_loop \n"
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202 "bne reg1_error_loop \n"
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204 "bne reg1_error_loop \n"
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206 /* Everything passed, increment the loop counter. */
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207 "push { r0-r1 } \n"
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208 "ldr r0, =ulRegTest1LoopCounter \n"
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210 "adds r1, r1, #1 \n"
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217 "reg1_error_loop: \n"
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218 /* If this line is hit then there was an error in a core register value.
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219 The loop ensures the loop counter stops incrementing. */
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220 "b reg1_error_loop \n"
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222 ); /* __asm volatile. */
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224 /*-----------------------------------------------------------*/
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226 void vRegTest2Implementation( void )
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230 ".extern ulRegTest2LoopCounter \n"
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232 /* Set all the core registers to known values. */
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247 /* Set all the VFP to known values. */
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248 "vmov d0, r0, r1 \n"
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249 "vmov d1, r2, r3 \n"
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250 "vmov d2, r4, r5 \n"
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251 "vmov d3, r6, r7 \n"
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252 "vmov d4, r8, r9 \n"
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253 "vmov d5, r10, r11 \n"
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254 "vmov d6, r0, r1 \n"
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255 "vmov d7, r2, r3 \n"
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256 "vmov d8, r4, r5 \n"
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257 "vmov d9, r6, r7 \n"
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258 "vmov d10, r8, r9 \n"
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259 "vmov d11, r10, r11 \n"
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260 "vmov d12, r0, r1 \n"
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261 "vmov d13, r2, r3 \n"
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262 "vmov d14, r4, r5 \n"
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263 "vmov d15, r6, r7 \n"
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267 /* Check all the VFP registers still contain the values set above.
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268 First save registers that are clobbered by the test. */
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269 "push { r0-r1 } \n"
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271 "vmov r0, r1, d0 \n"
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273 "bne reg2_error_loopf \n"
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275 "bne reg2_error_loopf \n"
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276 "vmov r0, r1, d1 \n"
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278 "bne reg2_error_loopf \n"
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280 "bne reg2_error_loopf \n"
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281 "vmov r0, r1, d2 \n"
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283 "bne reg2_error_loopf \n"
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285 "bne reg2_error_loopf \n"
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286 "vmov r0, r1, d3 \n"
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288 "bne reg2_error_loopf \n"
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290 "bne reg2_error_loopf \n"
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291 "vmov r0, r1, d4 \n"
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293 "bne reg2_error_loopf \n"
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295 "bne reg2_error_loopf \n"
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296 "vmov r0, r1, d5 \n"
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298 "bne reg2_error_loopf \n"
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300 "bne reg2_error_loopf \n"
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301 "vmov r0, r1, d6 \n"
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303 "bne reg2_error_loopf \n"
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305 "bne reg2_error_loopf \n"
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306 "vmov r0, r1, d7 \n"
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308 "bne reg2_error_loopf \n"
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310 "bne reg2_error_loopf \n"
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311 "vmov r0, r1, d8 \n"
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313 "bne reg2_error_loopf \n"
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315 "bne reg2_error_loopf \n"
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316 "vmov r0, r1, d9 \n"
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318 "bne reg2_error_loopf \n"
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320 "bne reg2_error_loopf \n"
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321 "vmov r0, r1, d10 \n"
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323 "bne reg2_error_loopf \n"
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325 "bne reg2_error_loopf \n"
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326 "vmov r0, r1, d11 \n"
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328 "bne reg2_error_loopf \n"
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330 "bne reg2_error_loopf \n"
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331 "vmov r0, r1, d12 \n"
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333 "bne reg2_error_loopf \n"
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335 "bne reg2_error_loopf \n"
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336 "vmov r0, r1, d13 \n"
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338 "bne reg2_error_loopf \n"
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340 "bne reg2_error_loopf \n"
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341 "vmov r0, r1, d14 \n"
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343 "bne reg2_error_loopf \n"
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345 "bne reg2_error_loopf \n"
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346 "vmov r0, r1, d15 \n"
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348 "bne reg2_error_loopf \n"
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350 "bne reg2_error_loopf \n"
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352 /* Restore the registers that were clobbered by the test. */
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355 /* VFP register test passed. Jump to the core register test. */
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356 "b reg2_loopf_pass \n"
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358 "reg2_error_loopf: \n"
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359 /* If this line is hit then a VFP register value was found to be
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361 "b reg2_error_loopf \n"
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363 "reg2_loopf_pass: \n"
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366 "bne reg2_error_loop \n"
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368 "bne reg2_error_loop \n"
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370 "bne reg2_error_loop \n"
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372 "bne reg2_error_loop \n"
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374 "bne reg2_error_loop \n"
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376 "bne reg2_error_loop \n"
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378 "bne reg2_error_loop \n"
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380 "bne reg2_error_loop \n"
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382 "bne reg2_error_loop \n"
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384 "bne reg2_error_loop \n"
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386 "bne reg2_error_loop \n"
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388 "bne reg2_error_loop \n"
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390 "bne reg2_error_loop \n"
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392 /* Increment the loop counter to indicate this test is still functioning
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394 "push { r0-r1 } \n"
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395 "ldr r0, =ulRegTest2LoopCounter \n"
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397 "adds r1, r1, #1 \n"
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400 /* Yield to increase test coverage. */
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401 "movs r0, #0x01 \n"
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402 "ldr r1, =0xe000ed04 \n" /*NVIC_INT_CTRL */
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403 "lsl r0, r0, #28 \n" /* Shift to PendSV bit */
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412 "reg2_error_loop: \n"
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413 /* If this line is hit then there was an error in a core register value.
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414 This loop ensures the loop counter variable stops incrementing. */
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415 "b reg2_error_loop \n"
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417 ); /* __asm volatile */
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419 /*-----------------------------------------------------------*/
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