1 //*****************************************************************************
\r
3 // startup.c - Boot code for Stellaris.
\r
5 // Copyright (c) 2005,2006 Luminary Micro, Inc. All rights reserved.
\r
7 // Software License Agreement
\r
9 // Luminary Micro, Inc. (LMI) is supplying this software for use solely and
\r
10 // exclusively on LMI's Stellaris Family of microcontroller products.
\r
12 // The software is owned by LMI and/or its suppliers, and is protected under
\r
13 // applicable copyright laws. All rights are reserved. Any use in violation
\r
14 // of the foregoing restrictions may subject the user to criminal sanctions
\r
15 // under applicable laws, as well as to civil liability for the breach of the
\r
16 // terms and conditions of this license.
\r
18 // THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
\r
19 // OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
\r
20 // MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
\r
21 // LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
\r
22 // CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
\r
24 //*****************************************************************************
\r
26 //*****************************************************************************
\r
28 // Forward declaration of the default fault handlers.
\r
30 //*****************************************************************************
\r
31 void ResetISR(void);
\r
32 static void NmiSR(void);
\r
33 void FaultISR(void);
\r
34 extern void xPortPendSVHandler(void);
\r
35 extern void xPortSysTickHandler(void);
\r
36 extern void vUART_ISR( void );
\r
37 extern void vPortSVCHandler( void );
\r
39 //*****************************************************************************
\r
41 // The entry point for the application.
\r
43 //*****************************************************************************
\r
44 extern void entry(void);
\r
46 //*****************************************************************************
\r
48 // Reserve space for the system stack.
\r
50 //*****************************************************************************
\r
52 #define STACK_SIZE 51
\r
54 static unsigned long pulMainStack[STACK_SIZE];
\r
56 //*****************************************************************************
\r
58 // The minimal vector table for a Cortex-M3. Note that the proper constructs
\r
59 // must be placed on this to ensure that it ends up at physical address
\r
62 //*****************************************************************************
\r
63 __attribute__ ((section("vectors")))
\r
64 void (* const g_pfnVectors[])(void) =
\r
66 (void (*)(void))((unsigned long)pulMainStack + sizeof(pulMainStack)),
\r
70 0, // The MPU fault handler
\r
71 0, // The bus fault handler
\r
72 0, // The usage fault handler
\r
77 vPortSVCHandler, // SVCall handler
\r
78 0, // Debug monitor handler
\r
80 xPortPendSVHandler, // The PendSV handler
\r
81 xPortSysTickHandler, // The SysTick handler
\r
87 vUART_ISR // UART0 Rx and Tx
\r
90 //*****************************************************************************
\r
92 // The following are constructs created by the linker, indicating where the
\r
93 // the "data" and "bss" segments reside in memory. The initializers for the
\r
94 // for the "data" segment resides immediately following the "text" segment.
\r
96 //*****************************************************************************
\r
97 extern unsigned long _etext;
\r
98 extern unsigned long _data;
\r
99 extern unsigned long _edata;
\r
100 extern unsigned long _bss;
\r
101 extern unsigned long _ebss;
\r
103 //*****************************************************************************
\r
105 // This is the code that gets called when the processor first starts execution
\r
106 // following a reset event. Only the absolutely necessary set is performed,
\r
107 // after which the application supplied entry() routine is called. Any fancy
\r
108 // actions (such as making decisions based on the reset cause register, and
\r
109 // resetting the bits in that register) are left solely in the hands of the
\r
112 //*****************************************************************************
\r
116 unsigned long *pulSrc, *pulDest;
\r
119 // Copy the data segment initializers from flash to SRAM.
\r
122 for(pulDest = &_data; pulDest < &_edata; )
\r
124 *pulDest++ = *pulSrc++;
\r
128 // Zero fill the bss segment.
\r
130 for(pulDest = &_bss; pulDest < &_ebss; )
\r
136 // Call the application's entry point.
\r
141 //*****************************************************************************
\r
143 // This is the code that gets called when the processor receives a NMI. This
\r
144 // simply enters an infinite loop, preserving the system state for examination
\r
147 //*****************************************************************************
\r
152 // Enter an infinite loop.
\r
159 //*****************************************************************************
\r
161 // This is the code that gets called when the processor receives a fault
\r
162 // interrupt. This simply enters an infinite loop, preserving the system state
\r
163 // for examination by a debugger.
\r
165 //*****************************************************************************
\r
170 // Enter an infinite loop.
\r