2 FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 This file is part of the FreeRTOS distribution.
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9 FreeRTOS is free software; you can redistribute it and/or modify it under
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10 the terms of the GNU General Public License (version 2) as published by the
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11 Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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13 ***************************************************************************
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14 >>! NOTE: The modification to the GPL is included to allow you to !<<
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15 >>! distribute a combined work that includes FreeRTOS without being !<<
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16 >>! obliged to provide the source code for proprietary components !<<
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17 >>! outside of the FreeRTOS kernel. !<<
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18 ***************************************************************************
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20 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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21 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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22 FOR A PARTICULAR PURPOSE. Full license text is available on the following
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23 link: http://www.freertos.org/a00114.html
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25 ***************************************************************************
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27 * FreeRTOS provides completely free yet professionally developed, *
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28 * robust, strictly quality controlled, supported, and cross *
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29 * platform software that is more than just the market leader, it *
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30 * is the industry's de facto standard. *
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32 * Help yourself get started quickly while simultaneously helping *
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33 * to support the FreeRTOS project by purchasing a FreeRTOS *
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34 * tutorial book, reference manual, or both: *
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35 * http://www.FreeRTOS.org/Documentation *
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37 ***************************************************************************
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39 http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
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40 the FAQ page "My application does not run, what could be wrong?". Have you
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41 defined configASSERT()?
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43 http://www.FreeRTOS.org/support - In return for receiving this top quality
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44 embedded software for free we request you assist our global community by
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45 participating in the support forum.
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47 http://www.FreeRTOS.org/training - Investing in training allows your team to
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48 be as productive as possible as early as possible. Now you can receive
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49 FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
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50 Ltd, and the world's leading authority on the world's leading RTOS.
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52 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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53 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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54 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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56 http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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57 Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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59 http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
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60 Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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61 licenses offer ticketed support, indemnification and commercial middleware.
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63 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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64 engineered and independently SIL3 certified version for use in safety and
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65 mission critical applications that require provable dependability.
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70 /* Kernel includes. */
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71 #include "FreeRTOS.h"
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75 /* Demo includes. */
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81 /* Hardware library includes. */
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82 #include "hw_types.h"
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83 #include "hw_memmap.h"
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84 #include "hw_ints.h"
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85 #include "hw_ethernet.h"
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86 #include "ethernet.h"
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87 #include "interrupt.h"
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89 #define emacNUM_RX_BUFFERS 5
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90 #define emacFRAM_SIZE_BYTES 2
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91 #define macNEGOTIATE_DELAY 2000
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92 #define macWAIT_SEND_TIME ( 10 )
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94 /* The task that handles the MAC peripheral. This is created at a high
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95 priority and is effectively a deferred interrupt handler. The peripheral
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96 handling is deferred to a task to prevent the entire FIFO having to be read
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97 from within an ISR. */
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98 void vMACHandleTask( void *pvParameters );
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100 /*-----------------------------------------------------------*/
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102 /* The semaphore used to wake the uIP task when data arrives. */
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103 SemaphoreHandle_t xEMACSemaphore = NULL;
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105 /* The semaphore used to wake the interrupt handler task. The peripheral
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106 is processed at the task level to prevent the need to read the entire FIFO from
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107 within the ISR itself. */
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108 SemaphoreHandle_t xMACInterruptSemaphore = NULL;
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110 /* The buffer used by the uIP stack. In this case the pointer is used to
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111 point to one of the Rx buffers. */
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112 unsigned char *uip_buf;
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114 /* Buffers into which Rx data is placed. */
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115 static unsigned char ucRxBuffers[ emacNUM_RX_BUFFERS ][ UIP_BUFSIZE + ( 4 * emacFRAM_SIZE_BYTES ) ];
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117 /* The length of the data within each of the Rx buffers. */
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118 static unsigned long ulRxLength[ emacNUM_RX_BUFFERS ];
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120 /* Used to keep a track of the number of bytes to transmit. */
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121 static unsigned long ulNextTxSpace;
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123 /*-----------------------------------------------------------*/
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125 portBASE_TYPE vInitEMAC( void )
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127 unsigned long ulTemp;
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128 portBASE_TYPE xReturn;
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130 /* Ensure all interrupts are disabled. */
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131 EthernetIntDisable( ETH_BASE, ( ETH_INT_PHY | ETH_INT_MDIO | ETH_INT_RXER | ETH_INT_RXOF | ETH_INT_TX | ETH_INT_TXER | ETH_INT_RX));
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133 /* Clear any interrupts that were already pending. */
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134 ulTemp = EthernetIntStatus( ETH_BASE, pdFALSE );
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135 EthernetIntClear( ETH_BASE, ulTemp );
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137 /* Initialise the MAC and connect. */
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138 EthernetInit( ETH_BASE );
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139 EthernetConfigSet( ETH_BASE, ( ETH_CFG_TX_DPLXEN | ETH_CFG_TX_CRCEN | ETH_CFG_TX_PADEN ) );
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140 EthernetEnable( ETH_BASE );
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142 /* Mark each Rx buffer as empty. */
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143 for( ulTemp = 0; ulTemp < emacNUM_RX_BUFFERS; ulTemp++ )
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145 ulRxLength[ ulTemp ] = 0;
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148 /* Create the queue and task used to defer the MAC processing to the
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150 vSemaphoreCreateBinary( xMACInterruptSemaphore );
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151 xSemaphoreTake( xMACInterruptSemaphore, 0 );
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152 xReturn = xTaskCreate( vMACHandleTask, "MAC", configMINIMAL_STACK_SIZE, NULL, configMAX_PRIORITIES - 1, NULL );
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153 vTaskDelay( macNEGOTIATE_DELAY );
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155 /* We are only interested in Rx interrupts. */
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156 IntPrioritySet( INT_ETH, configKERNEL_INTERRUPT_PRIORITY );
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157 IntEnable( INT_ETH );
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158 EthernetIntEnable(ETH_BASE, ETH_INT_RX);
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162 /*-----------------------------------------------------------*/
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164 unsigned int uiGetEMACRxData( unsigned char *ucBuffer )
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166 static unsigned long ulNextRxBuffer = 0;
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169 iLen = ulRxLength[ ulNextRxBuffer ];
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173 /* Leave room for the size at the start of the buffer. */
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174 uip_buf = &( ucRxBuffers[ ulNextRxBuffer ][ 2 ] );
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176 ulRxLength[ ulNextRxBuffer ] = 0;
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179 if( ulNextRxBuffer >= emacNUM_RX_BUFFERS )
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181 ulNextRxBuffer = 0;
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187 /*-----------------------------------------------------------*/
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189 void vInitialiseSend( void )
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191 /* Set the index to the first byte to send - skipping over the size
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195 /*-----------------------------------------------------------*/
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197 void vIncrementTxLength( unsigned long ulLength )
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199 ulNextTxSpace += ulLength;
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201 /*-----------------------------------------------------------*/
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203 void vSendBufferToMAC( void )
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205 unsigned long *pulSource;
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206 unsigned short * pus;
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207 unsigned long ulNextWord;
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209 /* Locate the data to be send. */
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210 pus = ( unsigned short * ) uip_buf;
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212 /* Add in the size of the data. */
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214 *pus = ulNextTxSpace;
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216 /* Wait for data to be sent if there is no space immediately. */
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217 while( !EthernetSpaceAvail( ETH_BASE ) )
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219 vTaskDelay( macWAIT_SEND_TIME );
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222 pulSource = ( unsigned long * ) pus;
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224 for( ulNextWord = 0; ulNextWord < ulNextTxSpace; ulNextWord += sizeof( unsigned long ) )
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226 HWREG(ETH_BASE + MAC_O_DATA) = *pulSource;
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231 HWREG( ETH_BASE + MAC_O_TR ) = MAC_TR_NEWTX;
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233 /*-----------------------------------------------------------*/
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235 void vEMAC_ISR( void )
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237 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
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238 unsigned long ulTemp;
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240 /* Clear the interrupt. */
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241 ulTemp = EthernetIntStatus( ETH_BASE, pdFALSE );
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242 EthernetIntClear( ETH_BASE, ulTemp );
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244 /* Was it an Rx interrupt? */
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245 if( ulTemp & ETH_INT_RX )
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247 xSemaphoreGiveFromISR( xMACInterruptSemaphore, &xHigherPriorityTaskWoken );
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248 EthernetIntDisable( ETH_BASE, ETH_INT_RX );
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251 /* Switch to the uIP task. */
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252 portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
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254 /*-----------------------------------------------------------*/
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256 void vMACHandleTask( void *pvParameters )
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258 unsigned long ulLen = 0, i;
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259 unsigned long ulLength, ulInt;
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260 unsigned long *pulBuffer;
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261 static unsigned long ulNextRxBuffer = 0;
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262 portBASE_TYPE xSwitchRequired = pdFALSE;
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266 /* Wait for something to do. */
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267 xSemaphoreTake( xMACInterruptSemaphore, portMAX_DELAY );
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269 while( ( ulInt = ( EthernetIntStatus( ETH_BASE, pdFALSE ) & ETH_INT_RX ) ) != 0 )
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271 ulLength = HWREG( ETH_BASE + MAC_O_DATA );
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273 /* Leave room at the start of the buffer for the size. */
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274 pulBuffer = ( unsigned long * ) &( ucRxBuffers[ ulNextRxBuffer ][ 2 ] );
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275 *pulBuffer = ( ulLength >> 16 );
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277 /* Get the size of the data. */
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278 pulBuffer = ( unsigned long * ) &( ucRxBuffers[ ulNextRxBuffer ][ 4 ] );
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279 ulLength &= 0xFFFF;
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285 if( ulLength >= UIP_BUFSIZE )
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287 /* The data won't fit in our buffer. Ensure we don't
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288 try to write into the buffer. */
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292 /* Read out the data into our buffer. */
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293 for( i = 0; i < ulLength; i += sizeof( unsigned long ) )
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295 *pulBuffer = HWREG( ETH_BASE + MAC_O_DATA );
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299 /* Store the length of the data into the separate array. */
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300 ulRxLength[ ulNextRxBuffer ] = ulLength;
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302 /* Use the next buffer the next time through. */
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304 if( ulNextRxBuffer >= emacNUM_RX_BUFFERS )
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306 ulNextRxBuffer = 0;
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309 /* Ensure the uIP task is not blocked as data has arrived. */
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310 xSemaphoreGive( xEMACSemaphore );
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314 EthernetIntEnable( ETH_BASE, ETH_INT_RX );
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