2 * Copyright 2018 NXP.
\r
3 * All rights reserved.
\r
5 * SPDX-License-Identifier: BSD-3-Clause
\r
12 /*******************************************************************************
\r
14 ******************************************************************************/
\r
16 /*! @brief Direction type */
\r
17 typedef enum _pin_mux_direction
\r
19 kPIN_MUX_DirectionInput = 0U, /* Input direction */
\r
20 kPIN_MUX_DirectionOutput = 1U, /* Output direction */
\r
21 kPIN_MUX_DirectionInputOrOutput = 2U /* Input or output direction */
\r
22 } pin_mux_direction_t;
\r
25 * @addtogroup pin_mux
\r
29 /*******************************************************************************
\r
31 ******************************************************************************/
\r
33 #if defined(__cplusplus)
\r
38 * @brief Calls initialization functions.
\r
41 void BOARD_InitBootPins(void);
\r
44 * @brief Configures pin routing and optionally pin electrical features.
\r
47 void BOARD_InitPins(void); /* Function assigned for the Cortex-M0P */
\r
49 /* FC1_RTS_SCL_SSEL1 (number 1), J4[9]/JS3[1]/JS4[3]/U10[7]/U12[D6]/BRIDGE_SCL */
\r
50 #define BOARD_LINK2MCU_SCL_PERIPHERAL FLEXCOMM1 /*!< Device name: FLEXCOMM1 */
\r
51 #define BOARD_LINK2MCU_SCL_SIGNAL RTS_SCL_SSEL1 /*!< FLEXCOMM1 signal: RTS_SCL_SSEL1 */
\r
52 #define BOARD_LINK2MCU_SCL_PIN_NAME FC1_RTS_SCL_SSEL1 /*!< Pin name */
\r
53 #define BOARD_LINK2MCU_SCL_LABEL "J4[9]/JS3[1]/JS4[3]/U10[7]/U12[D6]/BRIDGE_SCL" /*!< Label */
\r
54 #define BOARD_LINK2MCU_SCL_NAME "LINK2MCU_SCL" /*!< Identifier name */
\r
56 /* FC1_CTS_SDA_SSEL0 (number 2), J4[10]/JS2[1]/JS5[3]/U10[5]/U12[E6]/SW1/BRIDGE_SDA-WAKEUP */
\r
57 #define BOARD_LINK2MCU_SDA_PERIPHERAL FLEXCOMM1 /*!< Device name: FLEXCOMM1 */
\r
58 #define BOARD_LINK2MCU_SDA_SIGNAL CTS_SDA_SSEL0 /*!< FLEXCOMM1 signal: CTS_SDA_SSEL0 */
\r
59 #define BOARD_LINK2MCU_SDA_PIN_NAME FC1_CTS_SDA_SSEL0 /*!< Pin name */
\r
60 #define BOARD_LINK2MCU_SDA_LABEL "J4[10]/JS2[1]/JS5[3]/U10[5]/U12[E6]/SW1/BRIDGE_SDA-WAKEUP" /*!< Label */
\r
61 #define BOARD_LINK2MCU_SDA_NAME "LINK2MCU_SDA" /*!< Identifier name */
\r
64 * @brief Configures pin routing and optionally pin electrical features.
\r
67 void BOARD_InitLink2MCUPins(void); /* Function assigned for the Cortex-M0P */
\r
69 /* PIO0_24 (number 2), J4[10]/JS2[1]/JS5[3]/U10[5]/U12[E6]/SW1/BRIDGE_SDA-WAKEUP */
\r
70 #define BOARD_SW1_GPIO GPIO /*!< GPIO device name: GPIO */
\r
71 #define BOARD_SW1_PORT 0U /*!< PORT device index: 0 */
\r
72 #define BOARD_SW1_GPIO_PIN 24U /*!< PIO0 pin index: 24 */
\r
73 #define BOARD_SW1_PIN_NAME PIO0_24 /*!< Pin name */
\r
74 #define BOARD_SW1_LABEL "J4[10]/JS2[1]/JS5[3]/U10[5]/U12[E6]/SW1/BRIDGE_SDA-WAKEUP" /*!< Label */
\r
75 #define BOARD_SW1_NAME "SW1" /*!< Identifier name */
\r
76 #define BOARD_SW1_DIRECTION kPIN_MUX_DirectionInput /*!< Direction */
\r
78 /* PIO0_31 (number 13), J2[17]/J3[2]/P1[7]/U3[4]/SW2/P0_31-PDM0_CLK-ISP0_EN */
\r
79 #define BOARD_SW2_GPIO GPIO /*!< GPIO device name: GPIO */
\r
80 #define BOARD_SW2_PORT 0U /*!< PORT device index: 0 */
\r
81 #define BOARD_SW2_GPIO_PIN 31U /*!< PIO0 pin index: 31 */
\r
82 #define BOARD_SW2_PIN_NAME PIO0_31 /*!< Pin name */
\r
83 #define BOARD_SW2_LABEL "J2[17]/J3[2]/P1[7]/U3[4]/SW2/P0_31-PDM0_CLK-ISP0_EN" /*!< Label */
\r
84 #define BOARD_SW2_NAME "SW2" /*!< Identifier name */
\r
85 #define BOARD_SW2_DIRECTION kPIN_MUX_DirectionInput /*!< Direction */
\r
87 /* PIO0_4 (number 38), J4[7]/U9[12]/SW3/BRIDGE_T_INTR-ISP1 */
\r
88 #define BOARD_SW3_GPIO GPIO /*!< GPIO device name: GPIO */
\r
89 #define BOARD_SW3_PORT 0U /*!< PORT device index: 0 */
\r
90 #define BOARD_SW3_GPIO_PIN 4U /*!< PIO0 pin index: 4 */
\r
91 #define BOARD_SW3_PIN_NAME PIO0_4 /*!< Pin name */
\r
92 #define BOARD_SW3_LABEL "J4[7]/U9[12]/SW3/BRIDGE_T_INTR-ISP1" /*!< Label */
\r
93 #define BOARD_SW3_NAME "SW3" /*!< Identifier name */
\r
94 #define BOARD_SW3_DIRECTION kPIN_MUX_DirectionInput /*!< Direction */
\r
97 * @brief Configures pin routing and optionally pin electrical features.
\r
100 void BOARD_InitBUTTONsPins(void); /* Function assigned for the Cortex-M0P */
\r
102 /* PIO1_9 (number 29), J9[5]/D2[3]/P1_9-BLUE_LED */
\r
103 #define BOARD_LED_BLUE_GPIO GPIO /*!< GPIO device name: GPIO */
\r
104 #define BOARD_LED_BLUE_PORT 1U /*!< PORT device index: 1 */
\r
105 #define BOARD_LED_BLUE_GPIO_PIN 9U /*!< PIO1 pin index: 9 */
\r
106 #define BOARD_LED_BLUE_PIN_NAME PIO1_9 /*!< Pin name */
\r
107 #define BOARD_LED_BLUE_LABEL "J9[5]/D2[3]/P1_9-BLUE_LED" /*!< Label */
\r
108 #define BOARD_LED_BLUE_NAME "LED_BLUE" /*!< Identifier name */
\r
109 #define BOARD_LED_BLUE_DIRECTION kPIN_MUX_DirectionOutput /*!< Direction */
\r
111 /* PIO1_10 (number 30), J9[8]/D2[4]/P1_10-SCT4-LED_GREEN */
\r
112 #define BOARD_LED_GREEN_GPIO GPIO /*!< GPIO device name: GPIO */
\r
113 #define BOARD_LED_GREEN_PORT 1U /*!< PORT device index: 1 */
\r
114 #define BOARD_LED_GREEN_GPIO_PIN 10U /*!< PIO1 pin index: 10 */
\r
115 #define BOARD_LED_GREEN_PIN_NAME PIO1_10 /*!< Pin name */
\r
116 #define BOARD_LED_GREEN_LABEL "J9[8]/D2[4]/P1_10-SCT4-LED_GREEN" /*!< Label */
\r
117 #define BOARD_LED_GREEN_NAME "LED_GREEN" /*!< Identifier name */
\r
118 #define BOARD_LED_GREEN_DIRECTION kPIN_MUX_DirectionOutput /*!< Direction */
\r
120 /* PIO0_29 (number 11), J2[5]/D2[1]/P0_29-CT32B0_MAT3-RED */
\r
121 #define BOARD_LED_RED_GPIO GPIO /*!< GPIO device name: GPIO */
\r
122 #define BOARD_LED_RED_PORT 0U /*!< PORT device index: 0 */
\r
123 #define BOARD_LED_RED_GPIO_PIN 29U /*!< PIO0 pin index: 29 */
\r
124 #define BOARD_LED_RED_PIN_NAME PIO0_29 /*!< Pin name */
\r
125 #define BOARD_LED_RED_LABEL "J2[5]/D2[1]/P0_29-CT32B0_MAT3-RED" /*!< Label */
\r
126 #define BOARD_LED_RED_NAME "LED_RED" /*!< Identifier name */
\r
127 #define BOARD_LED_RED_DIRECTION kPIN_MUX_DirectionOutput /*!< Direction */
\r
130 * @brief Configures pin routing and optionally pin electrical features.
\r
133 void BOARD_InitLEDsPins(void); /* Function assigned for the Cortex-M0P */
\r
135 /* FC4_RTS_SCL_SSEL1 (number 3), J1[1]/JS4[1]/U10[7]/P0_25-FC4_SCLX */
\r
136 #define BOARD_FC4_SCLX_PERIPHERAL FLEXCOMM4 /*!< Device name: FLEXCOMM4 */
\r
137 #define BOARD_FC4_SCLX_SIGNAL RTS_SCL_SSEL1 /*!< FLEXCOMM4 signal: RTS_SCL_SSEL1 */
\r
138 #define BOARD_FC4_SCLX_PIN_NAME FC4_RTS_SCL_SSEL1 /*!< Pin name */
\r
139 #define BOARD_FC4_SCLX_LABEL "J1[1]/JS4[1]/U10[7]/P0_25-FC4_SCLX" /*!< Label */
\r
140 #define BOARD_FC4_SCLX_NAME "FC4_SCLX" /*!< Identifier name */
\r
142 /* FC4_CTS_SDA_SSEL0 (number 4), J1[3]/JS5[1]/U10[5]/P0_26-FC4_SDAX */
\r
143 #define BOARD_FC4_SDAX_PERIPHERAL FLEXCOMM4 /*!< Device name: FLEXCOMM4 */
\r
144 #define BOARD_FC4_SDAX_SIGNAL CTS_SDA_SSEL0 /*!< FLEXCOMM4 signal: CTS_SDA_SSEL0 */
\r
145 #define BOARD_FC4_SDAX_PIN_NAME FC4_CTS_SDA_SSEL0 /*!< Pin name */
\r
146 #define BOARD_FC4_SDAX_LABEL "J1[3]/JS5[1]/U10[5]/P0_26-FC4_SDAX" /*!< Label */
\r
147 #define BOARD_FC4_SDAX_NAME "FC4_SDAX" /*!< Identifier name */
\r
150 * @brief Configures pin routing and optionally pin electrical features.
\r
153 void BOARD_InitSecureMCUPins(void); /* Function assigned for the Cortex-M0P */
\r
155 /* FC5_TXD_SCL_MISO (number 58), J1[11]/U5[2]/P0_18-FC5_TXD_SCL_MISO */
\r
156 #define BOARD_SPI_FLASH_MISO_PERIPHERAL FLEXCOMM5 /*!< Device name: FLEXCOMM5 */
\r
157 #define BOARD_SPI_FLASH_MISO_SIGNAL TXD_SCL_MISO /*!< FLEXCOMM5 signal: TXD_SCL_MISO */
\r
158 #define BOARD_SPI_FLASH_MISO_PIN_NAME FC5_TXD_SCL_MISO /*!< Pin name */
\r
159 #define BOARD_SPI_FLASH_MISO_LABEL "J1[11]/U5[2]/P0_18-FC5_TXD_SCL_MISO" /*!< Label */
\r
160 #define BOARD_SPI_FLASH_MISO_NAME "SPI_FLASH_MISO" /*!< Identifier name */
\r
162 /* FC5_SCK (number 59), J1[9]/J2[8]/U5[6]/P0_19-FC5_SCK-SPIFI_CSn */
\r
163 #define BOARD_SPI_FLASH_SCK_PERIPHERAL FLEXCOMM5 /*!< Device name: FLEXCOMM5 */
\r
164 #define BOARD_SPI_FLASH_SCK_SIGNAL SCK /*!< FLEXCOMM5 signal: SCK */
\r
165 #define BOARD_SPI_FLASH_SCK_PIN_NAME FC5_SCK /*!< Pin name */
\r
166 #define BOARD_SPI_FLASH_SCK_LABEL "J1[9]/J2[8]/U5[6]/P0_19-FC5_SCK-SPIFI_CSn" /*!< Label */
\r
167 #define BOARD_SPI_FLASH_SCK_NAME "SPI_FLASH_SCK" /*!< Identifier name */
\r
169 /* FC5_RXD_SDA_MOSI (number 60), J1[13]/U5[5]/P0_20-FC5_RXD_SDA_MOSI */
\r
170 #define BOARD_SPI_FLASH_MOSI_PERIPHERAL FLEXCOMM5 /*!< Device name: FLEXCOMM5 */
\r
171 #define BOARD_SPI_FLASH_MOSI_SIGNAL RXD_SDA_MOSI /*!< FLEXCOMM5 signal: RXD_SDA_MOSI */
\r
172 #define BOARD_SPI_FLASH_MOSI_PIN_NAME FC5_RXD_SDA_MOSI /*!< Pin name */
\r
173 #define BOARD_SPI_FLASH_MOSI_LABEL "J1[13]/U5[5]/P0_20-FC5_RXD_SDA_MOSI" /*!< Label */
\r
174 #define BOARD_SPI_FLASH_MOSI_NAME "SPI_FLASH_MOSI" /*!< Identifier name */
\r
176 /* FC5_SSEL3 (number 16), J9[7]/JS8[1]/U5[1]/P1_2-FC5_SSEL3 */
\r
177 #define BOARD_FC5_SSEL3_PERIPHERAL FLEXCOMM5 /*!< Device name: FLEXCOMM5 */
\r
178 #define BOARD_FC5_SSEL3_SIGNAL SSEL3 /*!< FLEXCOMM5 signal: SSEL3 */
\r
179 #define BOARD_FC5_SSEL3_PIN_NAME FC5_SSEL3 /*!< Pin name */
\r
180 #define BOARD_FC5_SSEL3_LABEL "J9[7]/JS8[1]/U5[1]/P1_2-FC5_SSEL3" /*!< Label */
\r
181 #define BOARD_FC5_SSEL3_NAME "FC5_SSEL3" /*!< Identifier name */
\r
184 * @brief Configures pin routing and optionally pin electrical features.
\r
187 void BOARD_InitSPI_FLASHPins(void); /* Function assigned for the Cortex-M0P */
\r
189 /* PIO0_4 (number 38), J4[7]/U9[12]/SW3/BRIDGE_T_INTR-ISP1 */
\r
190 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_T_INTR_GPIO GPIO /*!< GPIO device name: GPIO */
\r
191 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_T_INTR_PORT 0U /*!< PORT device index: 0 */
\r
192 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_T_INTR_GPIO_PIN 4U /*!< PIO0 pin index: 4 */
\r
193 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_T_INTR_PIN_NAME PIO0_4 /*!< Pin name */
\r
194 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_T_INTR_LABEL "J4[7]/U9[12]/SW3/BRIDGE_T_INTR-ISP1" /*!< Label */
\r
195 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_T_INTR_NAME "BRIDGE_T_INTR" /*!< Identifier name */
\r
197 /* FC3_SCK (number 46), J4[4]/U9[13]/BRIDGE_T_SCK */
\r
198 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_T_SCK_PERIPHERAL FLEXCOMM3 /*!< Device name: FLEXCOMM3 */
\r
199 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_T_SCK_SIGNAL SCK /*!< FLEXCOMM3 signal: SCK */
\r
200 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_T_SCK_PIN_NAME FC3_SCK /*!< Pin name */
\r
201 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_T_SCK_LABEL "J4[4]/U9[13]/BRIDGE_T_SCK" /*!< Label */
\r
202 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_T_SCK_NAME "BRIDGE_T_SCK" /*!< Identifier name */
\r
203 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_T_SCK_DIRECTION kPIN_MUX_DirectionOutput /*!< Direction */
\r
205 /* FC3_RXD_SDA_MOSI (number 47), J4[2]/U9[11]/BRIDGE_T_MOSI */
\r
206 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_T_MOSI_PERIPHERAL FLEXCOMM3 /*!< Device name: FLEXCOMM3 */
\r
207 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_T_MOSI_SIGNAL RXD_SDA_MOSI /*!< FLEXCOMM3 signal: RXD_SDA_MOSI */
\r
208 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_T_MOSI_PIN_NAME FC3_RXD_SDA_MOSI /*!< Pin name */
\r
209 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_T_MOSI_LABEL "J4[2]/U9[11]/BRIDGE_T_MOSI" /*!< Label */
\r
210 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_T_MOSI_NAME "BRIDGE_T_MOSI" /*!< Identifier name */
\r
211 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_T_MOSI_DIRECTION kPIN_MUX_DirectionOutput /*!< Direction */
\r
213 /* FC3_TXD_SCL_MISO (number 48), J4[3]/U15[4]/BRIDGE_T_MISO */
\r
214 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_T_MISO_PERIPHERAL FLEXCOMM3 /*!< Device name: FLEXCOMM3 */
\r
215 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_T_MISO_SIGNAL TXD_SCL_MISO /*!< FLEXCOMM3 signal: TXD_SCL_MISO */
\r
216 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_T_MISO_PIN_NAME FC3_TXD_SCL_MISO /*!< Pin name */
\r
217 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_T_MISO_LABEL "J4[3]/U15[4]/BRIDGE_T_MISO" /*!< Label */
\r
218 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_T_MISO_NAME "BRIDGE_T_MISO" /*!< Identifier name */
\r
219 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_T_MISO_DIRECTION kPIN_MUX_DirectionInput /*!< Direction */
\r
221 /* FC3_CTS_SDA_SSEL0 (number 49), J2[12]/J4[1]/U9[14]/BRIDGE_T_SSEL-SPIFI_IO3 */
\r
222 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_T_SSEL_PERIPHERAL FLEXCOMM3 /*!< Device name: FLEXCOMM3 */
\r
223 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_T_SSEL_SIGNAL CTS_SDA_SSEL0 /*!< FLEXCOMM3 signal: CTS_SDA_SSEL0 */
\r
224 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_T_SSEL_PIN_NAME FC3_CTS_SDA_SSEL0 /*!< Pin name */
\r
225 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_T_SSEL_LABEL "J2[12]/J4[1]/U9[14]/BRIDGE_T_SSEL-SPIFI_IO3" /*!< Label */
\r
226 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_T_SSEL_NAME "BRIDGE_T_SSEL" /*!< Identifier name */
\r
227 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_T_SSEL_DIRECTION kPIN_MUX_DirectionOutput /*!< Direction */
\r
229 /* PIO0_22 (number 63), J4[8]/P0_22-BRIDGE_GPIO */
\r
230 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_GPIO_GPIO GPIO /*!< GPIO device name: GPIO */
\r
231 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_GPIO_PORT 0U /*!< PORT device index: 0 */
\r
232 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_GPIO_GPIO_PIN 22U /*!< PIO0 pin index: 22 */
\r
233 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_GPIO_PIN_NAME PIO0_22 /*!< Pin name */
\r
234 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_GPIO_LABEL "J4[8]/P0_22-BRIDGE_GPIO" /*!< Label */
\r
235 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_GPIO_NAME "BRIDGE_GPIO" /*!< Identifier name */
\r
237 /* FC1_RTS_SCL_SSEL1 (number 1), J4[9]/JS3[1]/JS4[3]/U10[7]/U12[D6]/BRIDGE_SCL */
\r
238 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_SCL_PERIPHERAL FLEXCOMM1 /*!< Device name: FLEXCOMM1 */
\r
239 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_SCL_SIGNAL RTS_SCL_SSEL1 /*!< FLEXCOMM1 signal: RTS_SCL_SSEL1 */
\r
240 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_SCL_PIN_NAME FC1_RTS_SCL_SSEL1 /*!< Pin name */
\r
241 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_SCL_LABEL "J4[9]/JS3[1]/JS4[3]/U10[7]/U12[D6]/BRIDGE_SCL" /*!< Label */
\r
242 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_SCL_NAME "BRIDGE_SCL" /*!< Identifier name */
\r
244 /* FC1_CTS_SDA_SSEL0 (number 2), J4[10]/JS2[1]/JS5[3]/U10[5]/U12[E6]/SW1/BRIDGE_SDA-WAKEUP */
\r
245 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_SDA_WAKEUP_PERIPHERAL FLEXCOMM1 /*!< Device name: FLEXCOMM1 */
\r
246 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_SDA_WAKEUP_SIGNAL CTS_SDA_SSEL0 /*!< FLEXCOMM1 signal: CTS_SDA_SSEL0 */
\r
247 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_SDA_WAKEUP_PIN_NAME FC1_CTS_SDA_SSEL0 /*!< Pin name */
\r
248 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_SDA_WAKEUP_LABEL "J4[10]/JS2[1]/JS5[3]/U10[5]/U12[E6]/SW1/BRIDGE_SDA-WAKEUP" /*!< Label */
\r
249 #define BOARD_INITPMOD_SPI_I2C_BRIDGEPINS_BRIDGE_SDA_WAKEUP_NAME "BRIDGE_SDA_WAKEUP" /*!< Identifier name */
\r
252 * @brief Configures pin routing and optionally pin electrical features.
\r
255 void BOARD_InitPMod_SPI_I2C_BRIDGEPins(void); /* Function assigned for the Cortex-M0P */
\r
257 /* USB0_DP (number 5), J5[3]/U7[2]/USB_DP */
\r
258 #define BOARD_USB_DP_PERIPHERAL USB0 /*!< Device name: USB0 */
\r
259 #define BOARD_USB_DP_SIGNAL USB_DP /*!< USB0 signal: USB_DP */
\r
260 #define BOARD_USB_DP_PIN_NAME USB0_DP /*!< Pin name */
\r
261 #define BOARD_USB_DP_LABEL "J5[3]/U7[2]/USB_DP" /*!< Label */
\r
262 #define BOARD_USB_DP_NAME "USB_DP" /*!< Identifier name */
\r
264 /* USB0_DM (number 6), J5[2]/U7[3]/USB_DM */
\r
265 #define BOARD_USB_DM_PERIPHERAL USB0 /*!< Device name: USB0 */
\r
266 #define BOARD_USB_DM_SIGNAL USB_DM /*!< USB0 signal: USB_DM */
\r
267 #define BOARD_USB_DM_PIN_NAME USB0_DM /*!< Pin name */
\r
268 #define BOARD_USB_DM_LABEL "J5[2]/U7[3]/USB_DM" /*!< Label */
\r
269 #define BOARD_USB_DM_NAME "USB_DM" /*!< Identifier name */
\r
271 /* USB0_VBUS (number 26), J1[14]/J5[1]/JP10[2]/P1_6-FC7_SCK-USB_VBUS */
\r
272 #define BOARD_USB_VBUS_PERIPHERAL USB0 /*!< Device name: USB0 */
\r
273 #define BOARD_USB_VBUS_SIGNAL USB_VBUS /*!< USB0 signal: USB_VBUS */
\r
274 #define BOARD_USB_VBUS_PIN_NAME USB0_VBUS /*!< Pin name */
\r
275 #define BOARD_USB_VBUS_LABEL "J1[14]/J5[1]/JP10[2]/P1_6-FC7_SCK-USB_VBUS" /*!< Label */
\r
276 #define BOARD_USB_VBUS_NAME "USB_VBUS" /*!< Identifier name */
\r
279 * @brief Configures pin routing and optionally pin electrical features.
\r
282 void BOARD_InitUSBPins(void); /* Function assigned for the Cortex-M0P */
\r
284 /* FC0_TXD_SCL_MISO (number 32), U6[4]/U22[3]/P0_1-ISP_TX */
\r
285 #define BOARD_DEBUG_UART_TX_PERIPHERAL FLEXCOMM0 /*!< Device name: FLEXCOMM0 */
\r
286 #define BOARD_DEBUG_UART_TX_SIGNAL TXD_SCL_MISO /*!< FLEXCOMM0 signal: TXD_SCL_MISO */
\r
287 #define BOARD_DEBUG_UART_TX_PIN_NAME FC0_TXD_SCL_MISO /*!< Pin name */
\r
288 #define BOARD_DEBUG_UART_TX_LABEL "U6[4]/U22[3]/P0_1-ISP_TX" /*!< Label */
\r
289 #define BOARD_DEBUG_UART_TX_NAME "DEBUG_UART_TX" /*!< Identifier name */
\r
290 #define BOARD_DEBUG_UART_TX_DIRECTION kPIN_MUX_DirectionOutput /*!< Direction */
\r
292 /* FC0_RXD_SDA_MOSI (number 31), U18[4]/TO_MUX_P0_0-ISP_RX */
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293 #define BOARD_DEBUG_UART_RX_PERIPHERAL FLEXCOMM0 /*!< Device name: FLEXCOMM0 */
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294 #define BOARD_DEBUG_UART_RX_SIGNAL RXD_SDA_MOSI /*!< FLEXCOMM0 signal: RXD_SDA_MOSI */
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295 #define BOARD_DEBUG_UART_RX_PIN_NAME FC0_RXD_SDA_MOSI /*!< Pin name */
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296 #define BOARD_DEBUG_UART_RX_LABEL "U18[4]/TO_MUX_P0_0-ISP_RX" /*!< Label */
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297 #define BOARD_DEBUG_UART_RX_NAME "DEBUG_UART_RX" /*!< Identifier name */
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298 #define BOARD_DEBUG_UART_RX_DIRECTION kPIN_MUX_DirectionInput /*!< Direction */
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301 * @brief Configures pin routing and optionally pin electrical features.
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304 void BOARD_InitDEBUG_UARTPins(void); /* Function assigned for the Cortex-M0P */
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306 /* SWDIO (number 53), J2[6]/P1[2]/U2[5]/U14[4]/IF_TMS_SWDIO-SPIFI_IO0 */
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307 #define BOARD_DEBUG_SWD_SWDIO_PERIPHERAL SWD /*!< Device name: SWD */
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308 #define BOARD_DEBUG_SWD_SWDIO_SIGNAL SWDIO /*!< SWD signal: SWDIO */
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309 #define BOARD_DEBUG_SWD_SWDIO_PIN_NAME SWDIO /*!< Pin name */
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310 #define BOARD_DEBUG_SWD_SWDIO_LABEL "J2[6]/P1[2]/U2[5]/U14[4]/IF_TMS_SWDIO-SPIFI_IO0" /*!< Label */
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311 #define BOARD_DEBUG_SWD_SWDIO_NAME "DEBUG_SWD_SWDIO" /*!< Identifier name */
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313 /* SWCLK (number 52), J2[4]/JS28/U4[4]/TCK-SWDCLK_TRGT-SPIFI_IO1 */
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314 #define BOARD_DEBUG_SWD_SWDCLK_PERIPHERAL SWD /*!< Device name: SWD */
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315 #define BOARD_DEBUG_SWD_SWDCLK_SIGNAL SWCLK /*!< SWD signal: SWCLK */
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316 #define BOARD_DEBUG_SWD_SWDCLK_PIN_NAME SWCLK /*!< Pin name */
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317 #define BOARD_DEBUG_SWD_SWDCLK_LABEL "J2[4]/JS28/U4[4]/TCK-SWDCLK_TRGT-SPIFI_IO1" /*!< Label */
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318 #define BOARD_DEBUG_SWD_SWDCLK_NAME "DEBUG_SWD_SWDCLK" /*!< Identifier name */
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321 * @brief Configures pin routing and optionally pin electrical features.
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324 void BOARD_InitSWD_DEBUGPins(void); /* Function assigned for the Cortex-M0P */
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326 #if defined(__cplusplus)
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333 #endif /* _PIN_MUX_H_ */
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335 /*******************************************************************************
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337 ******************************************************************************/
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