1 ;*****************************************************************************/
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2 ; * @file startup_XMC1300.s
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3 ; * @brief CMSIS Cortex-M4 Core Device Startup File for
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4 ; * Infineon XMC1300 Device Series
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6 ; * @date 21. Jan. 2013
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9 ; * Copyright (C) 2009-2013 ARM Limited. All rights reserved.
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12 ; * ARM Limited (ARM) is supplying this software for use with Cortex-M
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13 ; * processor based microcontrollers. This file can be freely distributed
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14 ; * within development tools that are supporting such ARM based processors.
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17 ; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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18 ; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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19 ; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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20 ; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
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21 ; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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23 ; ******************************************************************************/
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26 ;* <<< Use Configuration Wizard in Context Menu >>>
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28 ; Amount of memory (in bytes) allocated for Stack
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29 ; Tailor this value to your application needs
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30 ; <h> Stack Configuration
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31 ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
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34 Stack_Size EQU 0x00000400
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36 AREA STACK, NOINIT, READWRITE, ALIGN=3
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37 Stack_Mem SPACE Stack_Size
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41 ; <h> Heap Configuration
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42 ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
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45 Heap_Size EQU 0x00000200
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47 AREA HEAP, NOINIT, READWRITE, ALIGN=3
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49 Heap_Mem SPACE Heap_Size
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52 ; <h> Clock system handling by SSW
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53 ; <h> CLK_VAL1 Configuration
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54 ; <o0.0..7> FDIV Fractional Divider Selection
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55 ; <o0.8..15> IDIV Divider Selection
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56 ; <0=> Divider is bypassed
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57 ; <1=> MCLK = 32 MHz
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58 ; <2=> MCLK = 16 MHz
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59 ; <3=> MCLK = 10.67 MHz
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61 ; <254=> MCLK = 126 kHz
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62 ; <255=> MCLK = 125.5 kHz
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63 ; <o0.16> PCLKSEL PCLK Clock Select
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65 ; <1=> PCLK = 2 x MCLK
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66 ; <o0.17..19> RTCCLKSEL RTC Clock Select
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67 ; <0=> 32.768kHz standby clock
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68 ; <1=> 32.768kHz external clock from ERU0.IOUT0
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69 ; <2=> 32.768kHz external clock from ACMP0.OUT
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70 ; <3=> 32.768kHz external clock from ACMP1.OUT
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71 ; <4=> 32.768kHz external clock from ACMP2.OUT
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75 ; <o0.31> do not move CLK_VAL1 to SCU_CLKCR[0..19]
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77 CLK_VAL1_Val EQU 0x80000000 ; 0xF0000000
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79 ; <h> CLK_VAL2 Configuration
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80 ; <o0.0> disable VADC and SHS Gating
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81 ; <o0.1> disable CCU80 Gating
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82 ; <o0.2> disable CCU40 Gating
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83 ; <o0.3> disable USIC0 Gating
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84 ; <o0.4> disable BCCU0 Gating
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85 ; <o0.5> disable LEDTS0 Gating
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86 ; <o0.6> disable LEDTS1 Gating
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87 ; <o0.7> disable POSIF0 Gating
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88 ; <o0.8> disable MATH Gating
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89 ; <o0.9> disable WDT Gating
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90 ; <o0.10> disable RTC Gating
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91 ; <o0.31> do not move CLK_VAL2 to SCU_CGATCLR0[0..10]
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93 CLK_VAL2_Val EQU 0x80000000 ; 0xF0000000
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99 ;* ================== START OF VECTOR TABLE DEFINITION ====================== */
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100 ;* Vector Table Mapped to Address 0 at Reset
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101 AREA RESET, DATA, READONLY
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103 EXPORT __Vectors_End
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104 EXPORT __Vectors_Size
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109 DCD __initial_sp ;* Top of Stack
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110 DCD Reset_Handler ;* Reset Handler
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113 DCD CLK_VAL1_Val ;* CLK_VAL1
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114 DCD CLK_VAL2_Val ;* CLK_VAL2
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117 __Vectors_Size EQU __Vectors_End - __Vectors
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119 ;* ================== END OF VECTOR TABLE DEFINITION ======================== */
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122 ;* ================== START OF VECTOR ROUTINES ============================== */
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123 AREA |.text|, CODE, READONLY
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127 EXPORT Reset_Handler [WEAK]
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131 ;* C routines are likely to be called. Setup the stack now
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132 LDR R0, =__initial_sp
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135 ; Following code initializes the Veneers at address 0x20000000 with a "branch to itself"
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136 ; The real veneers will be copied later from the scatter loader before reaching main.
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137 ; This init code should handle an exception before the real veneers are copied.
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138 SRAM_BASE EQU 0x20000000
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139 VENEER_INIT_CODE EQU 0xE7FEBF00 ; NOP, B .
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142 LDR R2, =VENEER_INIT_CODE
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143 MOVS R0, #48 ; Veneer 0..47
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151 LDR R0, =SystemInit
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155 ; SystemInit_DAVE3() is provided by DAVE3 code generation engine. It is
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156 ; weakly defined here though for a potential override.
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158 LDR R0, = SystemInit_DAVE3
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169 ;* ========================================================================== */
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173 ;* ========== START OF EXCEPTION HANDLER DEFINITION ========================= */
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174 ;* Default exception Handlers - Users may override this default functionality
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177 EXPORT NMI_Handler [WEAK]
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182 EXPORT HardFault_Handler [WEAK]
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187 EXPORT SVC_Handler [WEAK]
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192 EXPORT PendSV_Handler [WEAK]
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197 EXPORT SysTick_Handler [WEAK]
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201 ;* ============= END OF EXCEPTION HANDLER DEFINITION ======================== */
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204 ;* ============= START OF INTERRUPT HANDLER DEFINITION ====================== */
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207 Default_Handler PROC
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208 EXPORT SCU_0_IRQHandler [WEAK]
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209 EXPORT SCU_1_IRQHandler [WEAK]
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210 EXPORT SCU_2_IRQHandler [WEAK]
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211 EXPORT ERU0_0_IRQHandler [WEAK]
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212 EXPORT ERU0_1_IRQHandler [WEAK]
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213 EXPORT ERU0_2_IRQHandler [WEAK]
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214 EXPORT ERU0_3_IRQHandler [WEAK]
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215 EXPORT MATH0_0_IRQHandler [WEAK]
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216 EXPORT USIC0_0_IRQHandler [WEAK]
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217 EXPORT USIC0_1_IRQHandler [WEAK]
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218 EXPORT USIC0_2_IRQHandler [WEAK]
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219 EXPORT USIC0_3_IRQHandler [WEAK]
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220 EXPORT USIC0_4_IRQHandler [WEAK]
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221 EXPORT USIC0_5_IRQHandler [WEAK]
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222 EXPORT VADC0_C0_0_IRQHandler [WEAK]
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223 EXPORT VADC0_C0_1_IRQHandler [WEAK]
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224 EXPORT VADC0_G0_0_IRQHandler [WEAK]
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225 EXPORT VADC0_G0_1_IRQHandler [WEAK]
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226 EXPORT VADC0_G1_0_IRQHandler [WEAK]
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227 EXPORT VADC0_G1_1_IRQHandler [WEAK]
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228 EXPORT CCU40_0_IRQHandler [WEAK]
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229 EXPORT CCU40_1_IRQHandler [WEAK]
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230 EXPORT CCU40_2_IRQHandler [WEAK]
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231 EXPORT CCU40_3_IRQHandler [WEAK]
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232 EXPORT CCU80_0_IRQHandler [WEAK]
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233 EXPORT CCU80_1_IRQHandler [WEAK]
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234 EXPORT POSIF0_0_IRQHandler [WEAK]
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235 EXPORT POSIF0_1_IRQHandler [WEAK]
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236 EXPORT LEDTS0_0_IRQHandler [WEAK]
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237 EXPORT LEDTS1_0_IRQHandler [WEAK]
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238 EXPORT BCCU0_0_IRQHandler [WEAK]
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254 VADC0_C0_0_IRQHandler
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255 VADC0_C0_1_IRQHandler
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256 VADC0_G0_0_IRQHandler
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257 VADC0_G0_1_IRQHandler
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258 VADC0_G1_0_IRQHandler
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259 VADC0_G1_1_IRQHandler
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266 POSIF0_0_IRQHandler
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267 POSIF0_1_IRQHandler
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268 LEDTS0_0_IRQHandler
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269 LEDTS1_0_IRQHandler
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278 ;* ============= END OF INTERRUPT HANDLER DEFINITION ======================== */
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280 ;* Definition of the default weak SystemInit_DAVE3 function.
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281 ;* This function will be called by the CMSIS SystemInit function.
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282 ;* If DAVE3 requires an extended SystemInit it will create its own SystemInit_DAVE3
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283 ;* which will overule this weak definition
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284 SystemInit_DAVE3 PROC
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285 EXPORT SystemInit_DAVE3 [WEAK]
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290 ;* Definition of the default weak DAVE3 function for clock App usage.
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291 ;* AllowClkInitByStartup Handler */
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292 AllowClkInitByStartup PROC
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293 EXPORT AllowClkInitByStartup [WEAK]
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299 ;*******************************************************************************
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300 ; User Stack and Heap initialization
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301 ;*******************************************************************************
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304 EXPORT __initial_sp
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306 EXPORT __heap_limit
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310 IMPORT __use_two_region_memory
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311 EXPORT __user_initial_stackheap
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313 __user_initial_stackheap
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316 LDR R1, =(Stack_Mem + Stack_Size)
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317 LDR R2, = (Heap_Mem + Heap_Size)
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318 LDR R3, = Stack_Mem
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326 ;* ================== START OF INTERRUPT HANDLER VENEERS ==================== */
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327 ; Veneers are located to fix SRAM Address 0x2000'0000
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328 AREA |.ARM.__at_0x20000000|, CODE, READWRITE
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330 ; Each Veneer has exactly a lengs of 4 Byte
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333 STAYHERE $IrqNumber
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334 LDR R0, =$IrqNumber
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344 STAYHERE 0x0 ;* Reserved
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345 STAYHERE 0x1 ;* Reserved
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346 STAYHERE 0x2 ;* Reserved
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347 JUMPTO HardFault_Handler ;* HardFault Veneer
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348 STAYHERE 0x4 ;* Reserved
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349 STAYHERE 0x5 ;* Reserved
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350 STAYHERE 0x6 ;* Reserved
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351 STAYHERE 0x7 ;* Reserved
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352 STAYHERE 0x8 ;* Reserved
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353 STAYHERE 0x9 ;* Reserved
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354 STAYHERE 0xA ;* Reserved
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355 JUMPTO SVC_Handler ;* SVC Veneer
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356 STAYHERE 0xC ;* Reserved
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357 STAYHERE 0xD ;* Reserved
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358 JUMPTO PendSV_Handler ;* PendSV Veneer
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359 JUMPTO SysTick_Handler ;* SysTick Veneer
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360 JUMPTO SCU_0_IRQHandler ;* SCU_0 Veneer
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361 JUMPTO SCU_1_IRQHandler ;* SCU_1 Veneer
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362 JUMPTO SCU_2_IRQHandler ;* SCU_2 Veneer
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363 JUMPTO ERU0_0_IRQHandler ;* SCU_3 Veneer
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364 JUMPTO ERU0_1_IRQHandler ;* SCU_4 Veneer
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365 JUMPTO ERU0_2_IRQHandler ;* SCU_5 Veneer
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366 JUMPTO ERU0_3_IRQHandler ;* SCU_6 Veneer
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367 JUMPTO MATH0_0_IRQHandler ;* SCU_7 Veneer
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368 STAYHERE 0x18 ;* Reserved
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369 JUMPTO USIC0_0_IRQHandler ;* USIC0_0 Veneer
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370 JUMPTO USIC0_1_IRQHandler ;* USIC0_1 Veneer
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371 JUMPTO USIC0_2_IRQHandler ;* USIC0_2 Veneer
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372 JUMPTO USIC0_3_IRQHandler ;* USIC0_3 Veneer
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373 JUMPTO USIC0_4_IRQHandler ;* USIC0_4 Veneer
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374 JUMPTO LEDTS0_0_IRQHandler ;* USIC0_5 Veneer
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375 JUMPTO VADC0_C0_0_IRQHandler ;* VADC0_C0_0 Veneer
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376 JUMPTO VADC0_C0_1_IRQHandler ;* VADC0_C0_1 Veneer
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377 JUMPTO VADC0_G0_0_IRQHandler ;* VADC0_G0_0 Veneer
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378 JUMPTO VADC0_G0_1_IRQHandler ;* VADC0_G0_1 Veneer
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379 JUMPTO VADC0_G1_0_IRQHandler ;* VADC0_G1_0 Veneer
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380 JUMPTO VADC0_G1_1_IRQHandler ;* VADC0_G1_1 Veneer
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381 JUMPTO CCU40_0_IRQHandler ;* CCU40_0 Veneer
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382 JUMPTO CCU40_1_IRQHandler ;* CCU40_1 Veneer
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383 JUMPTO CCU40_2_IRQHandler ;* CCU40_2 Veneer
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384 JUMPTO CCU40_3_IRQHandler ;* CCU40_3 Veneer
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385 JUMPTO CCU80_0_IRQHandler ;* CCU80_0 Veneer
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386 JUMPTO CCU80_1_IRQHandler ;* CCU80_1 Veneer
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387 JUMPTO POSIF0_0_IRQHandler ;* POSIF0_0 Veneer
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388 JUMPTO POSIF0_1_IRQHandler ;* POSIF0_1 Veneer
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389 JUMPTO LEDTS0_0_IRQHandler ;* LEDTS0_0 Veneer
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390 JUMPTO LEDTS1_0_IRQHandler ;* LEDTS1_0 Veneer
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391 JUMPTO BCCU0_0_IRQHandler ;* BCCU0_0 Veneer
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395 ;* ================== END OF INTERRUPT HANDLER VENEERS ====================== */
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