2 ******************************************************************************
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3 * @file stm32f0xx_i2c.c
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4 * @author MCD Application Team
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6 * @date 27-January-2012
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7 * @brief This file provides firmware functions to manage the following
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8 * functionalities of the Inter-Integrated circuit (I2C):
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9 * + Initialization and Configuration
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10 * + Communications handling
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11 * + SMBUS management
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12 * + I2C registers management
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13 * + Data transfers management
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14 * + DMA transfers management
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15 * + Interrupts and flags management
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18 ============================================================================
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19 ##### How to use this driver #####
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20 ============================================================================
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22 (#) Enable peripheral clock using RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2Cx, ENABLE)
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23 function for I2C1 or I2C2.
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24 (#) Enable SDA, SCL and SMBA (when used) GPIO clocks using
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25 RCC_AHBPeriphClockCmd() function.
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26 (#) Peripherals alternate function:
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27 (++) Connect the pin to the desired peripherals' Alternate
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28 Function (AF) using GPIO_PinAFConfig() function.
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29 (++) Configure the desired pin in alternate function by:
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30 GPIO_InitStruct->GPIO_Mode = GPIO_Mode_AF
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31 (++) Select the type, OpenDrain and speed via
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32 GPIO_PuPd, GPIO_OType and GPIO_Speed members
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33 (++) Call GPIO_Init() function.
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34 (#) Program the Mode, Timing , Own address, Ack and Acknowledged Address
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35 using the I2C_Init() function.
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36 (#) Optionally you can enable/configure the following parameters without
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37 re-initialization (i.e there is no need to call again I2C_Init() function):
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38 (++) Enable the acknowledge feature using I2C_AcknowledgeConfig() function.
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39 (++) Enable the dual addressing mode using I2C_DualAddressCmd() function.
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40 (++) Enable the general call using the I2C_GeneralCallCmd() function.
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41 (++) Enable the clock stretching using I2C_StretchClockCmd() function.
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42 (++) Enable the PEC Calculation using I2C_CalculatePEC() function.
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43 (++) For SMBus Mode:
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44 (+++) Enable the SMBusAlert pin using I2C_SMBusAlertCmd() function.
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45 (#) Enable the NVIC and the corresponding interrupt using the function
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46 I2C_ITConfig() if you need to use interrupt mode.
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47 (#) When using the DMA mode
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48 (++) Configure the DMA using DMA_Init() function.
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49 (++) Active the needed channel Request using I2C_DMACmd() function.
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50 (#) Enable the I2C using the I2C_Cmd() function.
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51 (#) Enable the DMA using the DMA_Cmd() function when using DMA mode in the
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54 (@) When using I2C in Fast Mode Plus, SCL and SDA pin 20mA current drive capability
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55 must be enabled by setting the driving capability control bit in SYSCFG.
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58 ******************************************************************************
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61 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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62 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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63 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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64 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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65 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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66 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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68 * FOR MORE INFORMATION PLEASE READ CAREFULLY THE LICENSE AGREEMENT FILE
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69 * LOCATED IN THE ROOT DIRECTORY OF THIS FIRMWARE PACKAGE.
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71 * <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
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72 ******************************************************************************
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75 /* Includes ------------------------------------------------------------------*/
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76 #include "stm32f0xx_i2c.h"
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77 #include "stm32f0xx_rcc.h"
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79 /** @addtogroup STM32F0xx_StdPeriph_Driver
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84 * @brief I2C driver modules
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88 /* Private typedef -----------------------------------------------------------*/
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89 /* Private define ------------------------------------------------------------*/
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91 #define CR1_CLEAR_MASK ((uint32_t)0x00CFE0FF) /*<! I2C CR1 clear register Mask */
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92 #define CR2_CLEAR_MASK ((uint32_t)0x07FF7FFF) /*<! I2C CR2 clear register Mask */
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93 #define TIMING_CLEAR_MASK ((uint32_t)0xF0FFFFFF) /*<! I2C TIMING clear register Mask */
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95 /* Private macro -------------------------------------------------------------*/
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96 /* Private variables ---------------------------------------------------------*/
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97 /* Private function prototypes -----------------------------------------------*/
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98 /* Private functions ---------------------------------------------------------*/
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100 /** @defgroup I2C_Private_Functions
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105 /** @defgroup I2C_Group1 Initialization and Configuration functions
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106 * @brief Initialization and Configuration functions
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109 ===============================================================================
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110 ##### Initialization and Configuration functions #####
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111 ===============================================================================
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112 [..] This section provides a set of functions allowing to initialize the I2C Mode,
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113 I2C Timing, I2C filters, I2C Addressing mode, I2C OwnAddress1.
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115 [..] The I2C_Init() function follows the I2C configuration procedures (these procedures
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116 are available in reference manual).
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118 [..] When the Software Reset is performed using I2C_SoftwareResetCmd() function, the internal
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119 states machines are reset and communication control bits, as well as status bits come
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120 back to their reset value.
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122 [..] Before enabling Stop mode using I2C_StopModeCmd() I2C Clock source must be set to
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123 HSI and Digital filters must be disabled.
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125 [..] Before enabling Own Address 2 via I2C_DualAddressCmd() function, OA2 and mask should be
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126 configured using I2C_OwnAddress2Config() function.
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128 [..] I2C_SlaveByteControlCmd() enable Slave byte control that allow user to get control of
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129 each byte in slave mode when NBYTES is set to 0x01.
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136 * @brief Deinitializes the I2Cx peripheral registers to their default reset values.
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137 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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140 void I2C_DeInit(I2C_TypeDef* I2Cx)
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142 /* Check the parameters */
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143 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
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147 /* Enable I2C1 reset state */
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148 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, ENABLE);
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149 /* Release I2C1 from reset state */
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150 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, DISABLE);
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154 /* Enable I2C2 reset state */
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155 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, ENABLE);
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156 /* Release I2C2 from reset state */
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157 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, DISABLE);
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162 * @brief Initializes the I2Cx peripheral according to the specified
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163 * parameters in the I2C_InitStruct.
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164 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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165 * @param I2C_InitStruct: pointer to a I2C_InitTypeDef structure that
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166 * contains the configuration information for the specified I2C peripheral.
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169 void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct)
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171 uint32_t tmpreg = 0;
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173 /* Check the parameters */
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174 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
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175 assert_param(IS_I2C_ANALOG_FILTER(I2C_InitStruct->I2C_AnalogFilter));
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176 assert_param(IS_I2C_DIGITAL_FILTER(I2C_InitStruct->I2C_DigitalFilter));
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177 assert_param(IS_I2C_MODE(I2C_InitStruct->I2C_Mode));
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178 assert_param(IS_I2C_OWN_ADDRESS1(I2C_InitStruct->I2C_OwnAddress1));
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179 assert_param(IS_I2C_ACK(I2C_InitStruct->I2C_Ack));
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180 assert_param(IS_I2C_ACKNOWLEDGE_ADDRESS(I2C_InitStruct->I2C_AcknowledgedAddress));
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182 /* Disable I2Cx Peripheral */
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183 I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_PE);
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185 /*---------------------------- I2Cx FILTERS Configuration ------------------*/
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186 /* Get the I2Cx CR1 value */
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187 tmpreg = I2Cx->CR1;
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188 /* Clear I2Cx CR1 register */
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189 tmpreg &= CR1_CLEAR_MASK;
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190 /* Configure I2Cx: analog and digital filter */
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191 /* Set ANFOFF bit according to I2C_AnalogFilter value */
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192 /* Set DFN bits according to I2C_DigitalFilter value */
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193 tmpreg |= (uint32_t)I2C_InitStruct->I2C_AnalogFilter |(I2C_InitStruct->I2C_DigitalFilter << 8);
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195 /* Write to I2Cx CR1 */
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196 I2Cx->CR1 = tmpreg;
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198 /*---------------------------- I2Cx TIMING Configuration -------------------*/
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199 /* Configure I2Cx: Timing */
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200 /* Set TIMINGR bits according to I2C_Timing */
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201 /* Write to I2Cx TIMING */
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202 I2Cx->TIMINGR = I2C_InitStruct->I2C_Timing & TIMING_CLEAR_MASK;
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204 /* Enable I2Cx Peripheral */
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205 I2Cx->CR1 |= I2C_CR1_PE;
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207 /*---------------------------- I2Cx OAR1 Configuration ---------------------*/
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208 /* Clear tmpreg local variable */
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210 /* Clear OAR1 register */
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211 I2Cx->OAR1 = (uint32_t)tmpreg;
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212 /* Clear OAR2 register */
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213 I2Cx->OAR2 = (uint32_t)tmpreg;
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214 /* Configure I2Cx: Own Address1 and acknowledged address */
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215 /* Set OA1MODE bit according to I2C_AcknowledgedAddress value */
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216 /* Set OA1 bits according to I2C_OwnAddress1 value */
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217 tmpreg = (uint32_t)((uint32_t)I2C_InitStruct->I2C_AcknowledgedAddress | \
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218 (uint32_t)I2C_InitStruct->I2C_OwnAddress1);
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219 /* Write to I2Cx OAR1 */
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220 I2Cx->OAR1 = tmpreg;
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221 /* Enable Own Address1 acknowledgement */
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222 I2Cx->OAR1 |= I2C_OAR1_OA1EN;
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224 /*---------------------------- I2Cx MODE Configuration ---------------------*/
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225 /* Configure I2Cx: mode */
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226 /* Set SMBDEN and SMBHEN bits according to I2C_Mode value */
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227 tmpreg = I2C_InitStruct->I2C_Mode;
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228 /* Write to I2Cx CR1 */
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229 I2Cx->CR1 |= tmpreg;
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231 /*---------------------------- I2Cx ACK Configuration ----------------------*/
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232 /* Get the I2Cx CR2 value */
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233 tmpreg = I2Cx->CR2;
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234 /* Clear I2Cx CR2 register */
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235 tmpreg &= CR2_CLEAR_MASK;
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236 /* Configure I2Cx: acknowledgement */
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237 /* Set NACK bit according to I2C_Ack value */
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238 tmpreg |= I2C_InitStruct->I2C_Ack;
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239 /* Write to I2Cx CR2 */
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240 I2Cx->CR2 = tmpreg;
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244 * @brief Fills each I2C_InitStruct member with its default value.
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245 * @param I2C_InitStruct: pointer to an I2C_InitTypeDef structure which will be initialized.
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248 void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct)
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250 /*---------------- Reset I2C init structure parameters values --------------*/
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251 /* Initialize the I2C_Timing member */
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252 I2C_InitStruct->I2C_Timing = 0;
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253 /* Initialize the I2C_AnalogFilter member */
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254 I2C_InitStruct->I2C_AnalogFilter = I2C_AnalogFilter_Enable;
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255 /* Initialize the I2C_DigitalFilter member */
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256 I2C_InitStruct->I2C_DigitalFilter = 0;
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257 /* Initialize the I2C_Mode member */
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258 I2C_InitStruct->I2C_Mode = I2C_Mode_I2C;
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259 /* Initialize the I2C_OwnAddress1 member */
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260 I2C_InitStruct->I2C_OwnAddress1 = 0;
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261 /* Initialize the I2C_Ack member */
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262 I2C_InitStruct->I2C_Ack = I2C_Ack_Disable;
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263 /* Initialize the I2C_AcknowledgedAddress member */
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264 I2C_InitStruct->I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit;
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268 * @brief Enables or disables the specified I2C peripheral.
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269 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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270 * @param NewState: new state of the I2Cx peripheral.
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271 * This parameter can be: ENABLE or DISABLE.
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274 void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
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276 /* Check the parameters */
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277 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
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278 assert_param(IS_FUNCTIONAL_STATE(NewState));
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279 if (NewState != DISABLE)
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281 /* Enable the selected I2C peripheral */
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282 I2Cx->CR1 |= I2C_CR1_PE;
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286 /* Disable the selected I2C peripheral */
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287 I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_PE);
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292 * @brief Enables or disables the specified I2C software reset.
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293 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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294 * @param NewState: new state of the I2C software reset.
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295 * This parameter can be: ENABLE or DISABLE.
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298 void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
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300 /* Check the parameters */
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301 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
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302 assert_param(IS_FUNCTIONAL_STATE(NewState));
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303 if (NewState != DISABLE)
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305 /* Peripheral under reset */
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306 I2Cx->CR1 |= I2C_CR1_SWRST;
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310 /* Peripheral not under reset */
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311 I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_SWRST);
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316 * @brief Enables or disables the specified I2C interrupts.
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317 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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318 * @param I2C_IT: specifies the I2C interrupts sources to be enabled or disabled.
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319 * This parameter can be any combination of the following values:
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320 * @arg I2C_IT_ERRI: Error interrupt mask
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321 * @arg I2C_IT_TCI: Transfer Complete interrupt mask
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322 * @arg I2C_IT_STOPI: Stop Detection interrupt mask
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323 * @arg I2C_IT_NACKI: Not Acknowledge received interrupt mask
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324 * @arg I2C_IT_ADDRI: Address Match interrupt mask
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325 * @arg I2C_IT_RXI: RX interrupt mask
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326 * @arg I2C_IT_TXI: TX interrupt mask
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327 * @param NewState: new state of the specified I2C interrupts.
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328 * This parameter can be: ENABLE or DISABLE.
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331 void I2C_ITConfig(I2C_TypeDef* I2Cx, uint32_t I2C_IT, FunctionalState NewState)
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333 /* Check the parameters */
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334 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
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335 assert_param(IS_FUNCTIONAL_STATE(NewState));
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336 assert_param(IS_I2C_CONFIG_IT(I2C_IT));
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338 if (NewState != DISABLE)
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340 /* Enable the selected I2C interrupts */
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341 I2Cx->CR1 |= I2C_IT;
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345 /* Disable the selected I2C interrupts */
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346 I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_IT);
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351 * @brief Enables or disables the I2C Clock stretching.
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352 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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353 * @param NewState: new state of the I2Cx Clock stretching.
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354 * This parameter can be: ENABLE or DISABLE.
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357 void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
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359 /* Check the parameters */
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360 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
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361 assert_param(IS_FUNCTIONAL_STATE(NewState));
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363 if (NewState != DISABLE)
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365 /* Enable clock stretching */
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366 I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_NOSTRETCH);
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370 /* Disable clock stretching */
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371 I2Cx->CR1 |= I2C_CR1_NOSTRETCH;
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376 * @brief Enables or disables I2C wakeup from stop mode.
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377 * @param I2Cx: where x can be 1 to select the I2C peripheral.
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378 * @param NewState: new state of the I2Cx stop mode.
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379 * This parameter can be: ENABLE or DISABLE.
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382 void I2C_StopModeCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
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384 /* Check the parameters */
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385 assert_param(IS_I2C_1_PERIPH(I2Cx));
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386 assert_param(IS_FUNCTIONAL_STATE(NewState));
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388 if (NewState != DISABLE)
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390 /* Enable wakeup from stop mode */
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391 I2Cx->CR1 |= I2C_CR1_WUPEN;
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395 /* Disable wakeup from stop mode */
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396 I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_WUPEN);
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401 * @brief Enables or disables the I2C own address 2.
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402 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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403 * @param NewState: new state of the I2C own address 2.
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404 * This parameter can be: ENABLE or DISABLE.
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407 void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
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409 /* Check the parameters */
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410 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
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411 assert_param(IS_FUNCTIONAL_STATE(NewState));
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413 if (NewState != DISABLE)
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415 /* Enable own address 2 */
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416 I2Cx->OAR2 |= I2C_OAR2_OA2EN;
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420 /* Disable own address 2 */
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421 I2Cx->OAR2 &= (uint32_t)~((uint32_t)I2C_OAR2_OA2EN);
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426 * @brief Configures the I2C slave own address 2 and mask.
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427 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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428 * @param Address: specifies the slave address to be programmed.
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429 * @param Mask: specifies own address 2 mask to be programmed.
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430 * This parameter can be one of the following values:
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431 * @arg I2C_OA2_NoMask: no mask.
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432 * @arg I2C_OA2_Mask01: OA2[1] is masked and don't care.
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433 * @arg I2C_OA2_Mask02: OA2[2:1] are masked and don't care.
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434 * @arg I2C_OA2_Mask03: OA2[3:1] are masked and don't care.
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435 * @arg I2C_OA2_Mask04: OA2[4:1] are masked and don't care.
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436 * @arg I2C_OA2_Mask05: OA2[5:1] are masked and don't care.
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437 * @arg I2C_OA2_Mask06: OA2[6:1] are masked and don't care.
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438 * @arg I2C_OA2_Mask07: OA2[7:1] are masked and don't care.
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441 void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint16_t Address, uint8_t Mask)
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443 uint32_t tmpreg = 0;
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445 /* Check the parameters */
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446 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
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447 assert_param(IS_I2C_OWN_ADDRESS2(Address));
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448 assert_param(IS_I2C_OWN_ADDRESS2_MASK(Mask));
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450 /* Get the old register value */
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451 tmpreg = I2Cx->OAR2;
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453 /* Reset I2Cx OA2 bit [7:1] and OA2MSK bit [1:0] */
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454 tmpreg &= (uint32_t)~((uint32_t)(I2C_OAR2_OA2 | I2C_OAR2_OA2MSK));
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456 /* Set I2Cx SADD */
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457 tmpreg |= (uint32_t)(((uint32_t)Address & I2C_OAR2_OA2) | \
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458 (((uint32_t)Mask << 8) & I2C_OAR2_OA2MSK)) ;
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460 /* Store the new register value */
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461 I2Cx->OAR2 = tmpreg;
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465 * @brief Enables or disables the I2C general call mode.
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466 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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467 * @param NewState: new state of the I2C general call mode.
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468 * This parameter can be: ENABLE or DISABLE.
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471 void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
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473 /* Check the parameters */
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474 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
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475 assert_param(IS_FUNCTIONAL_STATE(NewState));
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477 if (NewState != DISABLE)
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479 /* Enable general call mode */
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480 I2Cx->CR1 |= I2C_CR1_GCEN;
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484 /* Disable general call mode */
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485 I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_GCEN);
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490 * @brief Enables or disables the I2C slave byte control.
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491 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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492 * @param NewState: new state of the I2C slave byte control.
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493 * This parameter can be: ENABLE or DISABLE.
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496 void I2C_SlaveByteControlCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
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498 /* Check the parameters */
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499 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
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500 assert_param(IS_FUNCTIONAL_STATE(NewState));
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502 if (NewState != DISABLE)
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504 /* Enable slave byte control */
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505 I2Cx->CR1 |= I2C_CR1_SBC;
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509 /* Disable slave byte control */
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510 I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_SBC);
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515 * @brief Configures the slave address to be transmitted after start generation.
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516 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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517 * @param Address: specifies the slave address to be programmed.
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518 * @note This function should be called before generating start condition.
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521 void I2C_SlaveAddressConfig(I2C_TypeDef* I2Cx, uint16_t Address)
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523 uint32_t tmpreg = 0;
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525 /* Check the parameters */
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526 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
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527 assert_param(IS_I2C_SLAVE_ADDRESS(Address));
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529 /* Get the old register value */
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530 tmpreg = I2Cx->CR2;
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532 /* Reset I2Cx SADD bit [9:0] */
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533 tmpreg &= (uint32_t)~((uint32_t)I2C_CR2_SADD);
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535 /* Set I2Cx SADD */
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536 tmpreg |= (uint32_t)((uint32_t)Address & I2C_CR2_SADD);
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538 /* Store the new register value */
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539 I2Cx->CR2 = tmpreg;
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543 * @brief Enables or disables the I2C 10-bit addressing mode for the master.
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544 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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545 * @param NewState: new state of the I2C 10-bit addressing mode.
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546 * This parameter can be: ENABLE or DISABLE.
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547 * @note This function should be called before generating start condition.
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550 void I2C_10BitAddressingModeCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
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552 /* Check the parameters */
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553 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
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554 assert_param(IS_FUNCTIONAL_STATE(NewState));
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556 if (NewState != DISABLE)
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558 /* Enable 10-bit addressing mode */
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559 I2Cx->CR2 |= I2C_CR2_ADD10;
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563 /* Disable 10-bit addressing mode */
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564 I2Cx->CR2 &= (uint32_t)~((uint32_t)I2C_CR2_ADD10);
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573 /** @defgroup I2C_Group2 Communications handling functions
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574 * @brief Communications handling functions
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577 ===============================================================================
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578 ##### Communications handling functions #####
\r
579 ===============================================================================
\r
580 [..] This section provides a set of functions that handles I2C communication.
\r
582 [..] Automatic End mode is enabled using I2C_AutoEndCmd() function. When Reload
\r
583 mode is enabled via I2C_ReloadCmd() AutoEnd bit has no effect.
\r
585 [..] I2C_NumberOfBytesConfig() function set the number of bytes to be transferred,
\r
586 this configuration should be done before generating start condition in master
\r
589 [..] When switching from master write operation to read operation in 10Bit addressing
\r
590 mode, master can only sends the 1st 7 bits of the 10 bit address, followed by
\r
591 Read direction by enabling HEADR bit using I2C_10BitAddressHeader() function.
\r
593 [..] In master mode, when transferring more than 255 bytes Reload mode should be used
\r
594 to handle communication. In the first phase of transfer, Nbytes should be set to
\r
595 255. After transferring these bytes TCR flag is set and I2C_TCRTransferHandling()
\r
596 function should be called to handle remaining communication.
\r
598 [..] In master mode, when software end mode is selected when all data is transferred
\r
599 TC flag is set I2C_TCRTransferHandling() function should be called to generate STOP
\r
600 or generate ReStart.
\r
607 * @brief Enables or disables the I2C automatic end mode (stop condition is
\r
608 * automatically sent when nbytes data are transferred).
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609 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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610 * @param NewState: new state of the I2C automatic end mode.
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611 * This parameter can be: ENABLE or DISABLE.
\r
612 * @note This function has effect if Reload mode is disabled.
\r
615 void I2C_AutoEndCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
\r
617 /* Check the parameters */
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618 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
\r
619 assert_param(IS_FUNCTIONAL_STATE(NewState));
\r
621 if (NewState != DISABLE)
\r
623 /* Enable Auto end mode */
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624 I2Cx->CR2 |= I2C_CR2_AUTOEND;
\r
628 /* Disable Auto end mode */
\r
629 I2Cx->CR2 &= (uint32_t)~((uint32_t)I2C_CR2_AUTOEND);
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634 * @brief Enables or disables the I2C nbytes reload mode.
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635 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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636 * @param NewState: new state of the nbytes reload mode.
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637 * This parameter can be: ENABLE or DISABLE.
\r
640 void I2C_ReloadCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
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642 /* Check the parameters */
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643 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
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644 assert_param(IS_FUNCTIONAL_STATE(NewState));
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646 if (NewState != DISABLE)
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648 /* Enable Auto Reload mode */
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649 I2Cx->CR2 |= I2C_CR2_RELOAD;
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653 /* Disable Auto Reload mode */
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654 I2Cx->CR2 &= (uint32_t)~((uint32_t)I2C_CR2_RELOAD);
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659 * @brief Configures the number of bytes to be transmitted/received.
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660 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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661 * @param Number_Bytes: specifies the number of bytes to be programmed.
\r
664 void I2C_NumberOfBytesConfig(I2C_TypeDef* I2Cx, uint16_t Number_Bytes)
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666 uint32_t tmpreg = 0;
\r
668 /* Check the parameters */
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669 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
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671 /* Get the old register value */
\r
672 tmpreg = I2Cx->CR2;
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674 /* Reset I2Cx Nbytes bit [7:0] */
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675 tmpreg &= (uint32_t)~((uint32_t)I2C_CR2_NBYTES);
\r
677 /* Set I2Cx Nbytes */
\r
678 tmpreg |= (uint32_t)(((uint32_t)Number_Bytes << 16 ) & I2C_CR2_NBYTES);
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680 /* Store the new register value */
\r
681 I2Cx->CR2 = tmpreg;
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685 * @brief Configures the type of transfer request for the master.
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686 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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687 * @param I2C_Direction: specifies the transfer request direction to be programmed.
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688 * This parameter can be one of the following values:
\r
689 * @arg I2C_Direction_Transmitter: Master request a write transfer
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690 * @arg I2C_Direction_Receiver: Master request a read transfer
\r
693 void I2C_MasterRequestConfig(I2C_TypeDef* I2Cx, uint16_t I2C_Direction)
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695 /* Check the parameters */
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696 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
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697 assert_param(IS_I2C_DIRECTION(I2C_Direction));
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699 /* Test on the direction to set/reset the read/write bit */
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700 if (I2C_Direction == I2C_Direction_Transmitter)
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702 /* Request a write Transfer */
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703 I2Cx->CR2 &= (uint32_t)~((uint32_t)I2C_CR2_RD_WRN);
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707 /* Request a read Transfer */
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708 I2Cx->CR2 |= I2C_CR2_RD_WRN;
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713 * @brief Generates I2Cx communication START condition.
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714 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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715 * @param NewState: new state of the I2C START condition generation.
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716 * This parameter can be: ENABLE or DISABLE.
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719 void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState)
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721 /* Check the parameters */
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722 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
\r
723 assert_param(IS_FUNCTIONAL_STATE(NewState));
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725 if (NewState != DISABLE)
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727 /* Generate a START condition */
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728 I2Cx->CR2 |= I2C_CR2_START;
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732 /* Disable the START condition generation */
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733 I2Cx->CR2 &= (uint32_t)~((uint32_t)I2C_CR2_START);
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738 * @brief Generates I2Cx communication STOP condition.
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739 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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740 * @param NewState: new state of the I2C STOP condition generation.
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741 * This parameter can be: ENABLE or DISABLE.
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744 void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState)
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746 /* Check the parameters */
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747 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
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748 assert_param(IS_FUNCTIONAL_STATE(NewState));
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750 if (NewState != DISABLE)
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752 /* Generate a STOP condition */
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753 I2Cx->CR2 |= I2C_CR2_STOP;
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757 /* Disable the STOP condition generation */
\r
758 I2Cx->CR2 &= (uint32_t)~((uint32_t)I2C_CR2_STOP);
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763 * @brief Enables or disables the I2C 10-bit header only mode with read direction.
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764 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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765 * @param NewState: new state of the I2C 10-bit header only mode.
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766 * This parameter can be: ENABLE or DISABLE.
\r
767 * @note This mode can be used only when switching from master transmitter mode
\r
768 * to master receiver mode.
\r
771 void I2C_10BitAddressHeaderCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
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773 /* Check the parameters */
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774 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
\r
775 assert_param(IS_FUNCTIONAL_STATE(NewState));
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777 if (NewState != DISABLE)
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779 /* Enable 10-bit header only mode */
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780 I2Cx->CR2 |= I2C_CR2_HEAD10R;
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784 /* Disable 10-bit header only mode */
\r
785 I2Cx->CR2 &= (uint32_t)~((uint32_t)I2C_CR2_HEAD10R);
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790 * @brief Generates I2C communication Acknowledge.
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791 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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792 * @param NewState: new state of the Acknowledge.
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793 * This parameter can be: ENABLE or DISABLE.
\r
796 void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState)
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798 /* Check the parameters */
\r
799 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
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800 assert_param(IS_FUNCTIONAL_STATE(NewState));
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802 if (NewState != DISABLE)
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804 /* Enable ACK generation */
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805 I2Cx->CR2 &= (uint32_t)~((uint32_t)I2C_CR2_NACK);
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809 /* Enable NACK generation */
\r
810 I2Cx->CR2 |= I2C_CR2_NACK;
\r
815 * @brief Returns the I2C slave matched address .
\r
816 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
\r
817 * @retval The value of the slave matched address .
\r
819 uint8_t I2C_GetAddressMatched(I2C_TypeDef* I2Cx)
\r
821 /* Check the parameters */
\r
822 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
\r
824 /* Return the slave matched address in the SR1 register */
\r
825 return (uint8_t)(((uint32_t)I2Cx->ISR & I2C_ISR_ADDCODE) >> 16) ;
\r
829 * @brief Returns the I2C slave received request.
\r
830 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
\r
831 * @retval The value of the received request.
\r
833 uint16_t I2C_GetTransferDirection(I2C_TypeDef* I2Cx)
\r
835 uint32_t tmpreg = 0;
\r
836 uint16_t direction = 0;
\r
838 /* Check the parameters */
\r
839 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
\r
841 /* Return the slave matched address in the SR1 register */
\r
842 tmpreg = (uint32_t)(I2Cx->ISR & I2C_ISR_DIR);
\r
844 /* If write transfer is requested */
\r
847 /* write transfer is requested */
\r
848 direction = I2C_Direction_Transmitter;
\r
852 /* Read transfer is requested */
\r
853 direction = I2C_Direction_Receiver;
\r
859 * @brief Handles I2Cx communication when TCR flag is set.
\r
860 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
\r
861 * @param Number_Bytes: specifies the number of bytes to be programmed.
\r
862 * This parameter must be a value between 0 and 255.
\r
863 * @param ReloadEndMode: new state of the I2C START condition generation.
\r
864 * This parameter can be one of the following values:
\r
865 * @arg I2C_Reload_Mode: Enable Reload mode .
\r
866 * @arg I2C_AutoEnd_Mode: Enable Automatic end mode.
\r
867 * @arg I2C_SoftEnd_Mode: Enable Software end mode.
\r
870 void I2C_TCRTransferHandling(I2C_TypeDef* I2Cx, uint16_t Number_Bytes, uint32_t ReloadEndMode)
\r
872 uint32_t tmpreg = 0;
\r
874 /* Check the parameters */
\r
875 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
\r
876 assert_param(IS_RELOAD_END_MODE(ReloadEndMode));
\r
878 /* Get the CR2 register value */
\r
879 tmpreg = I2Cx->CR2;
\r
881 /* clear tmpreg specific bits */
\r
882 tmpreg &= (uint32_t)~((uint32_t)(I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND ));
\r
884 /* update tmpreg */
\r
885 tmpreg |= (uint32_t)((((uint32_t)Number_Bytes << 16 ) & I2C_CR2_NBYTES) | (uint32_t)ReloadEndMode);
\r
887 /* update CR2 register */
\r
888 I2Cx->CR2 = tmpreg;
\r
892 * @brief Handles I2Cx communication when TC flag is set.
\r
893 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
\r
894 * @param Number_Bytes: specifies the number of bytes to be programmed.
\r
895 * This parameter must be a value between 0 and 255.
\r
896 * @param StartStopMode: new state of the I2C START condition generation.
\r
897 * This parameter can be one of the following values:
\r
898 * @arg I2C_Generate_Stop: Generate stop condition (Number_Bytes should be set to 0).
\r
899 * @arg I2C_Generate_Start_Read: Generate Restart for read request.
\r
900 * @arg I2C_Generate_Start_Write: Generate Restart for write request.
\r
903 void I2C_TCTransferHandling(I2C_TypeDef* I2Cx, uint16_t Number_Bytes, uint32_t StartStopMode)
\r
905 uint32_t tmpreg = 0;
\r
907 /* Check the parameters */
\r
908 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
\r
909 assert_param(IS_START_STOP_MODE(StartStopMode));
\r
911 /* Get the CR2 register value */
\r
912 tmpreg = I2Cx->CR2;
\r
914 /* clear tmpreg specific bits */
\r
915 tmpreg &= (uint32_t)~((uint32_t)(I2C_CR2_NBYTES | I2C_CR2_START | I2C_CR2_STOP | I2C_CR2_RD_WRN ));
\r
917 /* update tmpreg */
\r
918 tmpreg |= (uint32_t)((((uint32_t)Number_Bytes << 16 ) & (uint32_t)I2C_CR2_NBYTES) | (uint32_t)StartStopMode);
\r
920 /* update CR2 register */
\r
921 I2Cx->CR2 = tmpreg;
\r
929 /** @defgroup I2C_Group3 SMBUS management functions
\r
930 * @brief SMBUS management functions
\r
933 ===============================================================================
\r
934 ##### SMBUS management functions #####
\r
935 ===============================================================================
\r
936 [..] This section provides a set of functions that handles SMBus communication
\r
937 and timeouts detection.
\r
939 [..] The SMBus Device default address (0b1100 001) is enabled by calling I2C_Init()
\r
940 function and setting I2C_Mode member of I2C_InitTypeDef() structure to
\r
941 I2C_Mode_SMBusDevice.
\r
943 [..] The SMBus Host address (0b0001 000) is enabled by calling I2C_Init()
\r
944 function and setting I2C_Mode member of I2C_InitTypeDef() structure to
\r
945 I2C_Mode_SMBusHost.
\r
947 [..] The Alert Response Address (0b0001 100) is enabled using I2C_SMBusAlertCmd()
\r
950 [..] To detect cumulative SCL stretch in master and slave mode, TIMEOUTB should be
\r
951 configured (in accordance to SMBus specification) using I2C_TimeoutBConfig()
\r
952 function then I2C_ExtendedClockTimeoutCmd() function should be called to enable
\r
955 [..] SCL low timeout is detected by configuring TIMEOUTB using I2C_TimeoutBConfig()
\r
956 function followed by the call of I2C_ClockTimeoutCmd(). When adding to this
\r
957 procedure the call of I2C_IdleClockTimeoutCmd() function, Bus Idle condition
\r
958 (both SCL and SDA high) is detected also.
\r
965 * @brief Enables or disables I2C SMBus alert.
\r
966 * @param I2Cx: where x can be 1 to select the I2C peripheral.
\r
967 * @param NewState: new state of the I2Cx SMBus alert.
\r
968 * This parameter can be: ENABLE or DISABLE.
\r
971 void I2C_SMBusAlertCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
\r
973 /* Check the parameters */
\r
974 assert_param(IS_I2C_1_PERIPH(I2Cx));
\r
975 assert_param(IS_FUNCTIONAL_STATE(NewState));
\r
977 if (NewState != DISABLE)
\r
979 /* Enable SMBus alert */
\r
980 I2Cx->CR1 |= I2C_CR1_ALERTEN;
\r
984 /* Disable SMBus alert */
\r
985 I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_ALERTEN);
\r
990 * @brief Enables or disables I2C Clock Timeout (SCL Timeout detection).
\r
991 * @param I2Cx: where x can be 1 to select the I2C peripheral.
\r
992 * @param NewState: new state of the I2Cx clock Timeout.
\r
993 * This parameter can be: ENABLE or DISABLE.
\r
996 void I2C_ClockTimeoutCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
\r
998 /* Check the parameters */
\r
999 assert_param(IS_I2C_1_PERIPH(I2Cx));
\r
1000 assert_param(IS_FUNCTIONAL_STATE(NewState));
\r
1002 if (NewState != DISABLE)
\r
1004 /* Enable Clock Timeout */
\r
1005 I2Cx->TIMEOUTR |= I2C_TIMEOUTR_TIMOUTEN;
\r
1009 /* Disable Clock Timeout */
\r
1010 I2Cx->TIMEOUTR &= (uint32_t)~((uint32_t)I2C_TIMEOUTR_TIMOUTEN);
\r
1015 * @brief Enables or disables I2C Extended Clock Timeout (SCL cumulative Timeout detection).
\r
1016 * @param I2Cx: where x can be 1 to select the I2C peripheral.
\r
1017 * @param NewState: new state of the I2Cx Extended clock Timeout.
\r
1018 * This parameter can be: ENABLE or DISABLE.
\r
1021 void I2C_ExtendedClockTimeoutCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
\r
1023 /* Check the parameters */
\r
1024 assert_param(IS_I2C_1_PERIPH(I2Cx));
\r
1025 assert_param(IS_FUNCTIONAL_STATE(NewState));
\r
1027 if (NewState != DISABLE)
\r
1029 /* Enable Clock Timeout */
\r
1030 I2Cx->TIMEOUTR |= I2C_TIMEOUTR_TEXTEN;
\r
1034 /* Disable Clock Timeout */
\r
1035 I2Cx->TIMEOUTR &= (uint32_t)~((uint32_t)I2C_TIMEOUTR_TEXTEN);
\r
1040 * @brief Enables or disables I2C Idle Clock Timeout (Bus idle SCL and SDA
\r
1041 * high detection).
\r
1042 * @param I2Cx: where x can be 1 to select the I2C peripheral.
\r
1043 * @param NewState: new state of the I2Cx Idle clock Timeout.
\r
1044 * This parameter can be: ENABLE or DISABLE.
\r
1047 void I2C_IdleClockTimeoutCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
\r
1049 /* Check the parameters */
\r
1050 assert_param(IS_I2C_1_PERIPH(I2Cx));
\r
1051 assert_param(IS_FUNCTIONAL_STATE(NewState));
\r
1053 if (NewState != DISABLE)
\r
1055 /* Enable Clock Timeout */
\r
1056 I2Cx->TIMEOUTR |= I2C_TIMEOUTR_TIDLE;
\r
1060 /* Disable Clock Timeout */
\r
1061 I2Cx->TIMEOUTR &= (uint32_t)~((uint32_t)I2C_TIMEOUTR_TIDLE);
\r
1066 * @brief Configures the I2C Bus Timeout A (SCL Timeout when TIDLE = 0 or Bus
\r
1067 * idle SCL and SDA high when TIDLE = 1).
\r
1068 * @param I2Cx: where x can be 1 to select the I2C peripheral.
\r
1069 * @param Timeout: specifies the TimeoutA to be programmed.
\r
1072 void I2C_TimeoutAConfig(I2C_TypeDef* I2Cx, uint16_t Timeout)
\r
1074 uint32_t tmpreg = 0;
\r
1076 /* Check the parameters */
\r
1077 assert_param(IS_I2C_1_PERIPH(I2Cx));
\r
1078 assert_param(IS_I2C_TIMEOUT(Timeout));
\r
1080 /* Get the old register value */
\r
1081 tmpreg = I2Cx->TIMEOUTR;
\r
1083 /* Reset I2Cx TIMEOUTA bit [11:0] */
\r
1084 tmpreg &= (uint32_t)~((uint32_t)I2C_TIMEOUTR_TIMEOUTA);
\r
1086 /* Set I2Cx TIMEOUTA */
\r
1087 tmpreg |= (uint32_t)((uint32_t)Timeout & I2C_TIMEOUTR_TIMEOUTA) ;
\r
1089 /* Store the new register value */
\r
1090 I2Cx->TIMEOUTR = tmpreg;
\r
1094 * @brief Configures the I2C Bus Timeout B (SCL cumulative Timeout).
\r
1095 * @param I2Cx: where x can be 1 to select the I2C peripheral.
\r
1096 * @param Timeout: specifies the TimeoutB to be programmed.
\r
1099 void I2C_TimeoutBConfig(I2C_TypeDef* I2Cx, uint16_t Timeout)
\r
1101 uint32_t tmpreg = 0;
\r
1103 /* Check the parameters */
\r
1104 assert_param(IS_I2C_1_PERIPH(I2Cx));
\r
1105 assert_param(IS_I2C_TIMEOUT(Timeout));
\r
1107 /* Get the old register value */
\r
1108 tmpreg = I2Cx->TIMEOUTR;
\r
1110 /* Reset I2Cx TIMEOUTB bit [11:0] */
\r
1111 tmpreg &= (uint32_t)~((uint32_t)I2C_TIMEOUTR_TIMEOUTB);
\r
1113 /* Set I2Cx TIMEOUTB */
\r
1114 tmpreg |= (uint32_t)(((uint32_t)Timeout << 16) & I2C_TIMEOUTR_TIMEOUTB) ;
\r
1116 /* Store the new register value */
\r
1117 I2Cx->TIMEOUTR = tmpreg;
\r
1121 * @brief Enables or disables I2C PEC calculation.
\r
1122 * @param I2Cx: where x can be 1 to select the I2C peripheral.
\r
1123 * @param NewState: new state of the I2Cx PEC calculation.
\r
1124 * This parameter can be: ENABLE or DISABLE.
\r
1127 void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState)
\r
1129 /* Check the parameters */
\r
1130 assert_param(IS_I2C_1_PERIPH(I2Cx));
\r
1131 assert_param(IS_FUNCTIONAL_STATE(NewState));
\r
1133 if (NewState != DISABLE)
\r
1135 /* Enable PEC calculation */
\r
1136 I2Cx->CR1 |= I2C_CR1_PECEN;
\r
1140 /* Disable PEC calculation */
\r
1141 I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_PECEN);
\r
1146 * @brief Enables or disables I2C PEC transmission/reception request.
\r
1147 * @param I2Cx: where x can be 1 to select the I2C peripheral.
\r
1148 * @param NewState: new state of the I2Cx PEC request.
\r
1149 * This parameter can be: ENABLE or DISABLE.
\r
1152 void I2C_PECRequestCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
\r
1154 /* Check the parameters */
\r
1155 assert_param(IS_I2C_1_PERIPH(I2Cx));
\r
1156 assert_param(IS_FUNCTIONAL_STATE(NewState));
\r
1158 if (NewState != DISABLE)
\r
1160 /* Enable PEC transmission/reception request */
\r
1161 I2Cx->CR1 |= I2C_CR2_PECBYTE;
\r
1165 /* Disable PEC transmission/reception request */
\r
1166 I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR2_PECBYTE);
\r
1171 * @brief Returns the I2C PEC.
\r
1172 * @param I2Cx: where x can be 1 to select the I2C peripheral.
\r
1173 * @retval The value of the PEC .
\r
1175 uint8_t I2C_GetPEC(I2C_TypeDef* I2Cx)
\r
1177 /* Check the parameters */
\r
1178 assert_param(IS_I2C_1_PERIPH(I2Cx));
\r
1180 /* Return the slave matched address in the SR1 register */
\r
1181 return (uint8_t)((uint32_t)I2Cx->PECR & I2C_PECR_PEC);
\r
1189 /** @defgroup I2C_Group4 I2C registers management functions
\r
1190 * @brief I2C registers management functions
\r
1193 ===============================================================================
\r
1194 ##### I2C registers management functions #####
\r
1195 ===============================================================================
\r
1196 [..] This section provides a function that allow user the read of I2C registers
\r
1204 * @brief Reads the specified I2C register and returns its value.
\r
1205 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
\r
1206 * @param I2C_Register: specifies the register to read.
\r
1207 * This parameter can be one of the following values:
\r
1208 * @arg I2C_Register_CR1: CR1 register.
\r
1209 * @arg I2C_Register_CR2: CR2 register.
\r
1210 * @arg I2C_Register_OAR1: OAR1 register.
\r
1211 * @arg I2C_Register_OAR2: OAR2 register.
\r
1212 * @arg I2C_Register_TIMINGR: TIMING register.
\r
1213 * @arg I2C_Register_TIMEOUTR: TIMEOUTR register.
\r
1214 * @arg I2C_Register_ISR: ISR register.
\r
1215 * @arg I2C_Register_ICR: ICR register.
\r
1216 * @arg I2C_Register_PECR: PECR register.
\r
1217 * @arg I2C_Register_RXDR: RXDR register.
\r
1218 * @arg I2C_Register_TXDR: TXDR register.
\r
1219 * @retval The value of the read register.
\r
1221 uint32_t I2C_ReadRegister(I2C_TypeDef* I2Cx, uint8_t I2C_Register)
\r
1223 __IO uint32_t tmp = 0;
\r
1225 /* Check the parameters */
\r
1226 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
\r
1227 assert_param(IS_I2C_REGISTER(I2C_Register));
\r
1229 tmp = (uint32_t)I2Cx;
\r
1230 tmp += I2C_Register;
\r
1232 /* Return the selected register value */
\r
1233 return (*(__IO uint32_t *) tmp);
\r
1239 /** @defgroup I2C_Group5 Data transfers management functions
\r
1240 * @brief Data transfers management functions
\r
1243 ===============================================================================
\r
1244 ##### Data transfers management functions #####
\r
1245 ===============================================================================
\r
1246 [..] This subsection provides a set of functions allowing to manage
\r
1247 the I2C data transfers.
\r
1249 [..] The read access of the I2C_RXDR register can be done using
\r
1250 the I2C_ReceiveData() function and returns the received value.
\r
1251 Whereas a write access to the I2C_TXDR can be done using I2C_SendData()
\r
1252 function and stores the written data into TXDR.
\r
1258 * @brief Sends a data byte through the I2Cx peripheral.
\r
1259 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
\r
1260 * @param Data: Byte to be transmitted..
\r
1263 void I2C_SendData(I2C_TypeDef* I2Cx, uint8_t Data)
\r
1265 /* Check the parameters */
\r
1266 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
\r
1268 /* Write in the DR register the data to be sent */
\r
1269 I2Cx->TXDR = (uint8_t)Data;
\r
1273 * @brief Returns the most recent received data by the I2Cx peripheral.
\r
1274 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
\r
1275 * @retval The value of the received data.
\r
1277 uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx)
\r
1279 /* Check the parameters */
\r
1280 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
\r
1282 /* Return the data in the DR register */
\r
1283 return (uint8_t)I2Cx->RXDR;
\r
1291 /** @defgroup I2C_Group6 DMA transfers management functions
\r
1292 * @brief DMA transfers management functions
\r
1295 ===============================================================================
\r
1296 ##### DMA transfers management functions #####
\r
1297 ===============================================================================
\r
1298 [..] This section provides two functions that can be used only in DMA mode.
\r
1299 [..] In DMA Mode, the I2C communication can be managed by 2 DMA Channel
\r
1301 (#) I2C_DMAReq_Tx: specifies the Tx buffer DMA transfer request.
\r
1302 (#) I2C_DMAReq_Rx: specifies the Rx buffer DMA transfer request.
\r
1303 [..] In this Mode it is advised to use the following function:
\r
1304 (+) I2C_DMACmd(I2C_TypeDef* I2Cx, uint32_t I2C_DMAReq, FunctionalState NewState);
\r
1310 * @brief Enables or disables the I2C DMA interface.
\r
1311 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
\r
1312 * @param I2C_DMAReq: specifies the I2C DMA transfer request to be enabled or disabled.
\r
1313 * This parameter can be any combination of the following values:
\r
1314 * @arg I2C_DMAReq_Tx: Tx DMA transfer request
\r
1315 * @arg I2C_DMAReq_Rx: Rx DMA transfer request
\r
1316 * @param NewState: new state of the selected I2C DMA transfer request.
\r
1317 * This parameter can be: ENABLE or DISABLE.
\r
1320 void I2C_DMACmd(I2C_TypeDef* I2Cx, uint32_t I2C_DMAReq, FunctionalState NewState)
\r
1322 /* Check the parameters */
\r
1323 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
\r
1324 assert_param(IS_FUNCTIONAL_STATE(NewState));
\r
1325 assert_param(IS_I2C_DMA_REQ(I2C_DMAReq));
\r
1327 if (NewState != DISABLE)
\r
1329 /* Enable the selected I2C DMA requests */
\r
1330 I2Cx->CR1 |= I2C_DMAReq;
\r
1334 /* Disable the selected I2C DMA requests */
\r
1335 I2Cx->CR1 &= (uint32_t)~I2C_DMAReq;
\r
1343 /** @defgroup I2C_Group7 Interrupts and flags management functions
\r
1344 * @brief Interrupts and flags management functions
\r
1347 ===============================================================================
\r
1348 ##### Interrupts and flags management functions #####
\r
1349 ===============================================================================
\r
1350 [..] This section provides functions allowing to configure the I2C Interrupts
\r
1351 sources and check or clear the flags or pending bits status.
\r
1352 The user should identify which mode will be used in his application to manage
\r
1353 the communication: Polling mode, Interrupt mode or DMA mode(refer I2C_Group6).
\r
1355 *** Polling Mode ***
\r
1356 ====================
\r
1357 [..] In Polling Mode, the I2C communication can be managed by 15 flags:
\r
1358 (#) I2C_FLAG_TXE: to indicate the status of Transmit data register empty flag.
\r
1359 (#) I2C_FLAG_TXIS: to indicate the status of Transmit interrupt status flag .
\r
1360 (#) I2C_FLAG_RXNE: to indicate the status of Receive data register not empty flag.
\r
1361 (#) I2C_FLAG_ADDR: to indicate the status of Address matched flag (slave mode).
\r
1362 (#) I2C_FLAG_NACKF: to indicate the status of NACK received flag.
\r
1363 (#) I2C_FLAG_STOPF: to indicate the status of STOP detection flag.
\r
1364 (#) I2C_FLAG_TC: to indicate the status of Transfer complete flag(master mode).
\r
1365 (#) I2C_FLAG_TCR: to indicate the status of Transfer complete reload flag.
\r
1366 (#) I2C_FLAG_BERR: to indicate the status of Bus error flag.
\r
1367 (#) I2C_FLAG_ARLO: to indicate the status of Arbitration lost flag.
\r
1368 (#) I2C_FLAG_OVR: to indicate the status of Overrun/Underrun flag.
\r
1369 (#) I2C_FLAG_PECERR: to indicate the status of PEC error in reception flag.
\r
1370 (#) I2C_FLAG_TIMEOUT: to indicate the status of Timeout or Tlow detection flag.
\r
1371 (#) I2C_FLAG_ALERT: to indicate the status of SMBus Alert flag.
\r
1372 (#) I2C_FLAG_BUSY: to indicate the status of Bus busy flag.
\r
1374 [..] In this Mode it is advised to use the following functions:
\r
1375 (+) FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG);
\r
1376 (+) void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG);
\r
1379 (@)Do not use the BUSY flag to handle each data transmission or reception.It is
\r
1380 better to use the TXIS and RXNE flags instead.
\r
1382 *** Interrupt Mode ***
\r
1383 ======================
\r
1384 [..] In Interrupt Mode, the I2C communication can be managed by 7 interrupt sources
\r
1385 and 15 pending bits:
\r
1386 [..] Interrupt Source:
\r
1387 (#) I2C_IT_ERRI: specifies the interrupt source for the Error interrupt.
\r
1388 (#) I2C_IT_TCI: specifies the interrupt source for the Transfer Complete interrupt.
\r
1389 (#) I2C_IT_STOPI: specifies the interrupt source for the Stop Detection interrupt.
\r
1390 (#) I2C_IT_NACKI: specifies the interrupt source for the Not Acknowledge received interrupt.
\r
1391 (#) I2C_IT_ADDRI: specifies the interrupt source for the Address Match interrupt.
\r
1392 (#) I2C_IT_RXI: specifies the interrupt source for the RX interrupt.
\r
1393 (#) I2C_IT_TXI: specifies the interrupt source for the TX interrupt.
\r
1395 [..] Pending Bits:
\r
1396 (#) I2C_IT_TXIS: to indicate the status of Transmit interrupt status flag.
\r
1397 (#) I2C_IT_RXNE: to indicate the status of Receive data register not empty flag.
\r
1398 (#) I2C_IT_ADDR: to indicate the status of Address matched flag (slave mode).
\r
1399 (#) I2C_IT_NACKF: to indicate the status of NACK received flag.
\r
1400 (#) I2C_IT_STOPF: to indicate the status of STOP detection flag.
\r
1401 (#) I2C_IT_TC: to indicate the status of Transfer complete flag (master mode).
\r
1402 (#) I2C_IT_TCR: to indicate the status of Transfer complete reload flag.
\r
1403 (#) I2C_IT_BERR: to indicate the status of Bus error flag.
\r
1404 (#) I2C_IT_ARLO: to indicate the status of Arbitration lost flag.
\r
1405 (#) I2C_IT_OVR: to indicate the status of Overrun/Underrun flag.
\r
1406 (#) I2C_IT_PECERR: to indicate the status of PEC error in reception flag.
\r
1407 (#) I2C_IT_TIMEOUT: to indicate the status of Timeout or Tlow detection flag.
\r
1408 (#) I2C_IT_ALERT: to indicate the status of SMBus Alert flag.
\r
1410 [..] In this Mode it is advised to use the following functions:
\r
1411 (+) void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT);
\r
1412 (+) ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT);
\r
1419 * @brief Checks whether the specified I2C flag is set or not.
\r
1420 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
\r
1421 * @param I2C_FLAG: specifies the flag to check.
\r
1422 * This parameter can be one of the following values:
\r
1423 * @arg I2C_FLAG_TXE: Transmit data register empty
\r
1424 * @arg I2C_FLAG_TXIS: Transmit interrupt status
\r
1425 * @arg I2C_FLAG_RXNE: Receive data register not empty
\r
1426 * @arg I2C_FLAG_ADDR: Address matched (slave mode)
\r
1427 * @arg I2C_FLAG_NACKF: NACK received flag
\r
1428 * @arg I2C_FLAG_STOPF: STOP detection flag
\r
1429 * @arg I2C_FLAG_TC: Transfer complete (master mode)
\r
1430 * @arg I2C_FLAG_TCR: Transfer complete reload
\r
1431 * @arg I2C_FLAG_BERR: Bus error
\r
1432 * @arg I2C_FLAG_ARLO: Arbitration lost
\r
1433 * @arg I2C_FLAG_OVR: Overrun/Underrun
\r
1434 * @arg I2C_FLAG_PECERR: PEC error in reception
\r
1435 * @arg I2C_FLAG_TIMEOUT: Timeout or Tlow detection flag
\r
1436 * @arg I2C_FLAG_ALERT: SMBus Alert
\r
1437 * @arg I2C_FLAG_BUSY: Bus busy
\r
1438 * @retval The new state of I2C_FLAG (SET or RESET).
\r
1440 FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG)
\r
1442 uint32_t tmpreg = 0;
\r
1443 FlagStatus bitstatus = RESET;
\r
1445 /* Check the parameters */
\r
1446 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
\r
1447 assert_param(IS_I2C_GET_FLAG(I2C_FLAG));
\r
1449 /* Get the ISR register value */
\r
1450 tmpreg = I2Cx->ISR;
\r
1452 /* Get flag status */
\r
1453 tmpreg &= I2C_FLAG;
\r
1457 /* I2C_FLAG is set */
\r
1462 /* I2C_FLAG is reset */
\r
1463 bitstatus = RESET;
\r
1469 * @brief Clears the I2Cx's pending flags.
\r
1470 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
\r
1471 * @param I2C_FLAG: specifies the flag to clear.
\r
1472 * This parameter can be one of the following values:
\r
1473 * @arg I2C_FLAG_ADDR: Address matched (slave mode)
\r
1474 * @arg I2C_FLAG_NACKF: NACK received flag
\r
1475 * @arg I2C_FLAG_STOPF: STOP detection flag
\r
1476 * @arg I2C_FLAG_BERR: Bus error
\r
1477 * @arg I2C_FLAG_ARLO: Arbitration lost
\r
1478 * @arg I2C_FLAG_OVR: Overrun/Underrun
\r
1479 * @arg I2C_FLAG_PECERR: PEC error in reception
\r
1480 * @arg I2C_FLAG_TIMEOUT: Timeout or Tlow detection flag
\r
1481 * @arg I2C_FLAG_ALERT: SMBus Alert
\r
1482 * @retval The new state of I2C_FLAG (SET or RESET).
\r
1484 void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG)
\r
1486 /* Check the parameters */
\r
1487 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
\r
1488 assert_param(IS_I2C_CLEAR_FLAG(I2C_FLAG));
\r
1490 /* Clear the selected flag */
\r
1491 I2Cx->ICR = I2C_FLAG;
\r
1495 * @brief Checks whether the specified I2C interrupt has occurred or not.
\r
1496 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
\r
1497 * @param I2C_IT: specifies the interrupt source to check.
\r
1498 * This parameter can be one of the following values:
\r
1499 * @arg I2C_IT_TXIS: Transmit interrupt status
\r
1500 * @arg I2C_IT_RXNE: Receive data register not empty
\r
1501 * @arg I2C_IT_ADDR: Address matched (slave mode)
\r
1502 * @arg I2C_IT_NACKF: NACK received flag
\r
1503 * @arg I2C_IT_STOPF: STOP detection flag
\r
1504 * @arg I2C_IT_TC: Transfer complete (master mode)
\r
1505 * @arg I2C_IT_TCR: Transfer complete reload
\r
1506 * @arg I2C_IT_BERR: Bus error
\r
1507 * @arg I2C_IT_ARLO: Arbitration lost
\r
1508 * @arg I2C_IT_OVR: Overrun/Underrun
\r
1509 * @arg I2C_IT_PECERR: PEC error in reception
\r
1510 * @arg I2C_IT_TIMEOUT: Timeout or Tlow detection flag
\r
1511 * @arg I2C_IT_ALERT: SMBus Alert
\r
1512 * @retval The new state of I2C_IT (SET or RESET).
\r
1514 ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT)
\r
1516 uint32_t tmpreg = 0;
\r
1517 ITStatus bitstatus = RESET;
\r
1519 /* Check the parameters */
\r
1520 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
\r
1521 assert_param(IS_I2C_GET_IT(I2C_IT));
\r
1523 /* Get the ISR register value */
\r
1524 tmpreg = I2Cx->ISR;
\r
1526 /* Get flag status */
\r
1531 /* I2C_IT is set */
\r
1536 /* I2C_IT is reset */
\r
1537 bitstatus = RESET;
\r
1543 * @brief Clears the I2Cx's interrupt pending bits.
\r
1544 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
\r
1545 * @param I2C_IT: specifies the interrupt pending bit to clear.
\r
1546 * This parameter can be one of the following values:
\r
1547 * @arg I2C_IT_ADDR: Address matched (slave mode)
\r
1548 * @arg I2C_IT_NACKF: NACK received flag
\r
1549 * @arg I2C_IT_STOPF: STOP detection flag
\r
1550 * @arg I2C_IT_BERR: Bus error
\r
1551 * @arg I2C_IT_ARLO: Arbitration lost
\r
1552 * @arg I2C_IT_OVR: Overrun/Underrun
\r
1553 * @arg I2C_IT_PECERR: PEC error in reception
\r
1554 * @arg I2C_IT_TIMEOUT: Timeout or Tlow detection flag
\r
1555 * @arg I2C_IT_ALERT: SMBus Alert
\r
1556 * @retval The new state of I2C_IT (SET or RESET).
\r
1558 void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT)
\r
1560 /* Check the parameters */
\r
1561 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
\r
1562 assert_param(IS_I2C_CLEAR_IT(I2C_IT));
\r
1564 /* Clear the selected flag */
\r
1565 I2Cx->ICR = I2C_IT;
\r
1584 /******************* (C) COPYRIGHT 2012 STMicroelectronics *****END OF FILE****/
\r