2 FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 This file is part of the FreeRTOS distribution.
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9 FreeRTOS is free software; you can redistribute it and/or modify it under
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10 the terms of the GNU General Public License (version 2) as published by the
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11 Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
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13 ***************************************************************************
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14 >>! NOTE: The modification to the GPL is included to allow you to !<<
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15 >>! distribute a combined work that includes FreeRTOS without being !<<
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16 >>! obliged to provide the source code for proprietary components !<<
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17 >>! outside of the FreeRTOS kernel. !<<
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18 ***************************************************************************
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20 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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21 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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22 FOR A PARTICULAR PURPOSE. Full license text is available on the following
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23 link: http://www.freertos.org/a00114.html
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25 ***************************************************************************
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27 * FreeRTOS provides completely free yet professionally developed, *
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28 * robust, strictly quality controlled, supported, and cross *
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29 * platform software that is more than just the market leader, it *
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30 * is the industry's de facto standard. *
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32 * Help yourself get started quickly while simultaneously helping *
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33 * to support the FreeRTOS project by purchasing a FreeRTOS *
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34 * tutorial book, reference manual, or both: *
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35 * http://www.FreeRTOS.org/Documentation *
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37 ***************************************************************************
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39 http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
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40 the FAQ page "My application does not run, what could be wrong?". Have you
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41 defined configASSERT()?
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43 http://www.FreeRTOS.org/support - In return for receiving this top quality
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44 embedded software for free we request you assist our global community by
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45 participating in the support forum.
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47 http://www.FreeRTOS.org/training - Investing in training allows your team to
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48 be as productive as possible as early as possible. Now you can receive
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49 FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
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50 Ltd, and the world's leading authority on the world's leading RTOS.
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52 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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53 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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54 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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56 http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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57 Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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59 http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
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60 Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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61 licenses offer ticketed support, indemnification and commercial middleware.
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63 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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64 engineered and independently SIL3 certified version for use in safety and
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65 mission critical applications that require provable dependability.
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71 * Provides the two timers sources for the standard demo IntQueue test. Also
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72 * includes a high frequency timer to maximise the interrupt nesting achieved.
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75 /* Standard includes. */
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78 /* Scheduler includes. */
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79 #include "FreeRTOS.h"
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82 /* Demo includes. */
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83 #include "IntQueueTimer.h"
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84 #include "IntQueue.h"
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86 /* System includes. */
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90 /* The frequencies at which the first two timers expire are slightly offset to
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91 ensure they don't remain synchronised. The frequency of the highest priority
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92 interrupt is 20 times faster so really hammers the interrupt entry and exit
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94 #define tmrTIMER_0_FREQUENCY ( 2000UL )
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95 #define tmrTIMER_1_FREQUENCY ( 1003UL )
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96 #define tmrTIMER_2_FREQUENCY ( 20000UL )
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98 /* Priorities used by the timer interrupts - these are set differently to make
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99 nesting likely/common. The high frequency timer operates above the max
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100 system call interrupt priority, but does not use the RTOS API. */
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101 #define tmrTIMER_0_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY )
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102 #define tmrTIMER_1_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY + 1 )
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103 #define tmrTIMER_2_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY - 1 )
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105 /* The channels used within the TC0 timer. */
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106 #define tmrTIMER_0_CHANNEL ( 0 )
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107 #define tmrTIMER_1_CHANNEL ( 1 )
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108 #define tmrTIMER_2_CHANNEL ( 2 )
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110 /* TC register bit specifics. */
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111 #define tmrTRIGGER_ON_RC ( 1UL << 4UL )
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112 #define trmDIVIDER ( 128 )
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114 /*-----------------------------------------------------------*/
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116 /* Handers for the timer interrupts. */
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117 void TC0_Handler( void );
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118 void TC1_Handler( void );
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119 void TC2_Handler( void );
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121 /*-----------------------------------------------------------*/
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123 /* Incremented by the high frequency timer, which operates above the max
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124 syscall interrupt priority. This is just for inspection. */
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125 volatile uint32_t ulHighFrequencyTimerInterrupts = 0;
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127 /*-----------------------------------------------------------*/
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129 void vInitialiseTimerForIntQueueTest( void )
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131 uint32_t ulInputFrequency;
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133 /* Calculate the frequency of the clock that feeds the TC. */
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134 ulInputFrequency = configCPU_CLOCK_HZ;
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135 ulInputFrequency /= trmDIVIDER;
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137 /* Three channels are used - two that run at or under
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138 configMAX_SYSCALL_INTERRUPT_PRIORITY, and one that runs over
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139 configMAX_SYSCALL_INTERRUPT_PRIORITY. */
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140 sysclk_enable_peripheral_clock( ID_TC0 );
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141 sysclk_enable_peripheral_clock( ID_TC1 );
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142 sysclk_enable_peripheral_clock( ID_TC2 );
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144 /* Init TC channels to waveform mode - up mode clean on RC match. */
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145 tc_init( TC0, tmrTIMER_0_CHANNEL, TC_CMR_TCCLKS_TIMER_CLOCK4 | TC_CMR_WAVE | TC_CMR_ACPC_CLEAR | TC_CMR_CPCTRG );
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146 tc_init( TC0, tmrTIMER_1_CHANNEL, TC_CMR_TCCLKS_TIMER_CLOCK4 | TC_CMR_WAVE | TC_CMR_ACPC_CLEAR | TC_CMR_CPCTRG );
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147 tc_init( TC0, tmrTIMER_2_CHANNEL, TC_CMR_TCCLKS_TIMER_CLOCK4 | TC_CMR_WAVE | TC_CMR_ACPC_CLEAR | TC_CMR_CPCTRG );
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149 tc_enable_interrupt( TC0, tmrTIMER_0_CHANNEL, tmrTRIGGER_ON_RC );
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150 tc_enable_interrupt( TC0, tmrTIMER_1_CHANNEL, tmrTRIGGER_ON_RC );
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151 tc_enable_interrupt( TC0, tmrTIMER_2_CHANNEL, tmrTRIGGER_ON_RC );
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153 tc_write_rc( TC0, tmrTIMER_0_CHANNEL, ( ulInputFrequency / tmrTIMER_0_FREQUENCY ) );
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154 tc_write_rc( TC0, tmrTIMER_1_CHANNEL, ( ulInputFrequency / tmrTIMER_1_FREQUENCY ) );
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155 tc_write_rc( TC0, tmrTIMER_2_CHANNEL, ( ulInputFrequency / tmrTIMER_2_FREQUENCY ) );
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157 NVIC_SetPriority( TC0_IRQn, tmrTIMER_0_PRIORITY );
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158 NVIC_SetPriority( TC1_IRQn, tmrTIMER_1_PRIORITY );
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159 NVIC_SetPriority( TC2_IRQn, tmrTIMER_2_PRIORITY );
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161 NVIC_EnableIRQ( TC0_IRQn );
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162 NVIC_EnableIRQ( TC1_IRQn );
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163 NVIC_EnableIRQ( TC2_IRQn );
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165 tc_start( TC0, tmrTIMER_0_CHANNEL );
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166 tc_start( TC0, tmrTIMER_1_CHANNEL );
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167 tc_start( TC0, tmrTIMER_2_CHANNEL );
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169 /*-----------------------------------------------------------*/
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171 void TC0_Handler( void )
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173 /* Handler for the first timer in the IntQueue test. Was the interrupt
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174 caused by a compare on RC? */
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175 if( ( tc_get_status( TC0, tmrTIMER_0_CHANNEL ) & ~TC_SR_CPCS ) != 0 )
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177 portYIELD_FROM_ISR( xFirstTimerHandler() );
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180 /*-----------------------------------------------------------*/
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182 void TC1_Handler( void )
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184 /* Handler for the second timer in the IntQueue test. Was the interrupt
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185 caused by a compare on RC? */
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186 if( ( tc_get_status( TC0, tmrTIMER_1_CHANNEL ) & ~TC_SR_CPCS ) != 0 )
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188 portYIELD_FROM_ISR( xSecondTimerHandler() );
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191 /*-----------------------------------------------------------*/
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193 void TC2_Handler( void )
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195 /* Handler for the high frequency timer that does nothing but increment a
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196 variable to give an indication that it is running. Was the interrupt caused
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197 by a compare on RC? */
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198 if( ( tc_get_status( TC0, tmrTIMER_2_CHANNEL ) & ~TC_SR_CPCS ) != 0 )
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200 ulHighFrequencyTimerInterrupts++;
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