1 /*****************************************************************************/
2 /* Startup_XMC4500.s: Startup file for XMC4500 device series */
3 /*****************************************************************************/
5 /* ********************* Version History *********************************** */
6 /* ***************************************************************************
7 V1.0 , July 2011, First version for XIP profile
8 V1.1 , Oct 2011, Program loading code included (GH: b to main changed)
9 V1.2 , Nov, 01, 2011 GH :Removed second definition of section .Xmc4500.reset
11 V1.3 , Nov, 16, 2011 GH :Removed PMU0_1_IRQHandler and respective weak function
13 V1.4 , Dec, 16, 2011 PKB:Jump to __Xmc4500_start_c reinstated for RTOS integration
14 V1.5 , Jan, 10, 2012 PKB:Migrated to GCC from ARM
15 V1.6 , Jan, 16, 2012 PKB:Branch prediction turned off, Parity errors cleared.
16 V1.7 , Apr, 17, 2012 PKB:Added decision function for PLL initialization
17 V1.8 , Apr, 20, 2012 PKB:Handshake with DAVE code engine added
18 V1.9 , Jun, 14, 2012 PKB:Removed the handshake protocol towards simplification
19 V1.10, Aug, 13, 2012 PKB:Flash Wait states handling
20 V1.11, Oct, 11, 2012 PKB:C++ support. Call to global constructors
21 V1.12, Jan, 23, 2013 PKB:XMC4 Prefetch bug workaround
22 **************************************************************************** */
24 * @file Startup_XMC4500.s
25 * XMC4000 Device Series
29 Copyright (C) 2013 Infineon Technologies AG. All rights reserved.
33 * Infineon Technologies AG (Infineon) is supplying this software for use with
34 * Infineon's microcontrollers. This file can be freely distributed
35 * within development tools that are supporting such microcontrollers.
38 * THIS SOFTWARE IS PROVIDED AS IS. NO WARRANTIES, WHETHER EXPRESS, IMPLIED
39 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
40 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
41 * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
42 * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
44 ******************************************************************************/
47 /* ===========START : MACRO DEFINITION MACRO DEFINITION ================== */
49 * STEP_AB and below have the prefetch bug. A veneer defined below will first
50 * be executed which in turn branches to the final exception handler.
52 * In addition to defining the veneers, the vector table must for these buggy
53 * devices contain the veneers.
56 /* A macro to setup a vector table entry based on STEP ID */
58 #if (UC_STEP > STEP_AB)
61 .long \Handler\()_Veneer
65 /* A macro to ease definition of the various handlers based on STEP ID */
66 #if (UC_STEP <= STEP_AB)
67 /* First define the final exception handler */
68 .macro Insert_ExceptionHandler Handler_Func
70 .type \Handler_Func, %function
73 .size \Handler_Func, . - \Handler_Func
75 /* And then define a veneer that will branch to the final excp handler */
76 .weak \Handler_Func\()_Veneer
77 .type \Handler_Func\()_Veneer, %function
78 \Handler_Func\()_Veneer:
79 LDR R0, =\Handler_Func
83 .size \Handler_Func\()_Veneer, . - \Handler_Func\()_Veneer
86 /* No prefetch bug, hence define only the final exception handler */
87 .macro Insert_ExceptionHandler Handler_Func
89 .type \Handler_Func, %function
92 .size \Handler_Func, . - \Handler_Func
95 /* =============END : MACRO DEFINITION MACRO DEFINITION ================== */
97 /* ================== START OF VECTOR TABLE DEFINITION ====================== */
98 /* Vector Table - This gets programed into VTOR register by onchip BootROM */
101 .section ".Xmc4500.reset"
102 .globl __Xmc4500_interrupt_vector_cortex_m
103 .type __Xmc4500_interrupt_vector_cortex_m, %object
105 __Xmc4500_interrupt_vector_cortex_m:
106 .long __Xmc4500_stack /* Top of Stack */
107 .long __Xmc4500_reset_cortex_m /* Reset Handler */
109 Entry NMI_Handler /* NMI Handler */
110 Entry HardFault_Handler /* Hard Fault Handler */
111 Entry MemManage_Handler /* MPU Fault Handler */
112 Entry BusFault_Handler /* Bus Fault Handler */
113 Entry UsageFault_Handler /* Usage Fault Handler */
114 .long 0 /* Reserved */
115 .long 0 /* Reserved */
116 .long 0 /* Reserved */
117 .long 0 /* Reserved */
118 .long SVC_Handler /* SVCall Handler */
119 Entry DebugMon_Handler /* Debug Monitor Handler */
120 .long 0 /* Reserved */
121 .long PendSV_Handler /* PendSV Handler */
122 .long SysTick_Handler /* SysTick Handler */
124 /* Interrupt Handlers for Service Requests (SR) from XMC4500 Peripherals */
125 Entry SCU_0_IRQHandler /* Handler name for SR SCU_0 */
126 Entry ERU0_0_IRQHandler /* Handler name for SR ERU0_0 */
127 Entry ERU0_1_IRQHandler /* Handler name for SR ERU0_1 */
128 Entry ERU0_2_IRQHandler /* Handler name for SR ERU0_2 */
129 Entry ERU0_3_IRQHandler /* Handler name for SR ERU0_3 */
130 Entry ERU1_0_IRQHandler /* Handler name for SR ERU1_0 */
131 Entry ERU1_1_IRQHandler /* Handler name for SR ERU1_1 */
132 Entry ERU1_2_IRQHandler /* Handler name for SR ERU1_2 */
133 Entry ERU1_3_IRQHandler /* Handler name for SR ERU1_3 */
134 .long 0 /* Not Available */
135 .long 0 /* Not Available */
136 .long 0 /* Not Available */
137 Entry PMU0_0_IRQHandler /* Handler name for SR PMU0_0 */
138 .long 0 /* Not Available */
139 Entry VADC0_C0_0_IRQHandler /* Handler name for SR VADC0_C0_0 */
140 Entry VADC0_C0_1_IRQHandler /* Handler name for SR VADC0_C0_1 */
141 Entry VADC0_C0_2_IRQHandler /* Handler name for SR VADC0_C0_1 */
142 Entry VADC0_C0_3_IRQHandler /* Handler name for SR VADC0_C0_3 */
143 Entry VADC0_G0_0_IRQHandler /* Handler name for SR VADC0_G0_0 */
144 Entry VADC0_G0_1_IRQHandler /* Handler name for SR VADC0_G0_1 */
145 Entry VADC0_G0_2_IRQHandler /* Handler name for SR VADC0_G0_2 */
146 Entry VADC0_G0_3_IRQHandler /* Handler name for SR VADC0_G0_3 */
147 Entry VADC0_G1_0_IRQHandler /* Handler name for SR VADC0_G1_0 */
148 Entry VADC0_G1_1_IRQHandler /* Handler name for SR VADC0_G1_1 */
149 Entry VADC0_G1_2_IRQHandler /* Handler name for SR VADC0_G1_2 */
150 Entry VADC0_G1_3_IRQHandler /* Handler name for SR VADC0_G1_3 */
151 Entry VADC0_G2_0_IRQHandler /* Handler name for SR VADC0_G2_0 */
152 Entry VADC0_G2_1_IRQHandler /* Handler name for SR VADC0_G2_1 */
153 Entry VADC0_G2_2_IRQHandler /* Handler name for SR VADC0_G2_2 */
154 Entry VADC0_G2_3_IRQHandler /* Handler name for SR VADC0_G2_3 */
155 Entry VADC0_G3_0_IRQHandler /* Handler name for SR VADC0_G3_0 */
156 Entry VADC0_G3_1_IRQHandler /* Handler name for SR VADC0_G3_1 */
157 Entry VADC0_G3_2_IRQHandler /* Handler name for SR VADC0_G3_2 */
158 Entry VADC0_G3_3_IRQHandler /* Handler name for SR VADC0_G3_3 */
159 Entry DSD0_0_IRQHandler /* Handler name for SR DSD0_0 */
160 Entry DSD0_1_IRQHandler /* Handler name for SR DSD0_1 */
161 Entry DSD0_2_IRQHandler /* Handler name for SR DSD0_2 */
162 Entry DSD0_3_IRQHandler /* Handler name for SR DSD0_3 */
163 Entry DSD0_4_IRQHandler /* Handler name for SR DSD0_4 */
164 Entry DSD0_5_IRQHandler /* Handler name for SR DSD0_5 */
165 Entry DSD0_6_IRQHandler /* Handler name for SR DSD0_6 */
166 Entry DSD0_7_IRQHandler /* Handler name for SR DSD0_7 */
167 Entry DAC0_0_IRQHandler /* Handler name for SR DAC0_0 */
168 Entry DAC0_1_IRQHandler /* Handler name for SR DAC0_0 */
169 Entry CCU40_0_IRQHandler /* Handler name for SR CCU40_0 */
170 Entry CCU40_1_IRQHandler /* Handler name for SR CCU40_1 */
171 Entry CCU40_2_IRQHandler /* Handler name for SR CCU40_2 */
172 Entry CCU40_3_IRQHandler /* Handler name for SR CCU40_3 */
173 Entry CCU41_0_IRQHandler /* Handler name for SR CCU41_0 */
174 Entry CCU41_1_IRQHandler /* Handler name for SR CCU41_1 */
175 Entry CCU41_2_IRQHandler /* Handler name for SR CCU41_2 */
176 Entry CCU41_3_IRQHandler /* Handler name for SR CCU41_3 */
177 Entry CCU42_0_IRQHandler /* Handler name for SR CCU42_0 */
178 Entry CCU42_1_IRQHandler /* Handler name for SR CCU42_1 */
179 Entry CCU42_2_IRQHandler /* Handler name for SR CCU42_2 */
180 Entry CCU42_3_IRQHandler /* Handler name for SR CCU42_3 */
181 Entry CCU43_0_IRQHandler /* Handler name for SR CCU43_0 */
182 Entry CCU43_1_IRQHandler /* Handler name for SR CCU43_1 */
183 Entry CCU43_2_IRQHandler /* Handler name for SR CCU43_2 */
184 Entry CCU43_3_IRQHandler /* Handler name for SR CCU43_3 */
185 Entry CCU80_0_IRQHandler /* Handler name for SR CCU80_0 */
186 Entry CCU80_1_IRQHandler /* Handler name for SR CCU80_1 */
187 Entry CCU80_2_IRQHandler /* Handler name for SR CCU80_2 */
188 Entry CCU80_3_IRQHandler /* Handler name for SR CCU80_3 */
189 Entry CCU81_0_IRQHandler /* Handler name for SR CCU81_0 */
190 Entry CCU81_1_IRQHandler /* Handler name for SR CCU81_1 */
191 Entry CCU81_2_IRQHandler /* Handler name for SR CCU81_2 */
192 Entry CCU81_3_IRQHandler /* Handler name for SR CCU81_3 */
193 Entry POSIF0_0_IRQHandler /* Handler name for SR POSIF0_0 */
194 Entry POSIF0_1_IRQHandler /* Handler name for SR POSIF0_1 */
195 Entry POSIF1_0_IRQHandler /* Handler name for SR POSIF1_0 */
196 Entry POSIF1_1_IRQHandler /* Handler name for SR POSIF1_1 */
197 .long 0 /* Not Available */
198 .long 0 /* Not Available */
199 .long 0 /* Not Available */
200 .long 0 /* Not Available */
201 Entry CAN0_0_IRQHandler /* Handler name for SR CAN0_0 */
202 Entry CAN0_1_IRQHandler /* Handler name for SR CAN0_1 */
203 Entry CAN0_2_IRQHandler /* Handler name for SR CAN0_2 */
204 Entry CAN0_3_IRQHandler /* Handler name for SR CAN0_3 */
205 Entry CAN0_4_IRQHandler /* Handler name for SR CAN0_4 */
206 Entry CAN0_5_IRQHandler /* Handler name for SR CAN0_5 */
207 Entry CAN0_6_IRQHandler /* Handler name for SR CAN0_6 */
208 Entry CAN0_7_IRQHandler /* Handler name for SR CAN0_7 */
209 Entry USIC0_0_IRQHandler /* Handler name for SR USIC0_0 */
210 Entry USIC0_1_IRQHandler /* Handler name for SR USIC0_1 */
211 Entry USIC0_2_IRQHandler /* Handler name for SR USIC0_2 */
212 Entry USIC0_3_IRQHandler /* Handler name for SR USIC0_3 */
213 Entry USIC0_4_IRQHandler /* Handler name for SR USIC0_4 */
214 Entry USIC0_5_IRQHandler /* Handler name for SR USIC0_5 */
215 Entry USIC1_0_IRQHandler /* Handler name for SR USIC1_0 */
216 Entry USIC1_1_IRQHandler /* Handler name for SR USIC1_1 */
217 Entry USIC1_2_IRQHandler /* Handler name for SR USIC1_2 */
218 Entry USIC1_3_IRQHandler /* Handler name for SR USIC1_3 */
219 Entry USIC1_4_IRQHandler /* Handler name for SR USIC1_4 */
220 Entry USIC1_5_IRQHandler /* Handler name for SR USIC1_5 */
221 Entry USIC2_0_IRQHandler /* Handler name for SR USIC2_0 */
222 Entry USIC2_1_IRQHandler /* Handler name for SR USIC2_1 */
223 Entry USIC2_2_IRQHandler /* Handler name for SR USIC2_2 */
224 Entry USIC2_3_IRQHandler /* Handler name for SR USIC2_3 */
225 Entry USIC2_4_IRQHandler /* Handler name for SR USIC2_4 */
226 Entry USIC2_5_IRQHandler /* Handler name for SR USIC2_5 */
227 Entry LEDTS0_0_IRQHandler /* Handler name for SR LEDTS0_0 */
228 .long 0 /* Not Available */
229 Entry FCE0_0_IRQHandler /* Handler name for SR FCE0_0 */
230 Entry GPDMA0_0_IRQHandler /* Handler name for SR GPDMA0_0 */
231 Entry SDMMC0_0_IRQHandler /* Handler name for SR SDMMC0_0 */
232 Entry USB0_0_IRQHandler /* Handler name for SR USB0_0 */
233 Entry ETH0_0_IRQHandler /* Handler name for SR ETH0_0 */
234 .long 0 /* Not Available */
235 Entry GPDMA1_0_IRQHandler /* Handler name for SR GPDMA1_0 */
236 .long 0 /* Not Available */
238 .size __Xmc4500_interrupt_vector_cortex_m, . - __Xmc4500_interrupt_vector_cortex_m
239 /* ================== END OF VECTOR TABLE DEFINITION ======================= */
241 /* ================== START OF VECTOR ROUTINES ============================= */
243 /* ======================================================================== */
247 .globl __Xmc4500_reset_cortex_m
248 .type __Xmc4500_reset_cortex_m, %function
249 __Xmc4500_reset_cortex_m:
252 /* C routines are likely to be called. Setup the stack now */
253 /* This is already setup by BootROM,hence this step is optional */
254 LDR SP,=__Xmc4500_stack
256 /* Clock tree, External memory setup etc may be done here */
261 SystemInit_DAVE3() is provided by DAVE3 code generation engine. It is
262 weakly defined here though for a potential override.
264 LDR R0, =SystemInit_DAVE3
267 B __Xmc4500_Program_Loader
272 .size __Xmc4500_reset_cortex_m,.-__Xmc4500_reset_cortex_m
273 /* ======================================================================== */
274 /* __Xmc4500_reset must yield control to __Xmc4500_Program_Loader before control
275 to C land is given */
276 .section .Xmc4500.postreset,"x",%progbits
277 __Xmc4500_Program_Loader:
279 /* Memories are accessible now*/
282 /* R0 = Start address, R1 = Destination address, R2 = Size */
284 LDR R1, =__Xmc4500_sData
285 LDR R2, =__Xmc4500_Data_Size
287 /* Is there anything to be copied? */
291 /* For bytecount less than 4, at least 1 word must be copied */
295 /* Byte count < 4 ; so bump it up */
300 R2 contains byte count. Change it to word count. It is ensured in the
301 linker script that the length is always word aligned.
303 LSR R2,R2,#2 /* Divide by 4 to obtain word count */
305 /* The proverbial loop from the schooldays */
317 LDR R0, =__Xmc4500_sBSS /* Start of BSS */
318 LDR R1, =__Xmc4500_BSS_Size /* BSS size in bytes */
320 /* Find out if there are items assigned to BSS */
324 /* At least 1 word must be copied */
328 /* Byte count < 4 ; so bump it up to a word*/
332 LSR R1,R1,#2 /* BSS size in words */
343 /* Remap vector table */
344 /* This is already setup by BootROM,hence this step is optional */
345 LDR R0, =__Xmc4500_interrupt_vector_cortex_m
349 /* Update System Clock */
350 LDR R0,=SystemCoreClockUpdate
353 /* C++ : Call global constructors */
354 LDR R0,=__libc_init_array
357 /* Reset stack pointer before zipping off to user application, Optional */
358 LDR SP,=__Xmc4500_stack
365 .size __Xmc4500_Program_Loader,.-__Xmc4500_Program_Loader
366 /* ======================================================================== */
367 /* ========== START OF EXCEPTION HANDLER DEFINITION ======================== */
370 /* Default exception Handlers - Users may override this default functionality by
371 defining handlers of the same name in their C code */
375 Insert_ExceptionHandler NMI_Handler
376 /* ======================================================================== */
377 Insert_ExceptionHandler HardFault_Handler
378 /* ======================================================================== */
379 Insert_ExceptionHandler MemManage_Handler
380 /* ======================================================================== */
381 Insert_ExceptionHandler BusFault_Handler
382 /* ======================================================================== */
383 Insert_ExceptionHandler UsageFault_Handler
384 /* ======================================================================== */
385 Insert_ExceptionHandler SVC_Handler
386 /* ======================================================================== */
387 Insert_ExceptionHandler DebugMon_Handler
388 /* ======================================================================== */
389 Insert_ExceptionHandler PendSV_Handler
390 /* ======================================================================== */
391 Insert_ExceptionHandler SysTick_Handler
393 /* ============= END OF EXCEPTION HANDLER DEFINITION ======================== */
395 /* ============= START OF INTERRUPT HANDLER DEFINITION ====================== */
398 Insert_ExceptionHandler SCU_0_IRQHandler
399 /* ======================================================================== */
400 Insert_ExceptionHandler ERU0_0_IRQHandler
401 /* ======================================================================== */
402 Insert_ExceptionHandler ERU0_1_IRQHandler
403 /* ======================================================================== */
404 Insert_ExceptionHandler ERU0_2_IRQHandler
405 /* ======================================================================== */
406 Insert_ExceptionHandler ERU0_3_IRQHandler
407 /* ======================================================================== */
408 Insert_ExceptionHandler ERU1_0_IRQHandler
409 /* ======================================================================== */
410 Insert_ExceptionHandler ERU1_1_IRQHandler
411 /* ======================================================================== */
412 Insert_ExceptionHandler ERU1_2_IRQHandler
413 /* ======================================================================== */
414 Insert_ExceptionHandler ERU1_3_IRQHandler
415 /* ======================================================================== */
416 Insert_ExceptionHandler PMU0_0_IRQHandler
417 /* ======================================================================== */
418 Insert_ExceptionHandler VADC0_C0_0_IRQHandler
419 /* ======================================================================== */
420 Insert_ExceptionHandler VADC0_C0_1_IRQHandler
421 /* ======================================================================== */
422 Insert_ExceptionHandler VADC0_C0_2_IRQHandler
423 /* ======================================================================== */
424 Insert_ExceptionHandler VADC0_C0_3_IRQHandler
425 /* ======================================================================== */
426 Insert_ExceptionHandler VADC0_G0_0_IRQHandler
427 /* ======================================================================== */
428 Insert_ExceptionHandler VADC0_G0_1_IRQHandler
429 /* ======================================================================== */
430 Insert_ExceptionHandler VADC0_G0_2_IRQHandler
431 /* ======================================================================== */
432 Insert_ExceptionHandler VADC0_G0_3_IRQHandler
433 /* ======================================================================== */
434 Insert_ExceptionHandler VADC0_G1_0_IRQHandler
435 /* ======================================================================== */
436 Insert_ExceptionHandler VADC0_G1_1_IRQHandler
437 /* ======================================================================== */
438 Insert_ExceptionHandler VADC0_G1_2_IRQHandler
439 /* ======================================================================== */
440 Insert_ExceptionHandler VADC0_G1_3_IRQHandler
441 /* ======================================================================== */
442 Insert_ExceptionHandler VADC0_G2_0_IRQHandler
443 /* ======================================================================== */
444 Insert_ExceptionHandler VADC0_G2_1_IRQHandler
445 /* ======================================================================== */
446 Insert_ExceptionHandler VADC0_G2_2_IRQHandler
447 /* ======================================================================== */
448 Insert_ExceptionHandler VADC0_G2_3_IRQHandler
449 /* ======================================================================== */
450 Insert_ExceptionHandler VADC0_G3_0_IRQHandler
451 /* ======================================================================== */
452 Insert_ExceptionHandler VADC0_G3_1_IRQHandler
453 /* ======================================================================== */
454 Insert_ExceptionHandler VADC0_G3_2_IRQHandler
455 /* ======================================================================== */
456 Insert_ExceptionHandler VADC0_G3_3_IRQHandler
457 /* ======================================================================== */
458 Insert_ExceptionHandler DSD0_0_IRQHandler
459 /* ======================================================================== */
460 Insert_ExceptionHandler DSD0_1_IRQHandler
461 /* ======================================================================== */
462 Insert_ExceptionHandler DSD0_2_IRQHandler
463 /* ======================================================================== */
464 Insert_ExceptionHandler DSD0_3_IRQHandler
465 /* ======================================================================== */
466 Insert_ExceptionHandler DSD0_4_IRQHandler
467 /* ======================================================================== */
468 Insert_ExceptionHandler DSD0_5_IRQHandler
469 /* ======================================================================== */
470 Insert_ExceptionHandler DSD0_6_IRQHandler
471 /* ======================================================================== */
472 Insert_ExceptionHandler DSD0_7_IRQHandler
473 /* ======================================================================== */
474 Insert_ExceptionHandler DAC0_0_IRQHandler
475 /* ======================================================================== */
476 Insert_ExceptionHandler DAC0_1_IRQHandler
477 /* ======================================================================== */
478 Insert_ExceptionHandler CCU40_0_IRQHandler
479 /* ======================================================================== */
480 Insert_ExceptionHandler CCU40_1_IRQHandler
481 /* ======================================================================== */
482 Insert_ExceptionHandler CCU40_2_IRQHandler
483 /* ======================================================================== */
484 Insert_ExceptionHandler CCU40_3_IRQHandler
485 /* ======================================================================== */
486 Insert_ExceptionHandler CCU41_0_IRQHandler
487 /* ======================================================================== */
488 Insert_ExceptionHandler CCU41_1_IRQHandler
489 /* ======================================================================== */
490 Insert_ExceptionHandler CCU41_2_IRQHandler
491 /* ======================================================================== */
492 Insert_ExceptionHandler CCU41_3_IRQHandler
493 /* ======================================================================== */
494 Insert_ExceptionHandler CCU42_0_IRQHandler
495 /* ======================================================================== */
496 Insert_ExceptionHandler CCU42_1_IRQHandler
497 /* ======================================================================== */
498 Insert_ExceptionHandler CCU42_2_IRQHandler
499 /* ======================================================================== */
500 Insert_ExceptionHandler CCU42_3_IRQHandler
501 /* ======================================================================== */
502 Insert_ExceptionHandler CCU43_0_IRQHandler
503 /* ======================================================================== */
504 Insert_ExceptionHandler CCU43_1_IRQHandler
505 /* ======================================================================== */
506 Insert_ExceptionHandler CCU43_2_IRQHandler
507 /* ======================================================================== */
508 Insert_ExceptionHandler CCU43_3_IRQHandler
509 /* ======================================================================== */
510 Insert_ExceptionHandler CCU80_0_IRQHandler
511 /* ======================================================================== */
512 Insert_ExceptionHandler CCU80_1_IRQHandler
513 /* ======================================================================== */
514 Insert_ExceptionHandler CCU80_2_IRQHandler
515 /* ======================================================================== */
516 Insert_ExceptionHandler CCU80_3_IRQHandler
517 /* ======================================================================== */
518 Insert_ExceptionHandler CCU81_0_IRQHandler
519 /* ======================================================================== */
520 Insert_ExceptionHandler CCU81_1_IRQHandler
521 /* ======================================================================== */
522 Insert_ExceptionHandler CCU81_2_IRQHandler
523 /* ======================================================================== */
524 Insert_ExceptionHandler CCU81_3_IRQHandler
525 /* ======================================================================== */
526 Insert_ExceptionHandler POSIF0_0_IRQHandler
527 /* ======================================================================== */
528 Insert_ExceptionHandler POSIF0_1_IRQHandler
529 /* ======================================================================== */
530 Insert_ExceptionHandler POSIF1_0_IRQHandler
531 /* ======================================================================== */
532 Insert_ExceptionHandler POSIF1_1_IRQHandler
533 /* ======================================================================== */
534 Insert_ExceptionHandler CAN0_0_IRQHandler
535 /* ======================================================================== */
536 Insert_ExceptionHandler CAN0_1_IRQHandler
537 /* ======================================================================== */
538 Insert_ExceptionHandler CAN0_2_IRQHandler
539 /* ======================================================================== */
540 Insert_ExceptionHandler CAN0_3_IRQHandler
541 /* ======================================================================== */
542 Insert_ExceptionHandler CAN0_4_IRQHandler
543 /* ======================================================================== */
544 Insert_ExceptionHandler CAN0_5_IRQHandler
545 /* ======================================================================== */
546 Insert_ExceptionHandler CAN0_6_IRQHandler
547 /* ======================================================================== */
548 Insert_ExceptionHandler CAN0_7_IRQHandler
549 /* ======================================================================== */
550 Insert_ExceptionHandler USIC0_0_IRQHandler
551 /* ======================================================================== */
552 Insert_ExceptionHandler USIC0_1_IRQHandler
553 /* ======================================================================== */
554 Insert_ExceptionHandler USIC0_2_IRQHandler
555 /* ======================================================================== */
556 Insert_ExceptionHandler USIC0_3_IRQHandler
557 /* ======================================================================== */
558 Insert_ExceptionHandler USIC0_4_IRQHandler
559 /* ======================================================================== */
560 Insert_ExceptionHandler USIC0_5_IRQHandler
561 /* ======================================================================== */
562 Insert_ExceptionHandler USIC1_0_IRQHandler
563 /* ======================================================================== */
564 Insert_ExceptionHandler USIC1_1_IRQHandler
565 /* ======================================================================== */
566 Insert_ExceptionHandler USIC1_2_IRQHandler
567 /* ======================================================================== */
568 Insert_ExceptionHandler USIC1_3_IRQHandler
569 /* ======================================================================== */
570 Insert_ExceptionHandler USIC1_4_IRQHandler
571 /* ======================================================================== */
572 Insert_ExceptionHandler USIC1_5_IRQHandler
573 /* ======================================================================== */
574 Insert_ExceptionHandler USIC2_0_IRQHandler
575 /* ======================================================================== */
576 Insert_ExceptionHandler USIC2_1_IRQHandler
577 /* ======================================================================== */
578 Insert_ExceptionHandler USIC2_2_IRQHandler
579 /* ======================================================================== */
580 Insert_ExceptionHandler USIC2_3_IRQHandler
581 /* ======================================================================== */
582 Insert_ExceptionHandler USIC2_4_IRQHandler
583 /* ======================================================================== */
584 Insert_ExceptionHandler USIC2_5_IRQHandler
585 /* ======================================================================== */
586 Insert_ExceptionHandler LEDTS0_0_IRQHandler
587 /* ======================================================================== */
588 Insert_ExceptionHandler FCE0_0_IRQHandler
589 /* ======================================================================== */
590 Insert_ExceptionHandler GPDMA0_0_IRQHandler
591 /* ======================================================================== */
592 Insert_ExceptionHandler SDMMC0_0_IRQHandler
593 /* ======================================================================== */
594 Insert_ExceptionHandler USB0_0_IRQHandler
595 /* ======================================================================== */
596 Insert_ExceptionHandler ETH0_0_IRQHandler
597 /* ======================================================================== */
598 Insert_ExceptionHandler GPDMA1_0_IRQHandler
599 /* ======================================================================== */
600 /* ======================================================================== */
602 /* ============= END OF INTERRUPT HANDLER DEFINITION ====================== */
604 /* ======== Decision function queried by CMSIS startup for PLL setup ====== */
605 /* In the absence of DAVE code engine, CMSIS SystemInit() must perform clock
608 This decision routine defined here will always return TRUE.
610 When overridden by a definition defined in DAVE code engine, this routine
611 returns FALSE indicating that the code engine has performed the clock setup
613 .weak AllowPLLInitByStartup
614 .type AllowPLLInitByStartup, %function
615 AllowPLLInitByStartup:
618 .size AllowPLLInitByStartup, . - AllowPLLInitByStartup
620 /* ====== Definition of the default weak SystemInit_DAVE3 function =========
621 If DAVE3 requires an extended SystemInit it will create its own version of
622 SystemInit_DAVE3 which overrides this weak definition. Example includes
623 setting up of external memory interfaces.
625 .section ".XmcStartup"
626 .weak SystemInit_DAVE3
627 .type SystemInit_DAVE3, %function
631 .size SystemInit_DAVE3, . - SystemInit_DAVE3
632 /* ======================================================================== */
633 /* ======================================================================== */
635 /* ======================== Data references =============================== */
636 .equ SCB_VTOR, 0xE000ED08
637 .equ PREF_PCON, 0x58004000
638 .equ SCU_GCU_PEEN, 0x5000413C
639 .equ SCU_GCU_PEFLAG, 0x50004150
640 .equ FLASH_FCON, 0x58002014