2 * -------------------------------------------
3 * MSP432 DriverLib - v3_10_00_09
4 * -------------------------------------------
6 * --COPYRIGHT--,BSD,BSD
7 * Copyright (c) 2014, Texas Instruments Incorporated
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11 * modification, are permitted provided that the following conditions
14 * * Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
17 * * Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
21 * * Neither the name of Texas Instruments Incorporated nor the names of
22 * its contributors may be used to endorse or promote products derived
23 * from this software without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
27 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
29 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
30 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
31 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
32 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
33 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
34 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
35 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37 /* Standard Includes */
40 /* DriverLib Includes */
43 #include <interrupt.h>
44 #include <hw_memmap.h>
46 /* DriverLib internal GPIO register offset for optimized performace */
47 #define OFS_LIB_PAIN ((uint32_t)&P1->IN - (uint32_t)P1)
48 #define OFS_LIB_PAOUT ((uint32_t)&P1->OUT - (uint32_t)P1)
49 #define OFS_LIB_PADIR ((uint32_t)&P1->DIR - (uint32_t)P1)
50 #define OFS_LIB_PAREN ((uint32_t)&P1->REN - (uint32_t)P1)
51 #define OFS_LIB_PADS ((uint32_t)&P1->DS - (uint32_t)P1)
52 #define OFS_LIB_PASEL0 ((uint32_t)&P1->SEL0 - (uint32_t)P1)
53 #define OFS_LIB_PASEL1 ((uint32_t)&P1->SEL1 - (uint32_t)P1)
54 #define OFS_LIB_PAIE ((uint32_t)&P1->IE - (uint32_t)P1)
55 #define OFS_LIB_PAIES ((uint32_t)&P1->IES - (uint32_t)P1)
56 #define OFS_LIB_PAIFG ((uint32_t)&P1->IFG - (uint32_t)P1)
57 #define OFS_LIB_P1IE ((uint32_t)&P1->IE - (uint32_t)P1)
58 #define OFS_LIB_P2IE ((uint32_t)&P2->IE - (uint32_t)P2)
60 static const uint32_t GPIO_PORT_TO_INT[] =
69 static uint32_t GPIO_PORT_TO_BASE[] =
84 void GPIO_setAsOutputPin(uint_fast8_t selectedPort, uint_fast16_t selectedPins)
86 uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
88 HWREG16(baseAddress + OFS_LIB_PASEL0) &= ~selectedPins;
89 HWREG16(baseAddress + OFS_LIB_PASEL1) &= ~selectedPins;
90 HWREG16(baseAddress + OFS_LIB_PADIR) |= selectedPins;
94 void GPIO_setAsInputPin(uint_fast8_t selectedPort, uint_fast16_t selectedPins)
96 uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
98 HWREG16(baseAddress + OFS_LIB_PASEL0) &= ~selectedPins;
99 HWREG16(baseAddress + OFS_LIB_PASEL1) &= ~selectedPins;
100 HWREG16(baseAddress + OFS_LIB_PADIR) &= ~selectedPins;
101 HWREG16(baseAddress + OFS_LIB_PAREN) &= ~selectedPins;
105 void GPIO_setAsPeripheralModuleFunctionOutputPin(uint_fast8_t selectedPort,
106 uint_fast16_t selectedPins, uint_fast8_t mode)
109 uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
111 HWREG16(baseAddress + OFS_LIB_PADIR) |= selectedPins;
114 case GPIO_PRIMARY_MODULE_FUNCTION:
115 HWREG16(baseAddress + OFS_LIB_PASEL0) |= selectedPins;
116 HWREG16(baseAddress + OFS_LIB_PASEL1) &= ~selectedPins;
118 case GPIO_SECONDARY_MODULE_FUNCTION:
119 HWREG16(baseAddress + OFS_LIB_PASEL0) &= ~selectedPins;
120 HWREG16(baseAddress + OFS_LIB_PASEL1) |= selectedPins;
122 case GPIO_TERTIARY_MODULE_FUNCTION:
123 HWREG16(baseAddress + OFS_LIB_PASEL0) |= selectedPins;
124 HWREG16(baseAddress + OFS_LIB_PASEL1) |= selectedPins;
130 void GPIO_setAsPeripheralModuleFunctionInputPin(uint_fast8_t selectedPort,
131 uint_fast16_t selectedPins, uint_fast8_t mode)
133 uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
135 HWREG16(baseAddress + OFS_LIB_PADIR) &= ~selectedPins;
138 case GPIO_PRIMARY_MODULE_FUNCTION:
139 HWREG16(baseAddress + OFS_LIB_PASEL0) |= selectedPins;
140 HWREG16(baseAddress + OFS_LIB_PASEL1) &= ~selectedPins;
142 case GPIO_SECONDARY_MODULE_FUNCTION:
143 HWREG16(baseAddress + OFS_LIB_PASEL0) &= ~selectedPins;
144 HWREG16(baseAddress + OFS_LIB_PASEL1) |= selectedPins;
146 case GPIO_TERTIARY_MODULE_FUNCTION:
147 HWREG16(baseAddress + OFS_LIB_PASEL0) |= selectedPins;
148 HWREG16(baseAddress + OFS_LIB_PASEL1) |= selectedPins;
154 void GPIO_setOutputHighOnPin(uint_fast8_t selectedPort,
155 uint_fast16_t selectedPins)
158 uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
160 HWREG16(baseAddress + OFS_LIB_PAOUT) |= selectedPins;
164 void GPIO_setOutputLowOnPin(uint_fast8_t selectedPort,
165 uint_fast16_t selectedPins)
168 uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
170 HWREG16(baseAddress + OFS_LIB_PAOUT) &= ~selectedPins;
174 void GPIO_toggleOutputOnPin(uint_fast8_t selectedPort,
175 uint_fast16_t selectedPins)
178 uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
180 HWREG16(baseAddress + OFS_LIB_PAOUT) ^= selectedPins;
184 void GPIO_setAsInputPinWithPullDownResistor(uint_fast8_t selectedPort,
185 uint_fast16_t selectedPins)
188 uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
190 HWREG16(baseAddress + OFS_LIB_PASEL0) &= ~selectedPins;
191 HWREG16(baseAddress + OFS_LIB_PASEL1) &= ~selectedPins;
193 HWREG16(baseAddress + OFS_LIB_PADIR) &= ~selectedPins;
194 HWREG16(baseAddress + OFS_LIB_PAREN) |= selectedPins;
195 HWREG16(baseAddress + OFS_LIB_PAOUT) &= ~selectedPins;
199 void GPIO_setAsInputPinWithPullUpResistor(uint_fast8_t selectedPort,
200 uint_fast16_t selectedPins)
203 uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
205 HWREG16(baseAddress + OFS_LIB_PASEL0) &= ~selectedPins;
206 HWREG16(baseAddress + OFS_LIB_PASEL1) &= ~selectedPins;
207 HWREG16(baseAddress + OFS_LIB_PADIR) &= ~selectedPins;
208 HWREG16(baseAddress + OFS_LIB_PAREN) |= selectedPins;
209 HWREG16(baseAddress + OFS_LIB_PAOUT) |= selectedPins;
213 uint8_t GPIO_getInputPinValue(uint_fast8_t selectedPort,
214 uint_fast16_t selectedPins)
216 uint_fast16_t inputPinValue;
217 uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
219 inputPinValue = HWREG16(baseAddress + OFS_LIB_PAIN) & (selectedPins);
221 if (inputPinValue > 0)
222 return GPIO_INPUT_PIN_HIGH;
223 return GPIO_INPUT_PIN_LOW;
227 void GPIO_enableInterrupt(uint_fast8_t selectedPort, uint_fast16_t selectedPins)
230 uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
232 HWREG16(baseAddress + OFS_LIB_PAIE) |= selectedPins;
236 void GPIO_disableInterrupt(uint_fast8_t selectedPort,
237 uint_fast16_t selectedPins)
240 uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
242 HWREG16(baseAddress + OFS_LIB_PAIE) &= ~selectedPins;
246 uint_fast16_t GPIO_getInterruptStatus(uint_fast8_t selectedPort,
247 uint_fast16_t selectedPins)
250 uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
252 return HWREG16(baseAddress + OFS_LIB_PAIFG) & selectedPins;
256 void GPIO_clearInterruptFlag(uint_fast8_t selectedPort,
257 uint_fast16_t selectedPins)
260 uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
263 HWREG16(baseAddress + OFS_LIB_PAIFG) &= ~selectedPins;
267 void GPIO_interruptEdgeSelect(uint_fast8_t selectedPort,
268 uint_fast16_t selectedPins, uint_fast8_t edgeSelect)
271 uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
274 if (GPIO_LOW_TO_HIGH_TRANSITION == edgeSelect)
275 HWREG16(baseAddress + OFS_LIB_PAIES) &= ~selectedPins;
277 HWREG16(baseAddress + OFS_LIB_PAIES) |= selectedPins;
280 uint_fast16_t GPIO_getEnabledInterruptStatus(uint_fast8_t selectedPort)
282 uint_fast16_t pendingInts;
285 pendingInts = GPIO_getInterruptStatus(selectedPort, 0xFFFF);
286 baseAddr = GPIO_PORT_TO_BASE[selectedPort];
288 ASSERT(baseAddr != 0xFFFF);
290 switch (selectedPort)
297 return (HWREG8(baseAddr + OFS_LIB_P1IE) & pendingInts);
303 return (HWREG8(baseAddr + OFS_LIB_P2IE) & pendingInts);
305 return (HWREG16(baseAddr + OFS_LIB_PAIE) & pendingInts);
312 void GPIO_setDriveStrengthHigh(uint_fast8_t selectedPort,
313 uint_fast8_t selectedPins)
317 baseAddr = GPIO_PORT_TO_BASE[selectedPort];
319 HWREG8(baseAddr + OFS_LIB_PADS) |= selectedPins;
323 void GPIO_setDriveStrengthLow(uint_fast8_t selectedPort,
324 uint_fast8_t selectedPins)
328 baseAddr = GPIO_PORT_TO_BASE[selectedPort];
330 HWREG8(baseAddr + OFS_LIB_PADS) &= ~selectedPins;
334 void GPIO_registerInterrupt(uint_fast8_t selectedPort, void (*intHandler)(void))
338 wPortInt = GPIO_PORT_TO_INT[selectedPort];
341 // Register the interrupt handler, returning an error if an error occurs.
343 Interrupt_registerInterrupt(wPortInt, intHandler);
346 // Enable the system control interrupt.
348 Interrupt_enableInterrupt(wPortInt);
352 void GPIO_unregisterInterrupt(uint_fast8_t selectedPort)
356 wPortInt = GPIO_PORT_TO_INT[selectedPort];
359 // Disable the interrupt.
361 Interrupt_disableInterrupt(wPortInt);
364 // Unregister the interrupt handler.
366 Interrupt_unregisterInterrupt(wPortInt);