2 * -------------------------------------------
3 * MSP432 DriverLib - v3_10_00_09
4 * -------------------------------------------
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40 //*****************************************************************************
42 //! \addtogroup spi_api
45 //*****************************************************************************
47 //*****************************************************************************
49 // If building with a C++ compiler, make all of the definitions in this header
52 //*****************************************************************************
63 /* Configuration Defines */
64 #define EUSCI_SPI_CLOCKSOURCE_ACLK EUSCI_B_CTLW0_SSEL__ACLK
65 #define EUSCI_SPI_CLOCKSOURCE_SMCLK EUSCI_B_CTLW0_SSEL__SMCLK
67 #define EUSCI_SPI_MSB_FIRST EUSCI_B_CTLW0_MSB
68 #define EUSCI_SPI_LSB_FIRST 0x00
70 #define EUSCI_SPI_BUSY EUSCI_A_STATW_BUSY
71 #define EUSCI_SPI_NOT_BUSY 0x00
73 #define EUSCI_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT 0x00
74 #define EUSCI_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT EUSCI_B_CTLW0_CKPH
76 #define EUSCI_SPI_3PIN EUSCI_B_CTLW0_MODE_0
77 #define EUSCI_SPI_4PIN_UCxSTE_ACTIVE_HIGH EUSCI_B_CTLW0_MODE_1
78 #define EUSCI_SPI_4PIN_UCxSTE_ACTIVE_LOW EUSCI_B_CTLW0_MODE_2
80 #define EUSCI_SPI_CLOCKPOLARITY_INACTIVITY_HIGH EUSCI_B_CTLW0_CKPL
81 #define EUSCI_SPI_CLOCKPOLARITY_INACTIVITY_LOW 0x00
83 #define EUSCI_SPI_TRANSMIT_INTERRUPT EUSCI_B__TXIE
84 #define EUSCI_SPI_RECEIVE_INTERRUPT EUSCI_B__RXIE
86 #define EUSCI_SPI_ENABLE_SIGNAL_FOR_4WIRE_SLAVE EUSCI_B_CTLW0_STEM
87 #define EUSCI_SPI_PREVENT_CONFLICTS_WITH_OTHER_MASTERS 0x00
89 //*****************************************************************************
91 //! ypedef eUSCI_SPI_MasterConfig
92 //! \brief Type definition for \link _eUSCI_SPI_MasterConfig \endlink structure
94 //! \struct _eUSCI_SPI_MasterConfig
95 //! \brief Configuration structure for master mode in the \b SPI module. See
96 //! \link SPI_initMaster \endlink for parameter documentation.
98 //*****************************************************************************
99 typedef struct _eUSCI_SPI_MasterConfig
101 uint_fast8_t selectClockSource;
102 uint32_t clockSourceFrequency;
103 uint32_t desiredSpiClock;
104 uint_fast16_t msbFirst;
105 uint_fast16_t clockPhase;
106 uint_fast16_t clockPolarity;
107 uint_fast16_t spiMode;
108 } eUSCI_SPI_MasterConfig;
110 //*****************************************************************************
112 //! ypedef eUSCI_SPI_SlaveConfig
113 //! \brief Type definition for \link _eUSCI_SPI_SlaveConfig \endlink structure
115 //! \struct _eUSCI_SPI_SlaveConfig
116 //! \brief Configuration structure for slave mode in the \b SPI module. See
117 //! \link SPI_initSlave \endlink for parameter documentation.
119 //*****************************************************************************
120 typedef struct _eUSCI_SPI_SlaveConfig
122 uint_fast16_t msbFirst;
123 uint_fast16_t clockPhase;
124 uint_fast16_t clockPolarity;
125 uint_fast16_t spiMode;
126 } eUSCI_SPI_SlaveConfig;
128 //*****************************************************************************
130 //! Initializes the SPI Master block.
132 //! \param moduleInstance is the instance of the eUSCI A/B module. Valid
133 //! parameters vary from part to part, but can include:
134 //! - \b EUSCI_A0_BASE
135 //! - \b EUSCI_A1_BASE
136 //! - \b EUSCI_A2_BASE
137 //! - \b EUSCI_A3_BASE
138 //! - \b EUSCI_B0_BASE
139 //! - \b EUSCI_B1_BASE
140 //! - \b EUSCI_B2_BASE
141 //! - \b EUSCI_B3_BASE
142 //! \param config Configuration structure for SPI master mode
145 //! <b>Configuration options for \link eUSCI_SPI_MasterConfig \endlink structure.</b>
148 //! \param selectClockSource selects clock source. Valid values are
149 //! - \b EUSCI_SPI_CLOCKSOURCE_ACLK
150 //! - \b EUSCI_SPI_CLOCKSOURCE_SMCLK
151 //! \param clockSourceFrequency is the frequency of the selected clock source
152 //! \param desiredSpiClock is the desired clock rate for SPI communication
153 //! \param msbFirst controls the direction of the receive and transmit shift
154 //! register. Valid values are
155 //! - \b EUSCI_SPI_MSB_FIRST
156 //! - \b EUSCI_SPI_LSB_FIRST [Default Value]
157 //! \param clockPhase is clock phase select.
159 //! - \b EUSCI_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT
161 //! - \b EUSCI_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT
162 //! \param clockPolarity is clock polarity select.
164 //! - \b EUSCI_SPI_CLOCKPOLARITY_INACTIVITY_HIGH
165 //! - \b EUSCI_SPI_CLOCKPOLARITY_INACTIVITY_LOW [Default Value]
166 //! \param spiMode is SPI mode select.
168 //! - \b EUSCI_SPI_3PIN [Default Value]
169 //! - \b EUSCI_SPI_4PIN_UCxSTE_ACTIVE_HIGH
170 //! - \b EUSCI_SPI_4PIN_UCxSTE_ACTIVE_LOW
171 //! Upon successful initialization of the SPI master block, this function
172 //! will have set the bus speed for the master, but the SPI Master block
173 //! still remains disabled and must be enabled with SPI_enableModule()
175 //! Modified bits are \b UCCKPH, \b UCCKPL, \b UC7BIT, \b UCMSB,\b UCSSELx,
176 //! \b UCSWRST bits of \b UCAxCTLW0 register
180 //*****************************************************************************
181 extern bool SPI_initMaster(uint32_t moduleInstance,
182 const eUSCI_SPI_MasterConfig *config);
184 //*****************************************************************************
186 //! Selects 4Pin Functionality
188 //! \param moduleInstance is the instance of the eUSCI A/B module. Valid
189 //! parameters vary from part to part, but can include:
190 //! - \b EUSCI_A0_BASE
191 //! - \b EUSCI_A1_BASE
192 //! - \b EUSCI_A2_BASE
193 //! - \b EUSCI_A3_BASE
194 //! - \b EUSCI_B0_BASE
195 //! - \b EUSCI_B1_BASE
196 //! - \b EUSCI_B2_BASE
197 //! - \b EUSCI_B3_BASE
199 //! \param select4PinFunctionality selects Clock source. Valid values are
200 //! - \b EUSCI_SPI_PREVENT_CONFLICTS_WITH_OTHER_MASTERS
201 //! - \b EUSCI_SPI_ENABLE_SIGNAL_FOR_4WIRE_SLAVE
202 //! This function should be invoked only in 4-wire mode. Invoking this function
203 //! has no effect in 3-wire mode.
205 //! Modified bits are \b UCSTEM bit of \b UCAxCTLW0 register
209 //*****************************************************************************
210 extern void SPI_selectFourPinFunctionality(uint32_t moduleInstance,
211 uint_fast8_t select4PinFunctionality);
213 //*****************************************************************************
215 //! Initializes the SPI Master clock.At the end of this function call, SPI
216 //! module is left enabled.
218 //! \param moduleInstance is the instance of the eUSCI A/B module. Valid
219 //! parameters vary from part to part, but can include:
220 //! - \b EUSCI_A0_BASE
221 //! - \b EUSCI_A1_BASE
222 //! - \b EUSCI_A2_BASE
223 //! - \b EUSCI_A3_BASE
224 //! - \b EUSCI_B0_BASE
225 //! - \b EUSCI_B1_BASE
226 //! - \b EUSCI_B2_BASE
227 //! - \b EUSCI_B3_BASE
229 //! \param clockSourceFrequency is the frequency of the selected clock source
230 //! \param desiredSpiClock is the desired clock rate for SPI communication.
232 //! Modified bits are \b UCSWRST bit of \b UCAxCTLW0 register and
233 //! \b UCAxBRW register
237 //*****************************************************************************
238 extern void SPI_changeMasterClock(uint32_t moduleInstance,
239 uint32_t clockSourceFrequency, uint32_t desiredSpiClock);
241 //*****************************************************************************
243 //! Initializes the SPI Slave block.
245 //! \param moduleInstance is the instance of the eUSCI A/B module. Valid
246 //! parameters vary from part to part, but can include:
247 //! - \b EUSCI_A0_BASE
248 //! - \b EUSCI_A1_BASE
249 //! - \b EUSCI_A2_BASE
250 //! - \b EUSCI_A3_BASE
251 //! - \b EUSCI_B0_BASE
252 //! - \b EUSCI_B1_BASE
253 //! - \b EUSCI_B2_BASE
254 //! - \b EUSCI_B3_BASE
255 //! \param config Configuration structure for SPI slave mode
258 //! <b>Configuration options for \link eUSCI_SPI_SlaveConfig \endlink structure.</b>
261 //! \param msbFirst controls the direction of the receive and transmit shift
262 //! register. Valid values are
263 //! - \b EUSCI_SPI_MSB_FIRST
264 //! - \b EUSCI_SPI_LSB_FIRST [Default Value]
265 //! \param clockPhase is clock phase select.
267 //! - \b EUSCI_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT
269 //! - \b EUSCI_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT
270 //! \param clockPolarity is clock polarity select.
272 //! - \b EUSCI_SPI_CLOCKPOLARITY_INACTIVITY_HIGH
273 //! - \b EUSCI_SPI_CLOCKPOLARITY_INACTIVITY_LOW [Default Value]
274 //! \param spiMode is SPI mode select.
276 //! - \b EUSCI_SPI_3PIN [Default Value]
277 //! - \b EUSCI_SPI_4PIN_UCxSTE_ACTIVE_HIGH
278 //! - \b EUSCI_SPI_4PIN_UCxSTE_ACTIVE_LOW
279 //! Upon successful initialization of the SPI slave block, this function
280 //! will have initialized the slave block, but the SPI Slave block
281 //! still remains disabled and must be enabled with SPI_enableModule()
283 //! Modified bits are \b UCMSB, \b UC7BIT, \b UCMST, \b UCCKPL, \b UCCKPH,
284 //! \b UCMODE, \b UCSWRST bits of \b UCAxCTLW0
287 //*****************************************************************************
288 extern bool SPI_initSlave(uint32_t moduleInstance,
289 const eUSCI_SPI_SlaveConfig *config);
291 //*****************************************************************************
293 //! Changes the SPI clock phase and polarity.At the end of this function call,
294 //! SPI module is left enabled.
296 //! \param moduleInstance is the instance of the eUSCI A/B module. Valid
297 //! parameters vary from part to part, but can include:
298 //! - \b EUSCI_A0_BASE
299 //! - \b EUSCI_A1_BASE
300 //! - \b EUSCI_A2_BASE
301 //! - \b EUSCI_A3_BASE
302 //! - \b EUSCI_B0_BASE
303 //! - \b EUSCI_B1_BASE
304 //! - \b EUSCI_B2_BASE
305 //! - \b EUSCI_B3_BASE
307 //! \param clockPhase is clock phase select.
308 //! Valid values are:
309 //! - \b EUSCI_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT
311 //! - \b EUSCI_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT
312 //! \param clockPolarity is clock polarity select.
313 //! Valid values are:
314 //! - \b EUSCI_SPI_CLOCKPOLARITY_INACTIVITY_HIGH
315 //! - \b EUSCI_SPI_CLOCKPOLARITY_INACTIVITY_LOW [Default Value]
317 //! Modified bits are \b UCSWRST, \b UCCKPH, \b UCCKPL, \b UCSWRST bits of
322 //*****************************************************************************
323 extern void SPI_changeClockPhasePolarity(uint32_t moduleInstance,
324 uint_fast16_t clockPhase, uint_fast16_t clockPolarity);
326 //*****************************************************************************
328 //! Transmits a byte from the SPI Module.
330 //! \param moduleInstance is the instance of the eUSCI A/B module. Valid
331 //! parameters vary from part to part, but can include:
332 //! - \b EUSCI_A0_BASE
333 //! - \b EUSCI_A1_BASE
334 //! - \b EUSCI_A2_BASE
335 //! - \b EUSCI_A3_BASE
336 //! - \b EUSCI_B0_BASE
337 //! - \b EUSCI_B1_BASE
338 //! - \b EUSCI_B2_BASE
339 //! - \b EUSCI_B3_BASE
341 //! \param transmitData data to be transmitted from the SPI module
343 //! This function will place the supplied data into SPI transmit data register
344 //! to start transmission
346 //! Modified register is \b UCAxTXBUF
350 //*****************************************************************************
351 extern void SPI_transmitData(uint32_t moduleInstance,
352 uint_fast8_t transmitData);
354 //*****************************************************************************
356 //! Receives a byte that has been sent to the SPI Module.
358 //! \param moduleInstance is the instance of the eUSCI A/B module. Valid
359 //! parameters vary from part to part, but can include:
360 //! - \b EUSCI_A0_BASE
361 //! - \b EUSCI_A1_BASE
362 //! - \b EUSCI_A2_BASE
363 //! - \b EUSCI_A3_BASE
364 //! - \b EUSCI_B0_BASE
365 //! - \b EUSCI_B1_BASE
366 //! - \b EUSCI_B2_BASE
367 //! - \b EUSCI_B3_BASE
370 //! This function reads a byte of data from the SPI receive data Register.
372 //! \return Returns the byte received from by the SPI module, cast as an
375 //*****************************************************************************
376 extern uint8_t SPI_receiveData(uint32_t moduleInstance);
378 //*****************************************************************************
380 //! Enables the SPI block.
382 //! \param moduleInstance is the instance of the eUSCI A/B module. Valid
383 //! parameters vary from part to part, but can include:
384 //! - \b EUSCI_A0_BASE
385 //! - \b EUSCI_A1_BASE
386 //! - \b EUSCI_A2_BASE
387 //! - \b EUSCI_A3_BASE
388 //! - \b EUSCI_B0_BASE
389 //! - \b EUSCI_B1_BASE
390 //! - \b EUSCI_B2_BASE
391 //! - \b EUSCI_B3_BASE
394 //! This will enable operation of the SPI block.
395 //! Modified bits are \b UCSWRST bit of \b UCAxCTLW0 register.
399 //*****************************************************************************
400 extern void SPI_enableModule(uint32_t moduleInstance);
402 //*****************************************************************************
404 //! Disables the SPI block.
406 //! \param moduleInstance is the instance of the eUSCI A/B module. Valid
407 //! parameters vary from part to part, but can include:
408 //! - \b EUSCI_A0_BASE
409 //! - \b EUSCI_A1_BASE
410 //! - \b EUSCI_A2_BASE
411 //! - \b EUSCI_A3_BASE
412 //! - \b EUSCI_B0_BASE
413 //! - \b EUSCI_B1_BASE
414 //! - \b EUSCI_B2_BASE
415 //! - \b EUSCI_B3_BASE
418 //! This will disable operation of the SPI block.
420 //! Modified bits are \b UCSWRST bit of \b UCAxCTLW0 register.
424 //*****************************************************************************
425 extern void SPI_disableModule(uint32_t moduleInstance);
427 //*****************************************************************************
429 //! Returns the address of the RX Buffer of the SPI for the DMA module.
431 //! \param moduleInstance is the instance of the eUSCI A/B module. Valid
432 //! parameters vary from part to part, but can include:
433 //! - \b EUSCI_A0_BASE
434 //! - \b EUSCI_A1_BASE
435 //! - \b EUSCI_A2_BASE
436 //! - \b EUSCI_A3_BASE
437 //! - \b EUSCI_B0_BASE
438 //! - \b EUSCI_B1_BASE
439 //! - \b EUSCI_B2_BASE
440 //! - \b EUSCI_B3_BASE
443 //! Returns the address of the SPI RX Buffer. This can be used in conjunction
444 //! with the DMA to store the received data directly to memory.
448 //*****************************************************************************
449 extern uint32_t SPI_getReceiveBufferAddressForDMA(uint32_t moduleInstance);
451 //*****************************************************************************
453 //! Returns the address of the TX Buffer of the SPI for the DMA module.
455 //! \param moduleInstance is the instance of the eUSCI A/B module. Valid
456 //! parameters vary from part to part, but can include:
457 //! - \b EUSCI_A0_BASE
458 //! - \b EUSCI_A1_BASE
459 //! - \b EUSCI_A2_BASE
460 //! - \b EUSCI_A3_BASE
461 //! - \b EUSCI_B0_BASE
462 //! - \b EUSCI_B1_BASE
463 //! - \b EUSCI_B2_BASE
464 //! - \b EUSCI_B3_BASE
467 //! Returns the address of the SPI TX Buffer. This can be used in conjunction
468 //! with the DMA to obtain transmitted data directly from memory.
472 //*****************************************************************************
473 extern uint32_t SPI_getTransmitBufferAddressForDMA(uint32_t moduleInstance);
475 //*****************************************************************************
477 //! Indicates whether or not the SPI bus is busy.
479 //! \param moduleInstance is the instance of the eUSCI A/B module. Valid
480 //! parameters vary from part to part, but can include:
481 //! - \b EUSCI_A0_BASE
482 //! - \b EUSCI_A1_BASE
483 //! - \b EUSCI_A2_BASE
484 //! - \b EUSCI_A3_BASE
485 //! - \b EUSCI_B0_BASE
486 //! - \b EUSCI_B1_BASE
487 //! - \b EUSCI_B2_BASE
488 //! - \b EUSCI_B3_BASE
491 //! This function returns an indication of whether or not the SPI bus is
492 //! busy.This function checks the status of the bus via UCBBUSY bit
494 //! \return EUSCI_SPI_BUSY if the SPI module transmitting or receiving
495 //! is busy; otherwise, returns EUSCI_SPI_NOT_BUSY.
497 //*****************************************************************************
498 extern uint_fast8_t SPI_isBusy(uint32_t moduleInstance);
500 //*****************************************************************************
502 //! Enables individual SPI interrupt sources.
504 //! \param moduleInstance is the instance of the eUSCI A/B module. Valid
505 //! parameters vary from part to part, but can include:
506 //! - \b EUSCI_A0_BASE
507 //! - \b EUSCI_A1_BASE
508 //! - \b EUSCI_A2_BASE
509 //! - \b EUSCI_A3_BASE
510 //! - \b EUSCI_B0_BASE
511 //! - \b EUSCI_B1_BASE
512 //! - \b EUSCI_B2_BASE
513 //! - \b EUSCI_B3_BASE
515 //! \param mask is the bit mask of the interrupt sources to be enabled.
517 //! Enables the indicated SPI interrupt sources. Only the sources that
518 //! are enabled can be reflected to the processor interrupt; disabled sources
519 //! have no effect on the processor.
521 //! The mask parameter is the logical OR of any of the following:
522 //! - \b EUSCI_SPI_RECEIVE_INTERRUPT Receive interrupt
523 //! - \b EUSCI_SPI_TRANSMIT_INTERRUPT Transmit interrupt
525 //! Modified registers are \b UCAxIFG and \b UCAxIE
529 //*****************************************************************************
530 extern void SPI_enableInterrupt(uint32_t moduleInstance, uint_fast8_t mask);
532 //*****************************************************************************
534 //! Disables individual SPI interrupt sources.
536 //! \param moduleInstance is the instance of the eUSCI A/B module. Valid
537 //! parameters vary from part to part, but can include:
538 //! - \b EUSCI_A0_BASE
539 //! - \b EUSCI_A1_BASE
540 //! - \b EUSCI_A2_BASE
541 //! - \b EUSCI_A3_BASE
542 //! - \b EUSCI_B0_BASE
543 //! - \b EUSCI_B1_BASE
544 //! - \b EUSCI_B2_BASE
545 //! - \b EUSCI_B3_BASE
547 //! \param mask is the bit mask of the interrupt sources to be
550 //! Disables the indicated SPI interrupt sources. Only the sources that
551 //! are enabled can be reflected to the processor interrupt; disabled sources
552 //! have no effect on the processor.
554 //! The mask parameter is the logical OR of any of the following:
555 //! - \b EUSCI_SPI_RECEIVE_INTERRUPT Receive interrupt
556 //! - \b EUSCI_SPI_TRANSMIT_INTERRUPT Transmit interrupt
558 //! Modified register is \b UCAxIE
562 //*****************************************************************************
563 extern void SPI_disableInterrupt(uint32_t moduleInstance, uint_fast8_t mask);
565 //*****************************************************************************
567 //! Gets the current SPI interrupt status.
569 //! \param moduleInstance is the instance of the eUSCI A/B module. Valid
570 //! parameters vary from part to part, but can include:
571 //! - \b EUSCI_A0_BASE
572 //! - \b EUSCI_A1_BASE
573 //! - \b EUSCI_A2_BASE
574 //! - \b EUSCI_A3_BASE
575 //! - \b EUSCI_B0_BASE
576 //! - \b EUSCI_B1_BASE
577 //! - \b EUSCI_B2_BASE
578 //! - \b EUSCI_B3_BASE
579 //! \param mask Mask of interrupt to filter. This can include:
580 //! - \b EUSCI_SPI_RECEIVE_INTERRUPT -Receive interrupt
581 //! - \b EUSCI_SPI_TRANSMIT_INTERRUPT - Transmit interrupt
583 //! Modified registers are \b UCAxIFG.
585 //! \return The current interrupt status as the mask of the set flags
586 //! Mask parameter can be either any of the following selection:
587 //! - \b EUSCI_SPI_RECEIVE_INTERRUPT -Receive interrupt
588 //! - \b EUSCI_SPI_TRANSMIT_INTERRUPT - Transmit interrupt
590 //*****************************************************************************
591 extern uint_fast8_t SPI_getInterruptStatus(uint32_t moduleInstance,
594 //*****************************************************************************
596 //! Gets the current SPI interrupt status masked with the enabled interrupts.
597 //! This function is useful to call in ISRs to get a list of pending
598 //! interrupts that are actually enabled and could have caused
601 //! \param moduleInstance is the instance of the eUSCI A/B module. Valid
602 //! parameters vary from part to part, but can include:
603 //! - \b EUSCI_A0_BASE
604 //! - \b EUSCI_A1_BASE
605 //! - \b EUSCI_A2_BASE
606 //! - \b EUSCI_A3_BASE
607 //! - \b EUSCI_B0_BASE
608 //! - \b EUSCI_B1_BASE
609 //! - \b EUSCI_B2_BASE
610 //! - \b EUSCI_B3_BASE
612 //! Modified registers are \b UCAxIFG.
614 //! \return The current interrupt status as the mask of the set flags
615 //! Mask parameter can be either any of the following selection:
616 //! - \b EUSCI_SPI_RECEIVE_INTERRUPT -Receive interrupt
617 //! - \b EUSCI_SPI_TRANSMIT_INTERRUPT - Transmit interrupt
619 //*****************************************************************************
620 extern uint_fast8_t SPI_getEnabledInterruptStatus(uint32_t moduleInstance);
622 //*****************************************************************************
624 //! Clears the selected SPI interrupt status flag.
626 //! \param moduleInstance is the instance of the eUSCI A/B module. Valid
627 //! parameters vary from part to part, but can include:
628 //! - \b EUSCI_A0_BASE
629 //! - \b EUSCI_A1_BASE
630 //! - \b EUSCI_A2_BASE
631 //! - \b EUSCI_A3_BASE
632 //! - \b EUSCI_B0_BASE
633 //! - \b EUSCI_B1_BASE
634 //! - \b EUSCI_B2_BASE
635 //! - \b EUSCI_B3_BASE
637 //! \param mask is the masked interrupt flag to be cleared.
639 //! The mask parameter is the logical OR of any of the following:
640 //! - \b EUSCI_SPI_RECEIVE_INTERRUPT -Receive interrupt
641 //! - \b EUSCI_SPI_TRANSMIT_INTERRUPT - Transmit interrupt
642 //! Modified registers are \b UCAxIFG.
646 //*****************************************************************************
647 extern void SPI_clearInterruptFlag(uint32_t moduleInstance, uint_fast8_t mask);
649 //*****************************************************************************
651 //! Registers an interrupt handler for the timer capture compare interrupt.
653 //! \param moduleInstance is the instance of the eUSCI (SPI) module. Valid
654 //! parameters vary from part to part, but can include:
655 //! - \b EUSCI_A0_BASE
656 //! - \b EUSCI_A1_BASE
657 //! - \b EUSCI_A2_BASE
658 //! - \b EUSCI_A3_BASE
659 //! - \b EUSCI_B0_BASE
660 //! - \b EUSCI_B1_BASE
661 //! - \b EUSCI_B2_BASE
662 //! - \b EUSCI_B3_BASE
663 //! It is important to note that for eUSCI modules, only "B" modules such as
664 //! EUSCI_B0 can be used. "A" modules such as EUSCI_A0 do not support the
667 //! \param intHandler is a pointer to the function to be called when the
668 //! timer capture compare interrupt occurs.
670 //! This function registers the handler to be called when a timer
671 //! interrupt occurs. This function enables the global interrupt in the
672 //! interrupt controller; specific SPI interrupts must be enabled
673 //! via SPI_enableInterrupt(). It is the interrupt handler's responsibility to
674 //! clear the interrupt source via SPI_clearInterruptFlag().
678 //*****************************************************************************
679 extern void SPI_registerInterrupt(uint32_t moduleInstance,
680 void (*intHandler)(void));
682 //*****************************************************************************
684 //! Unregisters the interrupt handler for the timer
686 //! \param moduleInstance is the instance of the eUSCI A/B module. Valid
687 //! parameters vary from part to part, but can include:
688 //! - \b EUSCI_A0_BASE
689 //! - \b EUSCI_A1_BASE
690 //! - \b EUSCI_A2_BASE
691 //! - \b EUSCI_A3_BASE
692 //! - \b EUSCI_B0_BASE
693 //! - \b EUSCI_B1_BASE
694 //! - \b EUSCI_B2_BASE
695 //! - \b EUSCI_B3_BASE
697 //! This function unregisters the handler to be called when timer
698 //! interrupt occurs. This function also masks off the interrupt in the
699 //! interrupt controller so that the interrupt handler no longer is called.
701 //! \sa Interrupt_registerInterrupt() for important information about
702 //! registering interrupt handlers.
706 //*****************************************************************************
707 extern void SPI_unregisterInterrupt(uint32_t moduleInstance);
709 /* Backwards Compatibility Layer */
710 #define EUSCI_B_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT 0x00
711 #define EUSCI_B_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT UCCKPH
713 #define EUSCI_B_SPI_MSB_FIRST UCMSB
714 #define EUSCI_B_SPI_LSB_FIRST 0x00
716 #define EUSCI_B_SPI_CLOCKPOLARITY_INACTIVITY_HIGH UCCKPL
717 #define EUSCI_B_SPI_CLOCKPOLARITY_INACTIVITY_LOW 0x00
719 #define EUSCI_B_SPI_CLOCKSOURCE_ACLK UCSSEL__ACLK
720 #define EUSCI_B_SPI_CLOCKSOURCE_SMCLK UCSSEL__SMCLK
722 #define EUSCI_B_SPI_3PIN UCMODE_0
723 #define EUSCI_B_SPI_4PIN_UCxSTE_ACTIVE_HIGH UCMODE_1
724 #define EUSCI_B_SPI_4PIN_UCxSTE_ACTIVE_LOW UCMODE_2
726 #define EUSCI_B_SPI_PREVENT_CONFLICTS_WITH_OTHER_MASTERS 0x00
727 #define EUSCI_B_SPI_ENABLE_SIGNAL_FOR_4WIRE_SLAVE UCSTEM
729 #define EUSCI_B_SPI_TRANSMIT_INTERRUPT UCTXIE
730 #define EUSCI_B_SPI_RECEIVE_INTERRUPT UCRXIE
732 #define EUSCI_B_SPI_BUSY UCBUSY
733 #define EUSCI_B_SPI_NOT_BUSY 0x00
735 #define EUSCI_A_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT 0x00
736 #define EUSCI_A_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT UCCKPH
738 #define EUSCI_A_SPI_MSB_FIRST UCMSB
739 #define EUSCI_A_SPI_LSB_FIRST 0x00
741 #define EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_HIGH UCCKPL
742 #define EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_LOW 0x00
744 #define EUSCI_A_SPI_CLOCKSOURCE_ACLK UCSSEL__ACLK
745 #define EUSCI_A_SPI_CLOCKSOURCE_SMCLK UCSSEL__SMCLK
747 #define EUSCI_A_SPI_3PIN UCMODE_0
748 #define EUSCI_A_SPI_4PIN_UCxSTE_ACTIVE_HIGH UCMODE_1
749 #define EUSCI_A_SPI_4PIN_UCxSTE_ACTIVE_LOW UCMODE_2
751 #define EUSCI_A_SPI_PREVENT_CONFLICTS_WITH_OTHER_MASTERS 0x00
752 #define EUSCI_A_SPI_ENABLE_SIGNAL_FOR_4WIRE_SLAVE UCSTEM
754 #define EUSCI_A_SPI_TRANSMIT_INTERRUPT UCTXIE
755 #define EUSCI_A_SPI_RECEIVE_INTERRUPT UCRXIE
757 #define EUSCI_A_SPI_BUSY UCBUSY
758 #define EUSCI_A_SPI_NOT_BUSY 0x00
760 extern void EUSCI_A_SPI_select4PinFunctionality(uint32_t baseAddress,
761 uint8_t select4PinFunctionality);
762 extern void EUSCI_A_SPI_masterChangeClock(uint32_t baseAddress,
763 uint32_t clockSourceFrequency, uint32_t desiredSpiClock);
764 extern bool EUSCI_A_SPI_slaveInit(uint32_t baseAddress, uint16_t msbFirst,
765 uint16_t clockPhase, uint16_t clockPolarity, uint16_t spiMode);
766 extern void EUSCI_A_SPI_changeClockPhasePolarity(uint32_t baseAddress,
767 uint16_t clockPhase, uint16_t clockPolarity);
768 extern void EUSCI_A_SPI_transmitData(uint32_t baseAddress,
769 uint8_t transmitData);
770 extern uint8_t EUSCI_A_SPI_receiveData(uint32_t baseAddress);
771 extern void EUSCI_A_SPI_enableInterrupt(uint32_t baseAddress, uint8_t mask);
772 extern void EUSCI_A_SPI_disableInterrupt(uint32_t baseAddress, uint8_t mask);
773 extern uint8_t EUSCI_A_SPI_getInterruptStatus(uint32_t baseAddress,
775 extern void EUSCI_A_SPI_clearInterruptFlag(uint32_t baseAddress, uint8_t mask);
776 extern void EUSCI_A_SPI_enable(uint32_t baseAddress);
777 extern void EUSCI_A_SPI_disable(uint32_t baseAddress);
778 extern uint32_t EUSCI_A_SPI_getReceiveBufferAddressForDMA(uint32_t baseAddress);
779 extern uint32_t EUSCI_A_SPI_getTransmitBufferAddressForDMA(
780 uint32_t baseAddress);
781 extern bool EUSCI_A_SPI_isBusy(uint32_t baseAddress);
782 extern void EUSCI_B_SPI_select4PinFunctionality(uint32_t baseAddress,
783 uint8_t select4PinFunctionality);
784 extern void EUSCI_B_SPI_masterChangeClock(uint32_t baseAddress,
785 uint32_t clockSourceFrequency, uint32_t desiredSpiClock);
786 extern bool EUSCI_B_SPI_slaveInit(uint32_t baseAddress, uint16_t msbFirst,
787 uint16_t clockPhase, uint16_t clockPolarity, uint16_t spiMode);
788 extern void EUSCI_B_SPI_changeClockPhasePolarity(uint32_t baseAddress,
789 uint16_t clockPhase, uint16_t clockPolarity);
790 extern void EUSCI_B_SPI_transmitData(uint32_t baseAddress,
791 uint8_t transmitData);
792 extern uint8_t EUSCI_B_SPI_receiveData(uint32_t baseAddress);
793 extern void EUSCI_B_SPI_enableInterrupt(uint32_t baseAddress, uint8_t mask);
794 extern void EUSCI_B_SPI_disableInterrupt(uint32_t baseAddress, uint8_t mask);
795 extern uint8_t EUSCI_B_SPI_getInterruptStatus(uint32_t baseAddress,
797 extern void EUSCI_B_SPI_clearInterruptFlag(uint32_t baseAddress, uint8_t mask);
798 extern void EUSCI_B_SPI_enable(uint32_t baseAddress);
799 extern void EUSCI_B_SPI_disable(uint32_t baseAddress);
800 extern uint32_t EUSCI_B_SPI_getReceiveBufferAddressForDMA(uint32_t baseAddress);
801 extern uint32_t EUSCI_B_SPI_getTransmitBufferAddressForDMA(
802 uint32_t baseAddress);
803 extern bool EUSCI_B_SPI_isBusy(uint32_t baseAddress);
805 //*****************************************************************************
807 // Mark the end of the C bindings section for C++ compilers.
809 //*****************************************************************************
814 //*****************************************************************************
816 // Close the Doxygen group.
819 //*****************************************************************************