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   1 /*
   2  * -------------------------------------------
   3  *    MSP432 DriverLib - v3_10_00_09
   4  * -------------------------------------------
   5  *
   6  * --COPYRIGHT--,BSD,BSD
   7  * Copyright (c) 2014, Texas Instruments Incorporated
   8  * All rights reserved.
   9  *
  10  * Redistribution and use in source and binary forms, with or without
  11  * modification, are permitted provided that the following conditions
  12  * are met:
  13  *
  14  * *  Redistributions of source code must retain the above copyright
  15  *    notice, this list of conditions and the following disclaimer.
  16  *
  17  * *  Redistributions in binary form must reproduce the above copyright
  18  *    notice, this list of conditions and the following disclaimer in the
  19  *    documentation and/or other materials provided with the distribution.
  20  *
  21  * *  Neither the name of Texas Instruments Incorporated nor the names of
  22  *    its contributors may be used to endorse or promote products derived
  23  *    from this software without specific prior written permission.
  24  *
  25  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  26  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
  27  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  28  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
  29  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
  30  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  31  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
  32  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  33  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
  34  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
  35  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  36  * --/COPYRIGHT--*/
  37 #include <timer_a.h>
  38 #include <interrupt.h>
  39 #include <debug.h>
  40
  41 static void privateTimer_AProcessClockSourceDivider(uint32_t timer,
  42         uint16_t clockSourceDivider)
  43 {
  44     TIMER_A_CMSIS(timer)->CTL &= ~TIMER_A_CTL_ID__8;
  45     TIMER_A_CMSIS(timer)->EX0 &= ~TIMER_A_EX0_IDEX_MASK;
  46
  47     switch (clockSourceDivider)
  48     {
  49     case TIMER_A_CLOCKSOURCE_DIVIDER_1:
  50     case TIMER_A_CLOCKSOURCE_DIVIDER_2:
  51         TIMER_A_CMSIS(timer)->CTL |= ((clockSourceDivider - 1) << 6);
  52         TIMER_A_CMSIS(timer)->EX0 = TIMER_A_EX0_TAIDEX_0;
  53         break;
  54     case TIMER_A_CLOCKSOURCE_DIVIDER_4:
  55         TIMER_A_CMSIS(timer)->CTL |= TIMER_A_CTL_ID__4;
  56         TIMER_A_CMSIS(timer)->EX0 = TIMER_A_EX0_TAIDEX_0;
  57         break;
  58     case TIMER_A_CLOCKSOURCE_DIVIDER_8:
  59         TIMER_A_CMSIS(timer)->CTL |= TIMER_A_CTL_ID__8;
  60         TIMER_A_CMSIS(timer)->EX0 = TIMER_A_EX0_TAIDEX_0;
  61         break;
  62     case TIMER_A_CLOCKSOURCE_DIVIDER_3:
  63     case TIMER_A_CLOCKSOURCE_DIVIDER_5:
  64     case TIMER_A_CLOCKSOURCE_DIVIDER_6:
  65     case TIMER_A_CLOCKSOURCE_DIVIDER_7:
  66         TIMER_A_CMSIS(timer)->CTL |= TIMER_A_CTL_ID__1;
  67         TIMER_A_CMSIS(timer)->EX0 = (clockSourceDivider - 1);
  68         break;
  69
  70     case TIMER_A_CLOCKSOURCE_DIVIDER_10:
  71     case TIMER_A_CLOCKSOURCE_DIVIDER_12:
  72     case TIMER_A_CLOCKSOURCE_DIVIDER_14:
  73     case TIMER_A_CLOCKSOURCE_DIVIDER_16:
  74         TIMER_A_CMSIS(timer)->CTL |= TIMER_A_CTL_ID__2;
  75         TIMER_A_CMSIS(timer)->EX0 = (clockSourceDivider / 2 - 1);
  76         break;
  77
  78     case TIMER_A_CLOCKSOURCE_DIVIDER_20:
  79     case TIMER_A_CLOCKSOURCE_DIVIDER_24:
  80     case TIMER_A_CLOCKSOURCE_DIVIDER_28:
  81     case TIMER_A_CLOCKSOURCE_DIVIDER_32:
  82         TIMER_A_CMSIS(timer)->CTL |= TIMER_A_CTL_ID__4;
  83         TIMER_A_CMSIS(timer)->EX0 = (clockSourceDivider / 4 - 1);
  84         break;
  85     case TIMER_A_CLOCKSOURCE_DIVIDER_40:
  86     case TIMER_A_CLOCKSOURCE_DIVIDER_48:
  87     case TIMER_A_CLOCKSOURCE_DIVIDER_56:
  88     case TIMER_A_CLOCKSOURCE_DIVIDER_64:
  89         TIMER_A_CMSIS(timer)->CTL |= TIMER_A_CTL_ID__8;
  90         TIMER_A_CMSIS(timer)->EX0 = (clockSourceDivider / 8 - 1);
  91         break;
  92     }
  93 }
  94
  95 void Timer_A_startCounter(uint32_t timer, uint_fast16_t timerMode)
  96 {
  97     ASSERT(
  98             (TIMER_A_UPDOWN_MODE == timerMode)
  99             || (TIMER_A_CONTINUOUS_MODE == timerMode)
 100             || (TIMER_A_UP_MODE == timerMode));
 101
 102     TIMER_A_CMSIS(timer)->CTL |= timerMode;
 103 }
 104
 105 void Timer_A_configureContinuousMode(uint32_t timer,
 106         const Timer_A_ContinuousModeConfig *config)
 107 {
 108     ASSERT(
 109             (TIMER_A_CLOCKSOURCE_EXTERNAL_TXCLK == config->clockSource)
 110             || (TIMER_A_CLOCKSOURCE_ACLK == config->clockSource)
 111             || (TIMER_A_CLOCKSOURCE_SMCLK == config->clockSource)
 112             || (TIMER_A_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK
 113                     == config->clockSource));
 114
 115     ASSERT(
 116             (TIMER_A_DO_CLEAR == config->timerClear)
 117             || (TIMER_A_SKIP_CLEAR == config->timerClear));
 118
 119     ASSERT(
 120             (TIMER_A_TAIE_INTERRUPT_ENABLE == config->timerInterruptEnable_TAIE)
 121             || (TIMER_A_TAIE_INTERRUPT_DISABLE
 122                     == config->timerInterruptEnable_TAIE));
 123
 124     ASSERT(
 125             (TIMER_A_CLOCKSOURCE_DIVIDER_1 == config->clockSourceDivider)
 126             || (TIMER_A_CLOCKSOURCE_DIVIDER_2
 127                     == config->clockSourceDivider)
 128             || (TIMER_A_CLOCKSOURCE_DIVIDER_4
 129                     == config->clockSourceDivider)
 130             || (TIMER_A_CLOCKSOURCE_DIVIDER_8
 131                     == config->clockSourceDivider)
 132             || (TIMER_A_CLOCKSOURCE_DIVIDER_3
 133                     == config->clockSourceDivider)
 134             || (TIMER_A_CLOCKSOURCE_DIVIDER_5
 135                     == config->clockSourceDivider)
 136             || (TIMER_A_CLOCKSOURCE_DIVIDER_6
 137                     == config->clockSourceDivider)
 138             || (TIMER_A_CLOCKSOURCE_DIVIDER_7
 139                     == config->clockSourceDivider)
 140             || (TIMER_A_CLOCKSOURCE_DIVIDER_10
 141                     == config->clockSourceDivider)
 142             || (TIMER_A_CLOCKSOURCE_DIVIDER_12
 143                     == config->clockSourceDivider)
 144             || (TIMER_A_CLOCKSOURCE_DIVIDER_14
 145                     == config->clockSourceDivider)
 146             || (TIMER_A_CLOCKSOURCE_DIVIDER_16
 147                     == config->clockSourceDivider)
 148             || (TIMER_A_CLOCKSOURCE_DIVIDER_20
 149                     == config->clockSourceDivider)
 150             || (TIMER_A_CLOCKSOURCE_DIVIDER_24
 151                     == config->clockSourceDivider)
 152             || (TIMER_A_CLOCKSOURCE_DIVIDER_28
 153                     == config->clockSourceDivider)
 154             || (TIMER_A_CLOCKSOURCE_DIVIDER_32
 155                     == config->clockSourceDivider)
 156             || (TIMER_A_CLOCKSOURCE_DIVIDER_40
 157                     == config->clockSourceDivider)
 158             || (TIMER_A_CLOCKSOURCE_DIVIDER_48
 159                     == config->clockSourceDivider)
 160             || (TIMER_A_CLOCKSOURCE_DIVIDER_56
 161                     == config->clockSourceDivider)
 162             || (TIMER_A_CLOCKSOURCE_DIVIDER_64
 163                     == config->clockSourceDivider));
 164
 165     privateTimer_AProcessClockSourceDivider(timer, config->clockSourceDivider);
 166
 167     TIMER_A_CMSIS(timer)->CTL = (TIMER_A_CMSIS(timer)->CTL
 168             & ~(TIMER_A_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK
 169                     + TIMER_A_UPDOWN_MODE + TIMER_A_DO_CLEAR
 170                     + TIMER_A_TAIE_INTERRUPT_ENABLE))
 171             | (config->clockSource + config->timerClear
 172                     + config->timerInterruptEnable_TAIE);
 173 }
 174
 175 void Timer_A_configureUpMode(uint32_t timer, const Timer_A_UpModeConfig *config)
 176 {
 177     ASSERT(
 178             (TIMER_A_CLOCKSOURCE_EXTERNAL_TXCLK == config->clockSource)
 179             || (TIMER_A_CLOCKSOURCE_ACLK == config->clockSource)
 180             || (TIMER_A_CLOCKSOURCE_SMCLK == config->clockSource)
 181             || (TIMER_A_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK
 182                     == config->clockSource));
 183
 184     ASSERT(
 185             (TIMER_A_DO_CLEAR == config->timerClear)
 186             || (TIMER_A_SKIP_CLEAR == config->timerClear));
 187
 188     ASSERT(
 189             (TIMER_A_DO_CLEAR == config->timerClear)
 190             || (TIMER_A_SKIP_CLEAR == config->timerClear));
 191
 192     privateTimer_AProcessClockSourceDivider(timer, config->clockSourceDivider);
 193
 194     TIMER_A_CMSIS(timer)->CTL &=
 195             ~(TIMER_A_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK + TIMER_A_UPDOWN_MODE
 196                     + TIMER_A_DO_CLEAR + TIMER_A_TAIE_INTERRUPT_ENABLE);
 197
 198     TIMER_A_CMSIS(timer)->CTL |= (config->clockSource + config->timerClear
 199             + config->timerInterruptEnable_TAIE);
 200
 201     if (TIMER_A_CCIE_CCR0_INTERRUPT_ENABLE
 202             == config->captureCompareInterruptEnable_CCR0_CCIE)
 203         BITBAND_PERI(TIMER_A_CMSIS(timer)->CCTL[0],TIMER_A_CCTLN_CCIE_OFS) = 1;
 204     else
 205         BITBAND_PERI(TIMER_A_CMSIS(timer)->CCTL[0],TIMER_A_CCTLN_CCIE_OFS) = 0;
 206
 207     TIMER_A_CMSIS(timer)->CCR[0] = config->timerPeriod;
 208 }
 209
 210 void Timer_A_configureUpDownMode(uint32_t timer,
 211         const Timer_A_UpDownModeConfig *config)
 212 {
 213     ASSERT(
 214             (TIMER_A_CLOCKSOURCE_EXTERNAL_TXCLK == config->clockSource)
 215             || (TIMER_A_CLOCKSOURCE_ACLK == config->clockSource)
 216             || (TIMER_A_CLOCKSOURCE_SMCLK == config->clockSource)
 217             || (TIMER_A_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK
 218                     == config->clockSource));
 219
 220     ASSERT(
 221             (TIMER_A_DO_CLEAR == config->timerClear)
 222             || (TIMER_A_SKIP_CLEAR == config->timerClear));
 223
 224     ASSERT(
 225             (TIMER_A_DO_CLEAR == config->timerClear)
 226             || (TIMER_A_SKIP_CLEAR == config->timerClear));
 227
 228     privateTimer_AProcessClockSourceDivider(timer, config->clockSourceDivider);
 229
 230     TIMER_A_CMSIS(timer)->CTL &=
 231             ~(TIMER_A_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK + TIMER_A_UPDOWN_MODE
 232                     + TIMER_A_DO_CLEAR + TIMER_A_TAIE_INTERRUPT_ENABLE);
 233
 234     TIMER_A_CMSIS(timer)->CTL |= (config->clockSource + TIMER_A_STOP_MODE
 235             + config->timerClear + config->timerInterruptEnable_TAIE);
 236     if (TIMER_A_CCIE_CCR0_INTERRUPT_ENABLE
 237             == config->captureCompareInterruptEnable_CCR0_CCIE)
 238         BITBAND_PERI(TIMER_A_CMSIS(timer)->CCTL[0],TIMER_A_CCTLN_CCIE_OFS) = 1;
 239     else
 240         BITBAND_PERI(TIMER_A_CMSIS(timer)->CCTL[0],TIMER_A_CCTLN_CCIE_OFS) = 0;
 241
 242     TIMER_A_CMSIS(timer)->CCR[0] = config->timerPeriod;
 243 }
 244
 245 void Timer_A_initCapture(uint32_t timer,
 246         const Timer_A_CaptureModeConfig *config)
 247 {
 248     ASSERT(
 249             (TIMER_A_CAPTURECOMPARE_REGISTER_0 == config->captureRegister)
 250             || (TIMER_A_CAPTURECOMPARE_REGISTER_1
 251                     == config->captureRegister)
 252             || (TIMER_A_CAPTURECOMPARE_REGISTER_2
 253                     == config->captureRegister)
 254             || (TIMER_A_CAPTURECOMPARE_REGISTER_3
 255                     == config->captureRegister)
 256             || (TIMER_A_CAPTURECOMPARE_REGISTER_4
 257                     == config->captureRegister)
 258             || (TIMER_A_CAPTURECOMPARE_REGISTER_5
 259                     == config->captureRegister)
 260             || (TIMER_A_CAPTURECOMPARE_REGISTER_6
 261                     == config->captureRegister));
 262
 263     ASSERT(
 264             (TIMER_A_CAPTUREMODE_NO_CAPTURE == config->captureMode)
 265             || (TIMER_A_CAPTUREMODE_RISING_EDGE == config->captureMode)
 266             || (TIMER_A_CAPTUREMODE_FALLING_EDGE == config->captureMode)
 267             || (TIMER_A_CAPTUREMODE_RISING_AND_FALLING_EDGE
 268                     == config->captureMode));
 269
 270     ASSERT(
 271             (TIMER_A_CAPTURE_INPUTSELECT_CCIxA == config->captureInputSelect)
 272             || (TIMER_A_CAPTURE_INPUTSELECT_CCIxB
 273                     == config->captureInputSelect)
 274             || (TIMER_A_CAPTURE_INPUTSELECT_GND
 275                     == config->captureInputSelect)
 276             || (TIMER_A_CAPTURE_INPUTSELECT_Vcc
 277                     == config->captureInputSelect));
 278
 279     ASSERT(
 280             (TIMER_A_CAPTURE_ASYNCHRONOUS == config->synchronizeCaptureSource)
 281             || (TIMER_A_CAPTURE_SYNCHRONOUS
 282                     == config->synchronizeCaptureSource));
 283
 284     ASSERT(
 285             (TIMER_A_CAPTURECOMPARE_INTERRUPT_DISABLE
 286                     == config->captureInterruptEnable)
 287             || (TIMER_A_CAPTURECOMPARE_INTERRUPT_ENABLE
 288                     == config->captureInterruptEnable));
 289
 290     ASSERT(
 291             (TIMER_A_OUTPUTMODE_OUTBITVALUE == config->captureOutputMode)
 292             || (TIMER_A_OUTPUTMODE_SET == config->captureOutputMode)
 293             || (TIMER_A_OUTPUTMODE_TOGGLE_RESET
 294                     == config->captureOutputMode)
 295             || (TIMER_A_OUTPUTMODE_SET_RESET
 296                     == config->captureOutputMode)
 297             || (TIMER_A_OUTPUTMODE_TOGGLE == config->captureOutputMode)
 298             || (TIMER_A_OUTPUTMODE_RESET == config->captureOutputMode)
 299             || (TIMER_A_OUTPUTMODE_TOGGLE_SET
 300                     == config->captureOutputMode)
 301             || (TIMER_A_OUTPUTMODE_RESET_SET
 302                     == config->captureOutputMode));
 303
 304     if (TIMER_A_CAPTURECOMPARE_REGISTER_0 == config->captureRegister)
 305     {
 306         //CaptureCompare register 0 only supports certain modes
 307         ASSERT(
 308                 (TIMER_A_OUTPUTMODE_OUTBITVALUE == config->captureOutputMode)
 309                 || (TIMER_A_OUTPUTMODE_SET == config->captureOutputMode)
 310                 || (TIMER_A_OUTPUTMODE_TOGGLE
 311                         == config->captureOutputMode)
 312                 || (TIMER_A_OUTPUTMODE_RESET
 313                         == config->captureOutputMode));
 314     }
 315     uint8_t idx = (config->captureRegister>>1)-1;
 316     TIMER_A_CMSIS(timer)->CCTL[idx] =
 317                 (TIMER_A_CMSIS(timer)->CCTL[idx]
 318                     & ~(TIMER_A_CAPTUREMODE_RISING_AND_FALLING_EDGE
 319                             | TIMER_A_CAPTURE_INPUTSELECT_Vcc
 320                             | TIMER_A_CAPTURE_SYNCHRONOUS | TIMER_A_DO_CLEAR
 321                             | TIMER_A_TAIE_INTERRUPT_ENABLE | TIMER_A_CCTLN_CM_3))
 322                     | (config->captureMode | config->captureInputSelect
 323                             | config->synchronizeCaptureSource
 324                             | config->captureInterruptEnable
 325                             | config->captureOutputMode | TIMER_A_CCTLN_CAP);
 326
 327 }
 328
 329 void Timer_A_initCompare(uint32_t timer,
 330         const Timer_A_CompareModeConfig *config)
 331 {
 332     ASSERT(
 333             (TIMER_A_CAPTURECOMPARE_REGISTER_0 == config->compareRegister)
 334             || (TIMER_A_CAPTURECOMPARE_REGISTER_1
 335                     == config->compareRegister)
 336             || (TIMER_A_CAPTURECOMPARE_REGISTER_2
 337                     == config->compareRegister)
 338             || (TIMER_A_CAPTURECOMPARE_REGISTER_3
 339                     == config->compareRegister)
 340             || (TIMER_A_CAPTURECOMPARE_REGISTER_4
 341                     == config->compareRegister)
 342             || (TIMER_A_CAPTURECOMPARE_REGISTER_5
 343                     == config->compareRegister)
 344             || (TIMER_A_CAPTURECOMPARE_REGISTER_6
 345                     == config->compareRegister));
 346
 347     ASSERT(
 348             (TIMER_A_CAPTURECOMPARE_INTERRUPT_ENABLE
 349                     == config->compareInterruptEnable)
 350             || (TIMER_A_CAPTURECOMPARE_INTERRUPT_DISABLE
 351                     == config->compareInterruptEnable));
 352
 353     ASSERT(
 354             (TIMER_A_OUTPUTMODE_OUTBITVALUE == config->compareOutputMode)
 355             || (TIMER_A_OUTPUTMODE_SET == config->compareOutputMode)
 356             || (TIMER_A_OUTPUTMODE_TOGGLE_RESET
 357                     == config->compareOutputMode)
 358             || (TIMER_A_OUTPUTMODE_SET_RESET
 359                     == config->compareOutputMode)
 360             || (TIMER_A_OUTPUTMODE_TOGGLE == config->compareOutputMode)
 361             || (TIMER_A_OUTPUTMODE_RESET == config->compareOutputMode)
 362             || (TIMER_A_OUTPUTMODE_TOGGLE_SET
 363                     == config->compareOutputMode)
 364             || (TIMER_A_OUTPUTMODE_RESET_SET
 365                     == config->compareOutputMode));
 366
 367     if (TIMER_A_CAPTURECOMPARE_REGISTER_0 == config->compareRegister)
 368     {
 369         //CaptureCompare register 0 only supports certain modes
 370         ASSERT(
 371                 (TIMER_A_OUTPUTMODE_OUTBITVALUE == config->compareOutputMode)
 372                 || (TIMER_A_OUTPUTMODE_SET == config->compareOutputMode)
 373                 || (TIMER_A_OUTPUTMODE_TOGGLE
 374                         == config->compareOutputMode)
 375                 || (TIMER_A_OUTPUTMODE_RESET
 376                         == config->compareOutputMode));
 377     }
 378
 379     uint8_t idx = (config->compareRegister>>1)-1;
 380     TIMER_A_CMSIS(timer)->CCTL[idx] =
 381             (TIMER_A_CMSIS(timer)->CCTL[idx]
 382                          & ~(TIMER_A_CAPTURECOMPARE_INTERRUPT_ENABLE
 383              | TIMER_A_OUTPUTMODE_RESET_SET | TIMER_A_CCTLN_CAP))
 384              | (config->compareInterruptEnable + config->compareOutputMode);
 385
 386    TIMER_A_CMSIS(timer)->CCR[idx] = config->compareValue;
 387
 388 }
 389
 390 uint16_t Timer_A_getCounterValue(uint32_t timer)
 391 {
 392     uint_fast16_t voteOne, voteTwo, res;
 393
 394     voteTwo = TIMER_A_CMSIS(timer)->R;
 395
 396     do
 397     {
 398         voteOne = voteTwo;
 399         voteTwo = TIMER_A_CMSIS(timer)->R;
 400
 401         if (voteTwo > voteOne)
 402             res = voteTwo - voteOne;
 403         else if (voteOne > voteTwo)
 404             res = voteOne - voteTwo;
 405         else
 406             res = 0;
 407
 408     } while (res > TIMER_A_THRESHOLD);
 409
 410     return voteTwo;
 411
 412 }
 413
 414 void Timer_A_clearTimer(uint32_t timer)
 415 {
 416     BITBAND_PERI(TIMER_A_CMSIS(timer)->CTL , TIMER_A_CTL_CLR_OFS) = 1;
 417 }
 418
 419 uint_fast8_t Timer_A_getSynchronizedCaptureCompareInput(uint32_t timer,
 420         uint_fast16_t captureCompareRegister, uint_fast16_t synchronizedSetting)
 421 {
 422     ASSERT(
 423             (TIMER_A_CAPTURECOMPARE_REGISTER_0 == captureCompareRegister)
 424             || (TIMER_A_CAPTURECOMPARE_REGISTER_1
 425                     == captureCompareRegister)
 426             || (TIMER_A_CAPTURECOMPARE_REGISTER_2
 427                     == captureCompareRegister)
 428             || (TIMER_A_CAPTURECOMPARE_REGISTER_3
 429                     == captureCompareRegister)
 430             || (TIMER_A_CAPTURECOMPARE_REGISTER_4
 431                     == captureCompareRegister)
 432             || (TIMER_A_CAPTURECOMPARE_REGISTER_5
 433                     == captureCompareRegister)
 434             || (TIMER_A_CAPTURECOMPARE_REGISTER_6
 435                     == captureCompareRegister));
 436
 437     ASSERT(
 438             (TIMER_A_READ_CAPTURE_COMPARE_INPUT == synchronizedSetting)
 439             || (TIMER_A_READ_SYNCHRONIZED_CAPTURECOMPAREINPUT
 440                     == synchronizedSetting));
 441
 442     uint8_t idx = (captureCompareRegister>>1) - 1;
 443     if (TIMER_A_CMSIS(timer)->CCTL[idx] & synchronizedSetting)
 444         return TIMER_A_CAPTURECOMPARE_INPUT_HIGH;
 445     else
 446         return TIMER_A_CAPTURECOMPARE_INPUT_LOW;
 447 }
 448
 449 uint_fast8_t Timer_A_getOutputForOutputModeOutBitValue(uint32_t timer,
 450         uint_fast16_t captureCompareRegister)
 451 {
 452     ASSERT(
 453             (TIMER_A_CAPTURECOMPARE_REGISTER_0 == captureCompareRegister)
 454             || (TIMER_A_CAPTURECOMPARE_REGISTER_1
 455                     == captureCompareRegister)
 456             || (TIMER_A_CAPTURECOMPARE_REGISTER_2
 457                     == captureCompareRegister)
 458             || (TIMER_A_CAPTURECOMPARE_REGISTER_3
 459                     == captureCompareRegister)
 460             || (TIMER_A_CAPTURECOMPARE_REGISTER_4
 461                     == captureCompareRegister)
 462             || (TIMER_A_CAPTURECOMPARE_REGISTER_5
 463                     == captureCompareRegister)
 464             || (TIMER_A_CAPTURECOMPARE_REGISTER_6
 465                     == captureCompareRegister));
 466
 467     uint8_t idx = (captureCompareRegister>>1) - 1;
 468     if (BITBAND_PERI(TIMER_A_CMSIS(timer)->CCTL[idx],TIMER_A_CCTLN_OUT_OFS))
 469         return TIMER_A_OUTPUTMODE_OUTBITVALUE_HIGH;
 470     else
 471         return TIMER_A_OUTPUTMODE_OUTBITVALUE_LOW;
 472 }
 473
 474 uint_fast16_t Timer_A_getCaptureCompareCount(uint32_t timer,
 475         uint_fast16_t captureCompareRegister)
 476 {
 477     ASSERT(
 478             (TIMER_A_CAPTURECOMPARE_REGISTER_0 == captureCompareRegister)
 479             || (TIMER_A_CAPTURECOMPARE_REGISTER_1
 480                     == captureCompareRegister)
 481             || (TIMER_A_CAPTURECOMPARE_REGISTER_2
 482                     == captureCompareRegister)
 483             || (TIMER_A_CAPTURECOMPARE_REGISTER_3
 484                     == captureCompareRegister)
 485             || (TIMER_A_CAPTURECOMPARE_REGISTER_4
 486                     == captureCompareRegister)
 487             || (TIMER_A_CAPTURECOMPARE_REGISTER_5
 488                     == captureCompareRegister)
 489             || (TIMER_A_CAPTURECOMPARE_REGISTER_6
 490                     == captureCompareRegister));
 491
 492     uint8_t idx = (captureCompareRegister>>1) - 1;
 493     return (TIMER_A_CMSIS(timer)->CCR[idx]);
 494 }
 495
 496 void Timer_A_setOutputForOutputModeOutBitValue(uint32_t timer,
 497         uint_fast16_t captureCompareRegister,
 498         uint_fast8_t outputModeOutBitValue)
 499 {
 500         uint8_t idx = (captureCompareRegister>>1) - 1;
 501         TIMER_A_CMSIS(timer)->CCTL[idx] =
 502                         ((TIMER_A_CMSIS(timer)->CCTL[idx])
 503                     & ~(TIMER_A_OUTPUTMODE_RESET_SET))
 504                     | (outputModeOutBitValue);
 505 }
 506
 507 void Timer_A_generatePWM(uint32_t timer, const Timer_A_PWMConfig *config)
 508 {
 509     ASSERT(
 510             (TIMER_A_CLOCKSOURCE_EXTERNAL_TXCLK == config->clockSource)
 511             || (TIMER_A_CLOCKSOURCE_ACLK == config->clockSource)
 512             || (TIMER_A_CLOCKSOURCE_SMCLK == config->clockSource)
 513             || (TIMER_A_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK
 514                     == config->clockSource));
 515
 516     ASSERT(
 517             (TIMER_A_CAPTURECOMPARE_REGISTER_0 == config->compareRegister)
 518             || (TIMER_A_CAPTURECOMPARE_REGISTER_1
 519                     == config->compareRegister)
 520             || (TIMER_A_CAPTURECOMPARE_REGISTER_2
 521                     == config->compareRegister)
 522             || (TIMER_A_CAPTURECOMPARE_REGISTER_3
 523                     == config->compareRegister)
 524             || (TIMER_A_CAPTURECOMPARE_REGISTER_4
 525                     == config->compareRegister)
 526             || (TIMER_A_CAPTURECOMPARE_REGISTER_5
 527                     == config->compareRegister)
 528             || (TIMER_A_CAPTURECOMPARE_REGISTER_6
 529                     == config->compareRegister));
 530
 531     ASSERT(
 532             (TIMER_A_OUTPUTMODE_OUTBITVALUE == config->compareOutputMode)
 533             || (TIMER_A_OUTPUTMODE_SET == config->compareOutputMode)
 534             || (TIMER_A_OUTPUTMODE_TOGGLE_RESET
 535                     == config->compareOutputMode)
 536             || (TIMER_A_OUTPUTMODE_SET_RESET
 537                     == config->compareOutputMode)
 538             || (TIMER_A_OUTPUTMODE_TOGGLE == config->compareOutputMode)
 539             || (TIMER_A_OUTPUTMODE_RESET == config->compareOutputMode)
 540             || (TIMER_A_OUTPUTMODE_TOGGLE_SET
 541                     == config->compareOutputMode)
 542             || (TIMER_A_OUTPUTMODE_RESET_SET
 543                     == config->compareOutputMode));
 544
 545     privateTimer_AProcessClockSourceDivider(timer, config->clockSourceDivider);
 546
 547     TIMER_A_CMSIS(timer)->CTL &=
 548             ~(TIMER_A_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK + TIMER_A_UPDOWN_MODE
 549                     + TIMER_A_DO_CLEAR + TIMER_A_TAIE_INTERRUPT_ENABLE);
 550
 551     TIMER_A_CMSIS(timer)->CTL |= (config->clockSource + TIMER_A_UP_MODE
 552             + TIMER_A_DO_CLEAR);
 553
 554     TIMER_A_CMSIS(timer)->CCR[0] = config->timerPeriod;
 555
 556     TIMER_A_CMSIS(timer)->CCTL[0] &= ~(TIMER_A_CAPTURECOMPARE_INTERRUPT_ENABLE
 557             + TIMER_A_OUTPUTMODE_RESET_SET);
 558
 559     uint8_t idx = (config->compareRegister>>1) - 1;
 560     TIMER_A_CMSIS(timer)->CCTL[idx] |= config->compareOutputMode;
 561     TIMER_A_CMSIS(timer)->CCR[idx] = config->dutyCycle;
 562 }
 563
 564 void Timer_A_stopTimer(uint32_t timer)
 565 {
 566     TIMER_A_CMSIS(timer)->CTL &= ~TIMER_A_CTL_MC_3;
 567 }
 568
 569 void Timer_A_setCompareValue(uint32_t timer, uint_fast16_t compareRegister,
 570         uint_fast16_t compareValue)
 571 {
 572     ASSERT(
 573             (TIMER_A_CAPTURECOMPARE_REGISTER_0 == compareRegister)
 574             || (TIMER_A_CAPTURECOMPARE_REGISTER_1 == compareRegister)
 575             || (TIMER_A_CAPTURECOMPARE_REGISTER_2 == compareRegister)
 576             || (TIMER_A_CAPTURECOMPARE_REGISTER_3 == compareRegister)
 577             || (TIMER_A_CAPTURECOMPARE_REGISTER_4 == compareRegister)
 578             || (TIMER_A_CAPTURECOMPARE_REGISTER_5 == compareRegister)
 579             || (TIMER_A_CAPTURECOMPARE_REGISTER_6 == compareRegister));
 580
 581     uint8_t idx = (compareRegister>>1) - 1;
 582     TIMER_A_CMSIS(timer)->CCR[idx] = compareValue;
 583 }
 584
 585 void Timer_A_clearInterruptFlag(uint32_t timer)
 586 {
 587     BITBAND_PERI(TIMER_A_CMSIS(timer)->CTL,TIMER_A_CTL_IFG_OFS) = 0;
 588 }
 589
 590 void Timer_A_clearCaptureCompareInterrupt(uint32_t timer,
 591         uint_fast16_t captureCompareRegister)
 592 {
 593     ASSERT(
 594             (TIMER_A_CAPTURECOMPARE_REGISTER_0 == captureCompareRegister)
 595             || (TIMER_A_CAPTURECOMPARE_REGISTER_1
 596                     == captureCompareRegister)
 597             || (TIMER_A_CAPTURECOMPARE_REGISTER_2
 598                     == captureCompareRegister)
 599             || (TIMER_A_CAPTURECOMPARE_REGISTER_3
 600                     == captureCompareRegister)
 601             || (TIMER_A_CAPTURECOMPARE_REGISTER_4
 602                     == captureCompareRegister)
 603             || (TIMER_A_CAPTURECOMPARE_REGISTER_5
 604                     == captureCompareRegister)
 605             || (TIMER_A_CAPTURECOMPARE_REGISTER_6
 606                     == captureCompareRegister));
 607
 608     uint8_t idx = (captureCompareRegister>>1) - 1;
 609     BITBAND_PERI(TIMER_A_CMSIS(timer)->CCTL[idx],TIMER_A_CCTLN_CCIFG_OFS) = 0;
 610 }
 611
 612 void Timer_A_enableInterrupt(uint32_t timer)
 613 {
 614     BITBAND_PERI(TIMER_A_CMSIS(timer)->CTL,TIMER_A_CTL_IE_OFS) = 1;
 615 }
 616
 617 void Timer_A_disableInterrupt(uint32_t timer)
 618 {
 619     BITBAND_PERI(TIMER_A_CMSIS(timer)->CTL,TIMER_A_CTL_IE_OFS) = 0;
 620 }
 621
 622 uint32_t Timer_A_getInterruptStatus(uint32_t timer)
 623 {
 624     return (TIMER_A_CMSIS(timer)->CTL) & TIMER_A_CTL_IFG;
 625 }
 626
 627 void Timer_A_enableCaptureCompareInterrupt(uint32_t timer,
 628         uint_fast16_t captureCompareRegister)
 629 {
 630     ASSERT(
 631             (TIMER_A_CAPTURECOMPARE_REGISTER_0 == captureCompareRegister)
 632             || (TIMER_A_CAPTURECOMPARE_REGISTER_1
 633                     == captureCompareRegister)
 634             || (TIMER_A_CAPTURECOMPARE_REGISTER_2
 635                     == captureCompareRegister)
 636             || (TIMER_A_CAPTURECOMPARE_REGISTER_3
 637                     == captureCompareRegister)
 638             || (TIMER_A_CAPTURECOMPARE_REGISTER_4
 639                     == captureCompareRegister)
 640             || (TIMER_A_CAPTURECOMPARE_REGISTER_5
 641                     == captureCompareRegister)
 642             || (TIMER_A_CAPTURECOMPARE_REGISTER_6
 643                     == captureCompareRegister));
 644
 645     uint8_t idx = (captureCompareRegister>>1) - 1;
 646     BITBAND_PERI(TIMER_A_CMSIS(timer)->CCTL[idx],TIMER_A_CCTLN_CCIE_OFS) = 1;
 647 }
 648
 649 void Timer_A_disableCaptureCompareInterrupt(uint32_t timer,
 650         uint_fast16_t captureCompareRegister)
 651 {
 652     ASSERT(
 653             (TIMER_A_CAPTURECOMPARE_REGISTER_0 == captureCompareRegister)
 654             || (TIMER_A_CAPTURECOMPARE_REGISTER_1
 655                     == captureCompareRegister)
 656             || (TIMER_A_CAPTURECOMPARE_REGISTER_2
 657                     == captureCompareRegister)
 658             || (TIMER_A_CAPTURECOMPARE_REGISTER_3
 659                     == captureCompareRegister)
 660             || (TIMER_A_CAPTURECOMPARE_REGISTER_4
 661                     == captureCompareRegister)
 662             || (TIMER_A_CAPTURECOMPARE_REGISTER_5
 663                     == captureCompareRegister)
 664             || (TIMER_A_CAPTURECOMPARE_REGISTER_6
 665                     == captureCompareRegister));
 666
 667     uint8_t idx = (captureCompareRegister>>1) - 1;
 668     BITBAND_PERI(TIMER_A_CMSIS(timer)->CCTL[idx],TIMER_A_CCTLN_CCIE_OFS) = 0;
 669
 670 }
 671
 672 uint32_t Timer_A_getCaptureCompareInterruptStatus(uint32_t timer,
 673         uint_fast16_t captureCompareRegister, uint_fast16_t mask)
 674 {
 675     uint8_t idx = (captureCompareRegister>>1) - 1;
 676     return (TIMER_A_CMSIS(timer)->CCTL[idx]) & mask;
 677 }
 678
 679 uint32_t Timer_A_getEnabledInterruptStatus(uint32_t timer)
 680 {
 681     if (TIMER_A_CMSIS(timer)->CTL & TIMER_A_CTL_IE)
 682     {
 683         return Timer_A_getInterruptStatus(timer);
 684     } else
 685     {
 686         return 0;
 687     }
 688
 689 }
 690
 691 uint32_t Timer_A_getCaptureCompareEnabledInterruptStatus(uint32_t timer,
 692         uint_fast16_t captureCompareRegister)
 693 {
 694     uint8_t idx = (captureCompareRegister>>1) - 1;
 695     if (BITBAND_PERI(TIMER_A_CMSIS(timer)->CCTL[idx],TIMER_A_CCTLN_CCIE_OFS))
 696         return Timer_A_getCaptureCompareInterruptStatus(timer,
 697                 captureCompareRegister,
 698                 TIMER_A_CAPTURE_OVERFLOW |
 699                 TIMER_A_CAPTURECOMPARE_INTERRUPT_FLAG);
 700     else
 701         return 0;
 702 }
 703
 704 void Timer_A_registerInterrupt(uint32_t timer, uint_fast8_t interruptSelect,
 705         void (*intHandler)(void))
 706 {
 707     if (interruptSelect == TIMER_A_CCR0_INTERRUPT)
 708     {
 709         switch (timer)
 710         {
 711         case TIMER_A0_BASE:
 712             Interrupt_registerInterrupt(INT_TA0_0, intHandler);
 713             Interrupt_enableInterrupt(INT_TA0_0);
 714             break;
 715         case TIMER_A1_BASE:
 716             Interrupt_registerInterrupt(INT_TA1_0, intHandler);
 717             Interrupt_enableInterrupt(INT_TA1_0);
 718             break;
 719         case TIMER_A2_BASE:
 720             Interrupt_registerInterrupt(INT_TA2_0, intHandler);
 721             Interrupt_enableInterrupt(INT_TA2_0);
 722             break;
 723         case TIMER_A3_BASE:
 724             Interrupt_registerInterrupt(INT_TA3_0, intHandler);
 725             Interrupt_enableInterrupt(INT_TA3_0);
 726             break;
 727         default:
 728             ASSERT(false);
 729         }
 730     } else if (interruptSelect == TIMER_A_CCRX_AND_OVERFLOW_INTERRUPT)
 731     {
 732         switch (timer)
 733         {
 734         case TIMER_A0_BASE:
 735             Interrupt_registerInterrupt(INT_TA0_N, intHandler);
 736             Interrupt_enableInterrupt(INT_TA0_N);
 737             break;
 738         case TIMER_A1_BASE:
 739             Interrupt_registerInterrupt(INT_TA1_N, intHandler);
 740             Interrupt_enableInterrupt(INT_TA1_N);
 741             break;
 742         case TIMER_A2_BASE:
 743             Interrupt_registerInterrupt(INT_TA2_N, intHandler);
 744             Interrupt_enableInterrupt(INT_TA2_N);
 745             break;
 746         case TIMER_A3_BASE:
 747             Interrupt_registerInterrupt(INT_TA3_N, intHandler);
 748             Interrupt_enableInterrupt(INT_TA3_N);
 749             break;
 750         default:
 751             ASSERT(false);
 752         }
 753     } else
 754     {
 755         ASSERT(false);
 756     }
 757 }
 758
 759 void Timer_A_unregisterInterrupt(uint32_t timer, uint_fast8_t interruptSelect)
 760 {
 761     if (interruptSelect == TIMER_A_CCR0_INTERRUPT)
 762     {
 763         switch (timer)
 764         {
 765         case TIMER_A0_BASE:
 766             Interrupt_disableInterrupt(INT_TA0_0);
 767             Interrupt_unregisterInterrupt(INT_TA0_0);
 768             break;
 769         case TIMER_A1_BASE:
 770             Interrupt_disableInterrupt(INT_TA1_0);
 771             Interrupt_unregisterInterrupt(INT_TA1_0);
 772             break;
 773         case TIMER_A2_BASE:
 774             Interrupt_disableInterrupt(INT_TA2_0);
 775             Interrupt_unregisterInterrupt(INT_TA2_0);
 776             break;
 777         case TIMER_A3_BASE:
 778             Interrupt_disableInterrupt(INT_TA3_0);
 779             Interrupt_unregisterInterrupt(INT_TA3_0);
 780             break;
 781         default:
 782             ASSERT(false);
 783         }
 784     } else if (interruptSelect == TIMER_A_CCRX_AND_OVERFLOW_INTERRUPT)
 785     {
 786         switch (timer)
 787         {
 788         case TIMER_A0_BASE:
 789             Interrupt_disableInterrupt(INT_TA0_N);
 790             Interrupt_unregisterInterrupt(INT_TA0_N);
 791             break;
 792         case TIMER_A1_BASE:
 793             Interrupt_disableInterrupt(INT_TA1_N);
 794             Interrupt_unregisterInterrupt(INT_TA1_N);
 795             break;
 796         case TIMER_A2_BASE:
 797             Interrupt_disableInterrupt(INT_TA2_N);
 798             Interrupt_unregisterInterrupt(INT_TA2_N);
 799             break;
 800         case TIMER_A3_BASE:
 801             Interrupt_disableInterrupt(INT_TA3_N);
 802             Interrupt_unregisterInterrupt(INT_TA3_N);
 803             break;
 804         default:
 805             ASSERT(false);
 806         }
 807     } else
 808     {
 809         ASSERT(false);
 810     }
 811 }
 812