1 //*****************************************************************************
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3 // Copyright (C) 2012 - 2014 Texas Instruments Incorporated - http://www.ti.com/
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5 // Redistribution and use in source and binary forms, with or without
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6 // modification, are permitted provided that the following conditions
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9 // Redistributions of source code must retain the above copyright
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10 // notice, this list of conditions and the following disclaimer.
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12 // Redistributions in binary form must reproduce the above copyright
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13 // notice, this list of conditions and the following disclaimer in the
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14 // documentation and/or other materials provided with the
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17 // Neither the name of Texas Instruments Incorporated nor the names of
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18 // its contributors may be used to endorse or promote products derived
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19 // from this software without specific prior written permission.
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21 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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22 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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23 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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24 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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25 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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26 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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27 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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28 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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29 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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30 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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31 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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33 // MSP432 Family Interrupt Vector Table for CGT
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35 //****************************************************************************
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38 #include <driverlib.h>
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40 /* Forward declaration of the default fault handlers. */
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41 static void resetISR(void);
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42 static void nmiISR(void);
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43 static void faultISR(void);
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44 static void defaultISR(void);
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47 /* External declaration for the reset handler that is to be called when the */
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48 /* processor is started */
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49 extern void _c_int00(void);
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52 /* Linker variable that marks the top of the stack. */
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53 extern unsigned long __STACK_END;
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56 /* External declarations for the FreeRTOS interrupt handlers. */
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57 extern void xPortSysTickHandler( void );
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58 extern void vPortSVCHandler( void );
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59 extern void xPortPendSVHandler( void );
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61 /* External declarations for the peripheral interrupts handlers used by the
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62 demo application. */
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63 extern void vUART_Handler( void );
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64 extern void vT32_0_Handler( void );
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65 extern void vT32_1_Handler( void );
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67 /* Intrrupt vector table. Note that the proper constructs must be placed on this to */
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68 /* ensure that it ends up at physical address 0x0000.0000 or at the start of */
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69 /* the program if located at a start address other than 0. */
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70 #pragma DATA_SECTION(interruptVectors, ".intvecs")
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71 void (* const interruptVectors[])(void) =
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73 (void (*)(void))((uint32_t)&__STACK_END),
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74 /* The initial stack pointer */
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75 resetISR, /* The reset handler */
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76 nmiISR, /* The NMI handler */
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77 faultISR, /* The hard fault handler */
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78 defaultISR, /* The MPU fault handler */
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79 defaultISR, /* The bus fault handler */
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80 defaultISR, /* The usage fault handler */
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85 vPortSVCHandler, /* SVCall handler */
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86 defaultISR, /* Debug monitor handler */
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88 xPortPendSVHandler, /* The PendSV handler */
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89 xPortSysTickHandler, /* The SysTick handler */
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90 defaultISR, /* PSS ISR */
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91 defaultISR, /* CS ISR */
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92 defaultISR, /* PCM ISR */
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93 defaultISR, /* WDT ISR */
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94 defaultISR, /* FPU ISR */
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95 defaultISR, /* FLCTL ISR */
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96 defaultISR, /* COMP0 ISR */
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97 defaultISR, /* COMP1 ISR */
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98 defaultISR, /* TA0_0 ISR */
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99 defaultISR, /* TA0_N ISR */
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100 defaultISR, /* TA1_0 ISR */
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101 defaultISR, /* TA1_N ISR */
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102 defaultISR, /* TA2_0 ISR */
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103 defaultISR, /* TA2_N ISR */
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104 defaultISR, /* TA3_0 ISR */
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105 defaultISR, /* TA3_N ISR */
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106 vUART_Handler, /* EUSCIA0 ISR */
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107 defaultISR, /* EUSCIA1 ISR */
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108 defaultISR, /* EUSCIA2 ISR */
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109 defaultISR, /* EUSCIA3 ISR */
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110 defaultISR, /* EUSCIB0 ISR */
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111 defaultISR, /* EUSCIB1 ISR */
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112 defaultISR, /* EUSCIB2 ISR */
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113 defaultISR, /* EUSCIB3 ISR */
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114 defaultISR, /* ADC14 ISR */
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115 vT32_0_Handler, /* T32_INT1 ISR */
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116 vT32_1_Handler, /* T32_INT2 ISR */
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117 defaultISR, /* T32_INTC ISR */
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118 defaultISR, /* AES ISR */
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119 defaultISR, /* RTC ISR */
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120 defaultISR, /* DMA_ERR ISR */
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121 defaultISR, /* DMA_INT3 ISR */
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122 defaultISR, /* DMA_INT2 ISR */
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123 defaultISR, /* DMA_INT1 ISR */
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124 defaultISR, /* DMA_INT0 ISR */
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125 defaultISR, /* PORT1 ISR */
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126 defaultISR, /* PORT2 ISR */
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127 defaultISR, /* PORT3 ISR */
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128 defaultISR, /* PORT4 ISR */
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129 defaultISR, /* PORT5 ISR */
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130 defaultISR, /* PORT6 ISR */
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131 defaultISR, /* Reserved 41 */
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132 defaultISR, /* Reserved 42 */
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133 defaultISR, /* Reserved 43 */
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134 defaultISR, /* Reserved 44 */
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135 defaultISR, /* Reserved 45 */
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136 defaultISR, /* Reserved 46 */
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137 defaultISR, /* Reserved 47 */
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138 defaultISR, /* Reserved 48 */
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139 defaultISR, /* Reserved 49 */
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140 defaultISR, /* Reserved 50 */
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141 defaultISR, /* Reserved 51 */
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142 defaultISR, /* Reserved 52 */
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143 defaultISR, /* Reserved 53 */
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144 defaultISR, /* Reserved 54 */
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145 defaultISR, /* Reserved 55 */
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146 defaultISR, /* Reserved 56 */
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147 defaultISR, /* Reserved 57 */
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148 defaultISR, /* Reserved 58 */
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149 defaultISR, /* Reserved 59 */
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150 defaultISR, /* Reserved 60 */
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151 defaultISR, /* Reserved 61 */
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152 defaultISR, /* Reserved 62 */
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153 defaultISR, /* Reserved 63 */
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154 defaultISR /* Reserved 64 */
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158 /* This is the code that gets called when the processor first starts execution */
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159 /* following a reset event. Only the absolutely necessary set is performed, */
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160 /* after which the application supplied entry() routine is called. Any fancy */
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161 /* actions (such as making decisions based on the reset cause register, and */
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162 /* resetting the bits in that register) are left solely in the hands of the */
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164 void resetISR(void)
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166 /* Jump to the CCS C Initialization Routine. */
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167 MAP_WDT_A_holdTimer();
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168 __asm(" .global _c_int00\n"
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173 /* This is the code that gets called when the processor receives a NMI. This */
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174 /* simply enters an infinite loop, preserving the system state for examination */
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175 /* by a debugger. */
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176 static void nmiISR(void)
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178 /* Enter an infinite loop. */
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185 /* This is the code that gets called when the processor receives a fault */
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186 /* interrupt. This simply enters an infinite loop, preserving the system state */
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187 /* for examination by a debugger. */
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188 static void faultISR(void)
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190 /* Enter an infinite loop. */
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197 /* This is the code that gets called when the processor receives an unexpected */
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198 /* interrupt. This simply enters an infinite loop, preserving the system state */
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199 /* for examination by a debugger. */
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200 static void defaultISR(void)
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202 /* Enter an infinite loop. */
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