2 FreeRTOS V8.1.2 - Copyright (C) 2014 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 ***************************************************************************
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9 * FreeRTOS provides completely free yet professionally developed, *
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10 * robust, strictly quality controlled, supported, and cross *
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11 * platform software that has become a de facto standard. *
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13 * Help yourself get started quickly and support the FreeRTOS *
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14 * project by purchasing a FreeRTOS tutorial book, reference *
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15 * manual, or both from: http://www.FreeRTOS.org/Documentation *
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19 ***************************************************************************
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21 This file is part of the FreeRTOS distribution.
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23 FreeRTOS is free software; you can redistribute it and/or modify it under
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24 the terms of the GNU General Public License (version 2) as published by the
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25 Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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27 >>! NOTE: The modification to the GPL is included to allow you to !<<
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28 >>! distribute a combined work that includes FreeRTOS without being !<<
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29 >>! obliged to provide the source code for proprietary components !<<
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30 >>! outside of the FreeRTOS kernel. !<<
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32 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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33 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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34 FOR A PARTICULAR PURPOSE. Full license text is available from the following
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35 link: http://www.freertos.org/a00114.html
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39 ***************************************************************************
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41 * Having a problem? Start by reading the FAQ "My application does *
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42 * not run, what could be wrong?" *
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44 * http://www.FreeRTOS.org/FAQHelp.html *
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46 ***************************************************************************
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48 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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49 license and Real Time Engineers Ltd. contact details.
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51 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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52 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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53 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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55 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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56 Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
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57 licenses offer ticketed support, indemnification and middleware.
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59 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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60 engineered and independently SIL3 certified version for use in safety and
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61 mission critical applications that require provable dependability.
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67 * Provides the two timers sources for the standard demo IntQueue test. Also
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68 * includes a high frequency timer to maximise the interrupt nesting achieved.
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71 /* Standard includes. */
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74 /* Scheduler includes. */
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75 #include "FreeRTOS.h"
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78 /* Demo includes. */
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79 #include "IntQueueTimer.h"
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80 #include "IntQueue.h"
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82 /* System includes. */
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86 /* The frequencies at which the first two timers expire are slightly offset to
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87 ensure they don't remain synchronised. The frequency of the highest priority
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88 interrupt is 20 times faster so really hammers the interrupt entry and exit
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90 #define tmrTIMER_0_FREQUENCY ( 2000UL )
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91 #define tmrTIMER_1_FREQUENCY ( 1003UL )
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92 #define tmrTIMER_2_FREQUENCY ( 5000UL )
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94 /* Priorities used by the timer interrupts - these are set differently to make
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95 nesting likely/common. The high frequency timer operates above the max
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96 system call interrupt priority, but does not use the RTOS API. */
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97 #define tmrTIMER_0_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY )
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98 #define tmrTIMER_1_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY + 1 )
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99 #define tmrTIMER_2_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY - 1 )
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101 /* The channels used within the TC0 timer. */
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102 #define tmrTIMER_0_CHANNEL ( 0 )
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103 #define tmrTIMER_1_CHANNEL ( 1 )
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104 #define tmrTIMER_2_CHANNEL ( 2 )
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106 /* TC register bit specifics. */
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107 #define tmrTRIGGER_ON_RC ( 1UL << 4UL )
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108 #define trmDIVIDER ( 128 )
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110 /*-----------------------------------------------------------*/
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112 /* Handers for the timer interrupts. */
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113 void TC0_Handler( void );
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114 void TC1_Handler( void );
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115 void TC2_Handler( void );
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117 /*-----------------------------------------------------------*/
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119 /* Incremented by the high frequency timer, which operates above the max
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120 syscall interrupt priority. This is just for inspection. */
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121 volatile uint32_t ulHighFrequencyTimerInterrupts = 0;
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123 /*-----------------------------------------------------------*/
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125 void vInitialiseTimerForIntQueueTest( void )
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127 uint32_t ulInputFrequency;
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129 /* Calculate the frequency of the clock that feeds the TC. */
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130 ulInputFrequency = configCPU_CLOCK_HZ;
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131 ulInputFrequency /= trmDIVIDER;
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133 /* Three channels are used - two that run at or under
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134 configMAX_SYSCALL_INTERRUPT_PRIORITY, and one that runs over
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135 configMAX_SYSCALL_INTERRUPT_PRIORITY. */
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136 sysclk_enable_peripheral_clock( ID_TC0 );
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137 sysclk_enable_peripheral_clock( ID_TC1 );
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138 sysclk_enable_peripheral_clock( ID_TC2 );
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140 /* Init TC channels to waveform mode - up mode clean on RC match. */
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141 tc_init( TC0, tmrTIMER_0_CHANNEL, TC_CMR_TCCLKS_TIMER_CLOCK4 | TC_CMR_WAVE | TC_CMR_ACPC_CLEAR | TC_CMR_CPCTRG );
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142 tc_init( TC0, tmrTIMER_1_CHANNEL, TC_CMR_TCCLKS_TIMER_CLOCK4 | TC_CMR_WAVE | TC_CMR_ACPC_CLEAR | TC_CMR_CPCTRG );
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143 tc_init( TC0, tmrTIMER_2_CHANNEL, TC_CMR_TCCLKS_TIMER_CLOCK4 | TC_CMR_WAVE | TC_CMR_ACPC_CLEAR | TC_CMR_CPCTRG );
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145 tc_enable_interrupt( TC0, tmrTIMER_0_CHANNEL, tmrTRIGGER_ON_RC );
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146 tc_enable_interrupt( TC0, tmrTIMER_1_CHANNEL, tmrTRIGGER_ON_RC );
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147 tc_enable_interrupt( TC0, tmrTIMER_2_CHANNEL, tmrTRIGGER_ON_RC );
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149 tc_write_rc( TC0, tmrTIMER_0_CHANNEL, ( ulInputFrequency / tmrTIMER_0_FREQUENCY ) );
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150 tc_write_rc( TC0, tmrTIMER_1_CHANNEL, ( ulInputFrequency / tmrTIMER_1_FREQUENCY ) );
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151 tc_write_rc( TC0, tmrTIMER_2_CHANNEL, ( ulInputFrequency / tmrTIMER_2_FREQUENCY ) );
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153 NVIC_SetPriority( TC0_IRQn, tmrTIMER_0_PRIORITY );
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154 NVIC_SetPriority( TC1_IRQn, tmrTIMER_1_PRIORITY );
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155 NVIC_SetPriority( TC2_IRQn, tmrTIMER_2_PRIORITY );
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157 NVIC_EnableIRQ( TC0_IRQn );
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158 NVIC_EnableIRQ( TC1_IRQn );
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159 NVIC_EnableIRQ( TC2_IRQn );
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161 tc_start( TC0, tmrTIMER_0_CHANNEL );
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162 tc_start( TC0, tmrTIMER_1_CHANNEL );
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163 tc_start( TC0, tmrTIMER_2_CHANNEL );
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165 /*-----------------------------------------------------------*/
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167 void TC0_Handler( void )
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169 /* Handler for the first timer in the IntQueue test. Was the interrupt
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170 caused by a compare on RC? */
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171 if( ( tc_get_status( TC0, tmrTIMER_0_CHANNEL ) & ~TC_SR_CPCS ) != 0 )
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173 portYIELD_FROM_ISR( xFirstTimerHandler() );
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176 /*-----------------------------------------------------------*/
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178 void TC1_Handler( void )
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180 /* Handler for the second timer in the IntQueue test. Was the interrupt
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181 caused by a compare on RC? */
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182 if( ( tc_get_status( TC0, tmrTIMER_1_CHANNEL ) & ~TC_SR_CPCS ) != 0 )
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184 portYIELD_FROM_ISR( xSecondTimerHandler() );
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187 /*-----------------------------------------------------------*/
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189 void TC2_Handler( void )
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191 /* Handler for the high frequency timer that does nothing but increment a
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192 variable to give an indication that it is running. Was the interrupt caused
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193 by a compare on RC? */
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194 if( ( tc_get_status( TC0, tmrTIMER_2_CHANNEL ) & ~TC_SR_CPCS ) != 0 )
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196 ulHighFrequencyTimerInterrupts++;
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