4 * \brief Matrix driver for SAM.
\r
6 * Copyright (c) 2012-2015 Atmel Corporation. All rights reserved.
\r
12 * Redistribution and use in source and binary forms, with or without
\r
13 * modification, are permitted provided that the following conditions are met:
\r
15 * 1. Redistributions of source code must retain the above copyright notice,
\r
16 * this list of conditions and the following disclaimer.
\r
18 * 2. Redistributions in binary form must reproduce the above copyright notice,
\r
19 * this list of conditions and the following disclaimer in the documentation
\r
20 * and/or other materials provided with the distribution.
\r
22 * 3. The name of Atmel may not be used to endorse or promote products derived
\r
23 * from this software without specific prior written permission.
\r
25 * 4. This software may only be redistributed and used in connection with an
\r
26 * Atmel microcontroller product.
\r
28 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
\r
29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
\r
30 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
\r
31 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
\r
32 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
\r
33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
\r
34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
\r
35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
\r
36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
\r
37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
\r
38 * POSSIBILITY OF SUCH DAMAGE.
\r
44 * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
\r
47 #ifndef MATRIX_H_INCLUDED
\r
48 #define MATRIX_H_INCLUDED
\r
50 #include "compiler.h"
\r
60 #ifndef MATRIX_MCFG_ULBT
\r
61 #define MATRIX_MCFG_ULBT(value) MATRIX_MCFG0_ULBT(value)
\r
63 /** \brief Matrix master: undefined length burst type */
\r
65 MATRIX_ULBT_INFINITE_LENGTH_BURST = MATRIX_MCFG_ULBT(0),
\r
66 MATRIX_ULBT_SINGLE_ACCESS = MATRIX_MCFG_ULBT(1),
\r
67 MATRIX_ULBT_4_BEAT_BURST = MATRIX_MCFG_ULBT(2),
\r
68 MATRIX_ULBT_8_BEAT_BURST = MATRIX_MCFG_ULBT(3),
\r
69 MATRIX_ULBT_16_BEAT_BURST = MATRIX_MCFG_ULBT(4),
\r
70 #if SAM4C || SAM4CP || SAM4CM || SAM4E || SAMV71 || SAMV70 || SAME70 || SAMS70
\r
71 MATRIX_ULBT_32_BEAT_BURST = MATRIX_MCFG_ULBT(5),
\r
72 MATRIX_ULBT_64_BEAT_BURST = MATRIX_MCFG_ULBT(6),
\r
73 MATRIX_ULBT_128_BEAT_BURST = MATRIX_MCFG_ULBT(7),
\r
77 /** \brief Matrix slave: default master type */
\r
79 MATRIX_DEFMSTR_NO_DEFAULT_MASTER = MATRIX_SCFG_DEFMSTR_TYPE(0),
\r
80 MATRIX_DEFMSTR_LAST_DEFAULT_MASTER = MATRIX_SCFG_DEFMSTR_TYPE(1),
\r
81 MATRIX_DEFMSTR_FIXED_DEFAULT_MASTER = MATRIX_SCFG_DEFMSTR_TYPE(2)
\r
84 #if !SAM4E && !SAM4C && !SAM4CP && !SAM4CM && \
\r
85 !SAMV71 && !SAMV70 && !SAMS70 && !SAME70
\r
86 /** \brief Matrix slave: arbitration type */
\r
88 MATRIX_ARBT_ROUND_ROBIN = MATRIX_SCFG_ARBT(0),
\r
89 MATRIX_ARBT_FIXED_PRIORITY = MATRIX_SCFG_ARBT(1)
\r
90 } arbitration_type_t;
\r
93 void matrix_set_master_burst_type(uint32_t ul_id, burst_type_t burst_type);
\r
94 burst_type_t matrix_get_master_burst_type(uint32_t ul_id);
\r
95 void matrix_set_slave_slot_cycle(uint32_t ul_id, uint32_t ul_slot_cycle);
\r
96 uint32_t matrix_get_slave_slot_cycle(uint32_t ul_id);
\r
97 void matrix_set_slave_default_master_type(uint32_t ul_id, defaut_master_t type);
\r
98 defaut_master_t matrix_get_slave_default_master_type(uint32_t ul_id);
\r
99 void matrix_set_slave_fixed_default_master(uint32_t ul_id,
\r
100 uint32_t ul_fixed_id);
\r
101 uint32_t matrix_get_slave_fixed_default_master(uint32_t ul_id);
\r
103 #if !SAM4E && !SAM4C && !SAM4CP && !SAM4CM && \
\r
104 !SAMV71 && !SAMV70 && !SAMS70 && !SAME70
\r
105 void matrix_set_slave_arbitration_type(uint32_t ul_id, arbitration_type_t type);
\r
106 arbitration_type_t matrix_get_slave_arbitration_type(uint32_t ul_id);
\r
109 void matrix_set_slave_priority(uint32_t ul_id, uint32_t ul_prio);
\r
110 uint32_t matrix_get_slave_priority(uint32_t ul_id);
\r
111 #if (SAMV71 || SAMV70|| SAME70 || SAMS70)
\r
112 void matrix_set_slave_priority_b(uint32_t ul_id, uint32_t ul_prio_b);
\r
113 uint32_t matrix_get_slave_priority_b(uint32_t ul_id);
\r
116 #if (SAM3XA || SAM3U || SAM4E || \
\r
117 SAMV71 || SAMV70 || SAMS70 || SAME70)
\r
118 void matrix_set_master_remap(uint32_t ul_remap);
\r
119 uint32_t matrix_get_master_remap(void);
\r
123 #if (SAM3S || SAM3XA || SAM3N || SAM4S || SAM4E || SAM4N || SAM4C || SAMG || SAM4CP || SAM4CM || \
\r
124 SAMV71 || SAMV70 || SAMS70 || SAME70)
\r
125 void matrix_set_system_io(uint32_t ul_io);
\r
126 uint32_t matrix_get_system_io(void);
\r
130 #if (SAM3S || SAM4S || SAM4E || SAM4C || SAM4CP || SAM4CM || \
\r
131 SAMV71 || SAMV70 || SAMS70 || SAME70)
\r
132 void matrix_set_nandflash_cs(uint32_t ul_cs);
\r
133 uint32_t matrix_get_nandflash_cs(void);
\r
137 void matrix_set_writeprotect(uint32_t ul_enable);
\r
138 uint32_t matrix_get_writeprotect_status(void);
\r
142 void matrix_set_usb_device(void);
\r
143 void matrix_set_usb_host(void);
\r
146 #if (SAMV71 || SAMV70|| SAME70)
\r
147 void matrix_set_can0_addr(uint32_t base_addr);
\r
148 void matrix_set_can1_addr(uint32_t base_addr);
\r
158 #endif /* MATRIX_H_INCLUDED */
\r