2 FreeRTOS V9.0.1 - Copyright (C) 2017 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 This file is part of the FreeRTOS distribution.
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9 FreeRTOS is free software; you can redistribute it and/or modify it under
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10 the terms of the GNU General Public License (version 2) as published by the
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11 Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
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13 ***************************************************************************
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14 >>! NOTE: The modification to the GPL is included to allow you to !<<
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15 >>! distribute a combined work that includes FreeRTOS without being !<<
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16 >>! obliged to provide the source code for proprietary components !<<
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17 >>! outside of the FreeRTOS kernel. !<<
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18 ***************************************************************************
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20 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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21 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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22 FOR A PARTICULAR PURPOSE. Full license text is available on the following
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23 link: http://www.freertos.org/a00114.html
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25 ***************************************************************************
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27 * FreeRTOS provides completely free yet professionally developed, *
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28 * robust, strictly quality controlled, supported, and cross *
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29 * platform software that is more than just the market leader, it *
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30 * is the industry's de facto standard. *
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32 * Help yourself get started quickly while simultaneously helping *
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33 * to support the FreeRTOS project by purchasing a FreeRTOS *
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34 * tutorial book, reference manual, or both: *
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35 * http://www.FreeRTOS.org/Documentation *
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37 ***************************************************************************
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39 http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
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40 the FAQ page "My application does not run, what could be wrong?". Have you
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41 defined configASSERT()?
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43 http://www.FreeRTOS.org/support - In return for receiving this top quality
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44 embedded software for free we request you assist our global community by
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45 participating in the support forum.
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47 http://www.FreeRTOS.org/training - Investing in training allows your team to
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48 be as productive as possible as early as possible. Now you can receive
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49 FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
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50 Ltd, and the world's leading authority on the world's leading RTOS.
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52 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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53 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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54 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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56 http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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57 Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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59 http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
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60 Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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61 licenses offer ticketed support, indemnification and commercial middleware.
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63 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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64 engineered and independently SIL3 certified version for use in safety and
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65 mission critical applications that require provable dependability.
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71 * "Reg test" tasks - These fill the registers with known values, then check
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72 * that each register maintains its expected value for the lifetime of the
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73 * task. Each task uses a different set of values. The reg test tasks execute
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74 * with a very low priority, so get preempted very frequently. A register
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75 * containing an unexpected value is indicative of an error in the context
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76 * switching mechanism.
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79 void vRegTest1Implementation( void ) __attribute__ ((naked));
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80 void vRegTest2Implementation( void ) __attribute__ ((naked));
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82 void vRegTest1Implementation( void )
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86 ".extern ulRegTest1LoopCounter \n"
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87 "/* Fill the core registers with known values. */ \n"
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102 "/* Fill the VFP registers with known values. */ \n"
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103 "vmov d0, r0, r1 \n"
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104 "vmov d1, r2, r3 \n"
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105 "vmov d2, r4, r5 \n"
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106 "vmov d3, r6, r7 \n"
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107 "vmov d4, r8, r9 \n"
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108 "vmov d5, r10, r11 \n"
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109 "vmov d6, r0, r1 \n"
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110 "vmov d7, r2, r3 \n"
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111 "vmov d8, r4, r5 \n"
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112 "vmov d9, r6, r7 \n"
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113 "vmov d10, r8, r9 \n"
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114 "vmov d11, r10, r11 \n"
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115 "vmov d12, r0, r1 \n"
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116 "vmov d13, r2, r3 \n"
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117 "vmov d14, r4, r5 \n"
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118 "vmov d15, r6, r7 \n"
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121 "/* Check all the VFP registers still contain the values set above. \n"
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122 "First save registers that are clobbered by the test. */ \n"
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123 "push { r0-r1 } \n"
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125 "vmov r0, r1, d0 \n"
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127 "bne reg1_error_loopf \n"
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129 "bne reg1_error_loopf \n"
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130 "vmov r0, r1, d1 \n"
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132 "bne reg1_error_loopf \n"
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134 "bne reg1_error_loopf \n"
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135 "vmov r0, r1, d2 \n"
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137 "bne reg1_error_loopf \n"
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139 "bne reg1_error_loopf \n"
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140 "vmov r0, r1, d3 \n"
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142 "bne reg1_error_loopf \n"
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144 "bne reg1_error_loopf \n"
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145 "vmov r0, r1, d4 \n"
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147 "bne reg1_error_loopf \n"
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149 "bne reg1_error_loopf \n"
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150 "vmov r0, r1, d5 \n"
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152 "bne reg1_error_loopf \n"
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154 "bne reg1_error_loopf \n"
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155 "vmov r0, r1, d6 \n"
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157 "bne reg1_error_loopf \n"
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159 "bne reg1_error_loopf \n"
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160 "vmov r0, r1, d7 \n"
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162 "bne reg1_error_loopf \n"
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164 "bne reg1_error_loopf \n"
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165 "vmov r0, r1, d8 \n"
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167 "bne reg1_error_loopf \n"
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169 "bne reg1_error_loopf \n"
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170 "vmov r0, r1, d9 \n"
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172 "bne reg1_error_loopf \n"
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174 "bne reg1_error_loopf \n"
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175 "vmov r0, r1, d10 \n"
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177 "bne reg1_error_loopf \n"
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179 "bne reg1_error_loopf \n"
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180 "vmov r0, r1, d11 \n"
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182 "bne reg1_error_loopf \n"
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184 "bne reg1_error_loopf \n"
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185 "vmov r0, r1, d12 \n"
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187 "bne reg1_error_loopf \n"
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189 "bne reg1_error_loopf \n"
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190 "vmov r0, r1, d13 \n"
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192 "bne reg1_error_loopf \n"
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194 "bne reg1_error_loopf \n"
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195 "vmov r0, r1, d14 \n"
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197 "bne reg1_error_loopf \n"
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199 "bne reg1_error_loopf \n"
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200 "vmov r0, r1, d15 \n"
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202 "bne reg1_error_loopf \n"
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204 "bne reg1_error_loopf \n"
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206 "/* Restore the registers that were clobbered by the test. */ \n"
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209 "/* VFP register test passed. Jump to the core register test. */ \n"
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210 "b reg1_loopf_pass \n"
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212 "reg1_error_loopf: \n"
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213 "/* If this line is hit then a VFP register value was found to be incorrect. */ \n"
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214 "b reg1_error_loopf \n"
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216 "reg1_loopf_pass: \n"
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219 "bne reg1_error_loop \n"
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221 "bne reg1_error_loop \n"
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223 "bne reg1_error_loop \n"
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225 "bne reg1_error_loop \n"
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227 "bne reg1_error_loop \n"
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229 "bne reg1_error_loop \n"
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231 "bne reg1_error_loop \n"
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233 "bne reg1_error_loop \n"
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235 "bne reg1_error_loop \n"
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237 "bne reg1_error_loop \n"
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239 "bne reg1_error_loop \n"
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241 "bne reg1_error_loop \n"
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243 "bne reg1_error_loop \n"
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245 "/* Everything passed, increment the loop counter. */ \n"
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246 "push { r0-r1 } \n"
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247 "ldr r0, =ulRegTest1LoopCounter \n"
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249 "adds r1, r1, #1 \n"
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253 "/* Start again. */ \n"
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256 "reg1_error_loop: \n"
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257 "/* If this line is hit then there was an error in a core register value. \n"
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258 "The loop ensures the loop counter stops incrementing. */ \n"
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259 "b reg1_error_loop \n"
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261 ); /* __asm volatile. */
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263 /*-----------------------------------------------------------*/
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265 void vRegTest2Implementation( void )
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269 ".extern ulRegTest2LoopCounter \n"
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270 "/* Set all the core registers to known values. */ \n"
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285 "/* Set all the VFP to known values. */ \n"
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286 "vmov d0, r0, r1 \n"
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287 "vmov d1, r2, r3 \n"
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288 "vmov d2, r4, r5 \n"
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289 "vmov d3, r6, r7 \n"
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290 "vmov d4, r8, r9 \n"
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291 "vmov d5, r10, r11 \n"
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292 "vmov d6, r0, r1 \n"
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293 "vmov d7, r2, r3 \n"
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294 "vmov d8, r4, r5 \n"
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295 "vmov d9, r6, r7 \n"
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296 "vmov d10, r8, r9 \n"
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297 "vmov d11, r10, r11 \n"
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298 "vmov d12, r0, r1 \n"
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299 "vmov d13, r2, r3 \n"
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300 "vmov d14, r4, r5 \n"
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301 "vmov d15, r6, r7 \n"
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305 "/* Check all the VFP registers still contain the values set above. \n"
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306 "First save registers that are clobbered by the test. */ \n"
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307 "push { r0-r1 } \n"
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309 "vmov r0, r1, d0 \n"
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311 "bne reg2_error_loopf \n"
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313 "bne reg2_error_loopf \n"
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314 "vmov r0, r1, d1 \n"
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316 "bne reg2_error_loopf \n"
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318 "bne reg2_error_loopf \n"
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319 "vmov r0, r1, d2 \n"
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321 "bne reg2_error_loopf \n"
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323 "bne reg2_error_loopf \n"
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324 "vmov r0, r1, d3 \n"
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326 "bne reg2_error_loopf \n"
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328 "bne reg2_error_loopf \n"
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329 "vmov r0, r1, d4 \n"
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331 "bne reg2_error_loopf \n"
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333 "bne reg2_error_loopf \n"
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334 "vmov r0, r1, d5 \n"
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336 "bne reg2_error_loopf \n"
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338 "bne reg2_error_loopf \n"
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339 "vmov r0, r1, d6 \n"
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341 "bne reg2_error_loopf \n"
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343 "bne reg2_error_loopf \n"
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344 "vmov r0, r1, d7 \n"
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346 "bne reg2_error_loopf \n"
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348 "bne reg2_error_loopf \n"
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349 "vmov r0, r1, d8 \n"
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351 "bne reg2_error_loopf \n"
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353 "bne reg2_error_loopf \n"
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354 "vmov r0, r1, d9 \n"
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356 "bne reg2_error_loopf \n"
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358 "bne reg2_error_loopf \n"
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359 "vmov r0, r1, d10 \n"
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361 "bne reg2_error_loopf \n"
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363 "bne reg2_error_loopf \n"
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364 "vmov r0, r1, d11 \n"
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366 "bne reg2_error_loopf \n"
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368 "bne reg2_error_loopf \n"
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369 "vmov r0, r1, d12 \n"
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371 "bne reg2_error_loopf \n"
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373 "bne reg2_error_loopf \n"
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374 "vmov r0, r1, d13 \n"
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376 "bne reg2_error_loopf \n"
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378 "bne reg2_error_loopf \n"
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379 "vmov r0, r1, d14 \n"
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381 "bne reg2_error_loopf \n"
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383 "bne reg2_error_loopf \n"
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384 "vmov r0, r1, d15 \n"
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386 "bne reg2_error_loopf \n"
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388 "bne reg2_error_loopf \n"
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390 "/* Restore the registers that were clobbered by the test. */ \n"
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393 "/* VFP register test passed. Jump to the core register test. */ \n"
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394 "b reg2_loopf_pass \n"
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396 "reg2_error_loopf: \n"
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397 "/* If this line is hit then a VFP register value was found to be \n"
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399 "b reg2_error_loopf \n"
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401 "reg2_loopf_pass: \n"
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404 "bne reg2_error_loop \n"
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406 "bne reg2_error_loop \n"
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408 "bne reg2_error_loop \n"
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410 "bne reg2_error_loop \n"
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412 "bne reg2_error_loop \n"
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414 "bne reg2_error_loop \n"
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416 "bne reg2_error_loop \n"
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418 "bne reg2_error_loop \n"
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420 "bne reg2_error_loop \n"
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422 "bne reg2_error_loop \n"
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424 "bne reg2_error_loop \n"
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426 "bne reg2_error_loop \n"
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428 "bne reg2_error_loop \n"
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430 "/* Increment the loop counter to indicate this test is still functioning \n"
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432 "push { r0-r1 } \n"
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433 "ldr r0, =ulRegTest2LoopCounter \n"
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435 "adds r1, r1, #1 \n"
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438 "/* Yield to increase test coverage. */ \n"
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439 "movs r0, #0x01 \n"
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440 "ldr r1, =0xe000ed04 /*NVIC_INT_CTRL */ \n"
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441 "lsl r0, r0, #28 /* Shift to PendSV bit */ \n"
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447 "/* Start again. */ \n"
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450 "reg2_error_loop: \n"
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451 "/* If this line is hit then there was an error in a core register value. \n"
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452 "This loop ensures the loop counter variable stops incrementing. */ \n"
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453 "b reg2_error_loop \n"
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454 ); /* __asm volatile */
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456 /*-----------------------------------------------------------*/
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