1 /* ----------------------------------------------------------------------------
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2 * ATMEL Microcontroller Software Support
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3 * ----------------------------------------------------------------------------
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4 * Copyright (c) 2010, Atmel Corporation
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6 * All rights reserved.
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8 * Redistribution and use in source and binary forms, with or without
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9 * modification, are permitted provided that the following conditions are met:
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11 * - Redistributions of source code must retain the above copyright notice,
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12 * this list of conditions and the disclaimer below.
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14 * Atmel's name may not be used to endorse or promote products derived from
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15 * this software without specific prior written permission.
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17 * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
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18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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20 * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
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21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
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23 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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24 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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25 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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26 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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27 * ----------------------------------------------------------------------------
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33 * Interface for the AT25 SPI driver.
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40 /*----------------------------------------------------------------------------
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42 *----------------------------------------------------------------------------*/
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45 /*----------------------------------------------------------------------------
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47 *----------------------------------------------------------------------------*/
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49 #define AT25_Size(pAt25) ((pAt25)->pDesc->size)
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50 #define AT25_PageSize(pAt25) ((pAt25)->pDesc->pageSize)
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51 #define AT25_BlockSize(pAt25) ((pAt25)->pDesc->blockSize)
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52 #define AT25_Name(pAt25) ((pAt25)->pDesc->name)
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53 #define AT25_ManId(pAt25) (((pAt25)->pDesc->jedecId) & 0xFF)
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54 #define AT25_PageNumber(pAt25) (AT25_Size(pAt25) / AT25_PageSize(pAt25))
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55 #define AT25_BlockNumber(pAt25) (AT25_Size(pAt25) / AT25_BlockSize(pAt25))
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56 #define AT25_PagePerBlock(pAt25) (AT25_BlockSize(pAt25) / AT25_PageSize(pAt25))
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57 #define AT25_BlockEraseCmd(pAt25) ((pAt25)->pDesc->blockEraseCmd)
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59 /*----------------------------------------------------------------------------
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61 *----------------------------------------------------------------------------*/
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63 /** Device is protected, operation cannot be carried out. */
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64 #define AT25_ERROR_PROTECTED 1
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65 /** Device is busy executing a command. */
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66 #define AT25_ERROR_BUSY 2
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67 /** There was a problem while trying to program page data. */
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68 #define AT25_ERROR_PROGRAM 3
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69 /** There was an SPI communication error. */
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70 #define AT25_ERROR_SPI 4
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72 /** Device ready/busy status bit. */
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73 #define AT25_STATUS_RDYBSY (1 << 0)
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74 /** Device is ready. */
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75 #define AT25_STATUS_RDYBSY_READY (0 << 0)
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76 /** Device is busy with internal operations. */
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77 #define AT25_STATUS_RDYBSY_BUSY (1 << 0)
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78 /** Write enable latch status bit. */
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79 #define AT25_STATUS_WEL (1 << 1)
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80 /** Device is not write enabled. */
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81 #define AT25_STATUS_WEL_DISABLED (0 << 1)
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82 /** Device is write enabled. */
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83 #define AT25_STATUS_WEL_ENABLED (1 << 1)
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84 /** Software protection status bitfield. */
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85 #define AT25_STATUS_SWP (3 << 2)
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86 /** All sectors are software protected. */
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87 #define AT25_STATUS_SWP_PROTALL (3 << 2)
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88 /** Some sectors are software protected. */
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89 #define AT25_STATUS_SWP_PROTSOME (1 << 2)
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90 /** No sector is software protected. */
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91 #define AT25_STATUS_SWP_PROTNONE (0 << 2)
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92 /** Write protect pin status bit. */
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93 #define AT25_STATUS_WPP (1 << 4)
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94 /** Write protect signal is not asserted. */
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95 #define AT25_STATUS_WPP_NOTASSERTED (0 << 4)
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96 /** Write protect signal is asserted. */
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97 #define AT25_STATUS_WPP_ASSERTED (1 << 4)
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98 /** Erase/program error bit. */
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99 #define AT25_STATUS_EPE (1 << 5)
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100 /** Erase or program operation was successful. */
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101 #define AT25_STATUS_EPE_SUCCESS (0 << 5)
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102 /** Erase or program error detected. */
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103 #define AT25_STATUS_EPE_ERROR (1 << 5)
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104 /** Sector protection registers locked bit. */
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105 #define AT25_STATUS_SPRL (1 << 7)
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106 /** Sector protection registers are unlocked. */
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107 #define AT25_STATUS_SPRL_UNLOCKED (0 << 7)
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108 /** Sector protection registers are locked. */
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109 #define AT25_STATUS_SPRL_LOCKED (1 << 7)
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111 /** Read array command code. */
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112 #define AT25_READ_ARRAY 0x0B
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113 /** Read array (low frequency) command code. */
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114 #define AT25_READ_ARRAY_LF 0x03
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115 /** Block erase command code (4K block). */
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116 #define AT25_BLOCK_ERASE_4K 0x20
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117 /** Block erase command code (32K block). */
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118 #define AT25_BLOCK_ERASE_32K 0x52
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119 /** Block erase command code (64K block). */
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120 #define AT25_BLOCK_ERASE_64K 0xD8
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121 /** Chip erase command code 1. */
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122 #define AT25_CHIP_ERASE_1 0x60
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123 /** Chip erase command code 2. */
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124 #define AT25_CHIP_ERASE_2 0xC7
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125 /** Byte/page program command code. */
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126 #define AT25_BYTE_PAGE_PROGRAM 0x02
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127 /** Sequential program mode command code 1. */
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128 #define AT25_SEQUENTIAL_PROGRAM_1 0xAD
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129 /** Sequential program mode command code 2. */
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130 #define AT25_SEQUENTIAL_PROGRAM_2 0xAF
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131 /** Write enable command code. */
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132 #define AT25_WRITE_ENABLE 0x06
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133 /** Write disable command code. */
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134 #define AT25_WRITE_DISABLE 0x04
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135 /** Protect sector command code. */
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136 #define AT25_PROTECT_SECTOR 0x36
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137 /** Unprotect sector command code. */
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138 #define AT25_UNPROTECT_SECTOR 0x39
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139 /** Read sector protection registers command code. */
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140 #define AT25_READ_SECTOR_PROT 0x3C
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141 /** Read status register command code. */
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142 #define AT25_READ_STATUS 0x05
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143 /** Write status register command code. */
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144 #define AT25_WRITE_STATUS 0x01
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145 /** Read manufacturer and device ID command code. */
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146 #define AT25_READ_JEDEC_ID 0x9F
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147 /** Deep power-down command code. */
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148 #define AT25_DEEP_PDOWN 0xB9
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149 /** Resume from deep power-down command code. */
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150 #define AT25_RES_DEEP_PDOWN 0xAB
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153 /** SPI Flash Manufacturer JEDEC ID */
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154 #define ATMEL_SPI_FLASH 0x1F
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155 #define ST_SPI_FLASH 0x20
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156 #define WINBOND_SPI_FLASH 0xEF
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157 #define MACRONIX_SPI_FLASH 0xC2
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158 #define SST_SPI_FLASH 0xBF
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160 /*----------------------------------------------------------------------------
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162 *----------------------------------------------------------------------------*/
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164 /** Describes a serial firmware flash device parameters. */
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165 typedef struct _At25Desc {
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167 /** Device string name. */
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169 /** JEDEC ID of device. */
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170 unsigned int jedecId;
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171 /** Size of device in bytes. */
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173 /** Size of one page in bytes. */
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174 unsigned int pageSize;
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175 /** Block erase size in bytes. */
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176 unsigned int blockSize;
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177 /** Block erase command. */
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178 unsigned int blockEraseCmd;
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183 * Serial flash driver structure. Holds the current state of the driver,
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184 * including the current command and the descriptor for the underlying device.
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186 typedef struct _At25 {
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188 /** Pointer to the underlying SPI driver. */
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190 /** Current SPI command sent to the SPI driver. */
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192 /** Pointer to a descriptor for the serial firmware flash device. */
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193 const At25Desc *pDesc;
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194 /** Command buffer. */
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195 unsigned int pCmdBuffer[2];
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199 /*----------------------------------------------------------------------------
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200 * Exported functions
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201 *----------------------------------------------------------------------------*/
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203 extern void AT25_Configure(At25 *pAt25, Spid *pSpid, unsigned char cs);
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205 extern unsigned char AT25_SendCommand(
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208 unsigned char cmdSize,
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209 unsigned char *pData,
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210 unsigned int dataSize,
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211 unsigned int address,
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212 SpidCallback callback,
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215 extern unsigned char AT25_IsBusy(At25 *pAt25);
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217 extern const At25Desc * AT25_FindDevice(
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219 unsigned int jedecId);
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221 #endif /*#ifndef AT25_SPI_H */
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