1 /* ----------------------------------------------------------------------------
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2 * SAM Software Package License
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3 * ----------------------------------------------------------------------------
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4 * Copyright (c) 2012, Atmel Corporation
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6 * All rights reserved.
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8 * Redistribution and use in source and binary forms, with or without
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9 * modification, are permitted provided that the following conditions are met:
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11 * - Redistributions of source code must retain the above copyright notice,
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12 * this list of conditions and the disclaimer below.
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14 * Atmel's name may not be used to endorse or promote products derived from
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15 * this software without specific prior written permission.
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17 * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
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18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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20 * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
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21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
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23 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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24 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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25 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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26 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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27 * ----------------------------------------------------------------------------
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32 /** \addtogroup gmac_module
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34 * Provides the interface to configure and use the GMAC peripheral.
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36 * \section gmac_usage Usage
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37 * - Configure Gmac::GMAC_NCFG with GMAC_Configure(), some of related controls
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38 * are also available, such as:
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39 * - GMAC_SetSpeed(): Setup GMAC working clock.
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40 * - GMAC_FullDuplexEnable(): Working in full duplex or not.
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41 * - GMAC_CpyAllEnable(): Copying all valid frames (\ref GMAC_NCFG_CAF).
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43 * - Setup Gmac::GMAC_NCR with GMAC_NetworkControl(), more related controls
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45 * - GMAC_ReceiveEnable(): Enable/Disable Rx.
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46 * - GMAC_TransmitEnable(): Enable/Disable Tx.
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47 * - GMAC_BroadcastDisable(): Enable/Disable broadcast receiving.
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49 * - Manage GMAC interrupts with GMAC_EnableIt(), GMAC_DisableIt(),
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50 * GMAC_GetItMask() and GMAC_GetItStatus().
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51 * - Manage GMAC Tx/Rx status with GMAC_GetTxStatus(), GMAC_GetRxStatus()
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52 * GMAC_ClearTxStatus() and GMAC_ClearRxStatus().
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53 * - Manage GMAC Queue with GMAC_SetTxQueue(), GMAC_GetTxQueue(),
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54 * GMAC_SetRxQueue() and GMAC_GetRxQueue(), the queue descriptor can define
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55 * by \ref sGmacRxDescriptor and \ref sGmacTxDescriptor.
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56 * - Manage PHY through GMAC is performed by
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57 * - GMAC_ManagementEnable(): Enable/Disable PHY management.
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58 * - GMAC_PHYMaintain(): Execute PHY management commands.
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59 * - GMAC_PHYData(): Return PHY management data.
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60 * - GMAC_IsIdle(): Check if PHY is idle.
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61 * - Setup GMAC parameters with following functions:
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62 * - GMAC_SetHash(): Set Hash value.
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63 * - GMAC_SetAddress(): Set MAC address.
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64 * - Enable/Disable GMAC transceiver clock via GMAC_TransceiverClockEnable()
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65 * - Switch GMAC MII/RMII mode through GMAC_RMIIEnable()
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67 * For more accurate information, please look at the GMAC section of the
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70 * \sa \ref gmacd_module
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76 * \defgroup gmac_defines GMAC Defines
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77 * \defgroup gmac_structs GMAC Data Structs
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78 * \defgroup gmac_functions GMAC Functions
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85 /*----------------------------------------------------------------------------
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87 *----------------------------------------------------------------------------*/
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96 /*----------------------------------------------------------------------------
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98 *----------------------------------------------------------------------------*/
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99 /** \addtogroup gmac_defines
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102 #define NUM_GMAC_QUEUES 3
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103 /// Board GMAC base address
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107 #define GMAC_RX_UNITSIZE 512 /// Fixed size for RX buffer
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108 #define GMAC_TX_UNITSIZE 512 /// Size for ETH frame length
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109 #define GMAC_FRAME_LENTGH_MAX 1536
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111 #define GMAC_DUPLEX_HALF 0
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112 #define GMAC_DUPLEX_FULL 1
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115 #define GMAC_SPEED_10M 0
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116 #define GMAC_SPEED_100M 1
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117 #define GMAC_SPEED_1000M 2
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119 /*------------------------------------------------------------------------------
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121 ------------------------------------------------------------------------------
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123 /// The buffer addresses written into the descriptors must be aligned so the
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124 /// last few bits are zero. These bits have special meaning for the GMAC
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125 /// peripheral and cannot be used as part of the address.
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126 #define GMAC_ADDRESS_MASK ((unsigned int)0xFFFFFFFC)
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127 #define GMAC_LENGTH_FRAME ((unsigned int)0x3FFF) /// Length of frame mask
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129 // receive buffer descriptor bits
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130 #define GMAC_RX_OWNERSHIP_BIT (1u << 0)
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131 #define GMAC_RX_WRAP_BIT (1u << 1)
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132 #define GMAC_RX_SOF_BIT (1u << 14)
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133 #define GMAC_RX_EOF_BIT (1u << 15)
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135 // Transmit buffer descriptor bits
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136 #define GMAC_TX_LAST_BUFFER_BIT (1u << 15)
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137 #define GMAC_TX_WRAP_BIT (1u << 30)
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138 #define GMAC_TX_USED_BIT (1u << 31)
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139 #define GMAC_TX_RLE_BIT (1u << 29) /// Retry Limit Exceeded
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140 #define GMAC_TX_UND_BIT (1u << 28) /// Tx Buffer Underrun
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141 #define GMAC_TX_ERR_BIT (1u << 27) /// Exhausted in mid-frame
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142 #define GMAC_TX_ERR_BITS \
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143 (GMAC_TX_RLE_BIT | GMAC_TX_UND_BIT | GMAC_TX_ERR_BIT)
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146 #define GMAC_INT_RX_BITS \
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147 (GMAC_IER_RCOMP | GMAC_IER_RXUBR | GMAC_IER_ROVR)
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148 #define GMAC_INT_TX_ERR_BITS \
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149 (GMAC_IER_TUR | GMAC_IER_RLEX | GMAC_IER_TFC | GMAC_IER_HRESP)
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150 #define GMAC_INT_TX_BITS \
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151 (GMAC_INT_TX_ERR_BITS | GMAC_IER_TCOMP)
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152 /*----------------------------------------------------------------------------
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154 *----------------------------------------------------------------------------*/
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155 /** \addtogroup gmac_structs
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158 /* This is the list of GMAC queue */
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165 /** Receive buffer descriptor struct */
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166 typedef struct _GmacRxDescriptor {
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167 union _GmacRxAddr {
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169 struct _GmacRxAddrBM {
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170 uint32_t bOwnership:1, /**< User clear, GMAC set this to one once
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171 it has successfully written a frame to
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173 bWrap:1, /**< Marks last descriptor in receive buffer */
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174 addrDW:30; /**< Address in number of DW */
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176 } addr; /**< Address, Wrap & Ownership */
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177 union _GmacRxStatus {
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179 struct _GmacRxStatusBM {
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180 uint32_t len:12, /** Length of frame including FCS */
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181 offset:2, /** Receive buffer offset,
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182 bits 13:12 of frame length for jumbo
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184 bSof:1, /** Start of frame */
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185 bEof:1, /** End of frame */
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186 bCFI:1, /** Concatenation Format Indicator */
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187 vlanPriority:3, /** VLAN priority (if VLAN detected) */
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188 bPriorityDetected:1, /** Priority tag detected */
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189 bVlanDetected:1, /**< VLAN tag detected */
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190 bTypeIDMatch:1, /**< Type ID match */
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191 bAddr4Match:1, /**< Address register 4 match */
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192 bAddr3Match:1, /**< Address register 3 match */
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193 bAddr2Match:1, /**< Address register 2 match */
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194 bAddr1Match:1, /**< Address register 1 match */
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196 bExtAddrMatch:1, /**< External address match */
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197 bUniHashMatch:1, /**< Unicast hash match */
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198 bMultiHashMatch:1, /**< Multicast hash match */
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199 bBroadcastDetected:1; /**< Global all ones broadcast
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200 address detected */
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203 } sGmacRxDescriptor ; /* GCC */
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205 /** Transmit buffer descriptor struct */
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206 typedef struct _GmacTxDescriptor {
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208 union _GmacTxStatus {
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210 struct _GmacTxStatusBM {
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211 uint32_t len:11, /**< Length of buffer */
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213 bLastBuffer:1, /**< Last buffer (in the current frame) */
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214 bNoCRC:1, /**< No CRC */
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216 bExhausted:1, /**< Buffer exhausted in mid frame */
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217 bUnderrun:1, /**< Transmit underrun */
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218 bError:1, /**< Retry limit exceeded, error detected */
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219 bWrap:1, /**< Marks last descriptor in TD list */
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220 bUsed:1; /**< User clear, GMAC sets this once a frame
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221 has been successfully transmitted */
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224 } sGmacTxDescriptor; /* GCC */
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228 //-----------------------------------------------------------------------------
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229 // PHY Exported functions
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230 //-----------------------------------------------------------------------------
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231 extern uint8_t GMAC_IsIdle(Gmac *pGmac);
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232 extern void GMAC_PHYMaintain(Gmac *pGmac,
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237 extern uint16_t GMAC_PHYData(Gmac *pGmac);
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238 extern void GMAC_ClearStatistics(Gmac *pGmac);
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239 extern void GMAC_IncreaseStatistics(Gmac *pGmac);
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240 extern void GMAC_StatisticsWriteEnable(Gmac *pGmac, uint8_t bEnaDis);
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241 extern uint8_t GMAC_SetMdcClock(Gmac *pGmac, uint32_t mck );
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242 extern void GMAC_EnableMdio(Gmac *pGmac );
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243 extern void GMAC_DisableMdio(Gmac *pGmac );
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244 extern void GMAC_EnableMII(Gmac *pGmac );
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245 extern void GMAC_EnableRMII(Gmac *pGmac );
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246 extern void GMAC_EnableGMII( Gmac *pGmac );
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247 extern void GMAC_SetLinkSpeed(Gmac *pGmac, uint8_t speed, uint8_t fullduplex);
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248 extern void GMAC_EnableIt(Gmac *pGmac, uint32_t dwSources, gmacQueList_t queueIdx);
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249 extern void GMAC_EnableAllQueueIt(Gmac *pGmac, uint32_t dwSources);
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250 extern void GMAC_DisableIt(Gmac *pGmac, uint32_t dwSources, gmacQueList_t queueIdx);
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251 extern void GMAC_DisableAllQueueIt(Gmac *pGmac, uint32_t dwSources);
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252 extern uint32_t GMAC_GetItStatus(Gmac *pGmac, gmacQueList_t queueIdx);
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253 extern uint32_t GMAC_GetItMask(Gmac *pGmac, gmacQueList_t queueIdx);
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254 extern uint32_t GMAC_GetTxStatus(Gmac *pGmac);
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255 extern void GMAC_ClearTxStatus(Gmac *pGmac, uint32_t dwStatus);
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256 extern uint32_t GMAC_GetRxStatus(Gmac *pGmac);
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257 extern void GMAC_ClearRxStatus(Gmac *pGmac, uint32_t dwStatus);
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258 extern void GMAC_ReceiveEnable(Gmac* pGmac, uint8_t bEnaDis);
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259 extern void GMAC_TransmitEnable(Gmac *pGmac, uint8_t bEnaDis);
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260 extern uint32_t GMAC_SetLocalLoopBack(Gmac *pGmac);
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261 extern void GMAC_SetRxQueue(Gmac *pGmac, uint32_t dwAddr, gmacQueList_t queueIdx);
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262 extern uint32_t GMAC_GetRxQueue(Gmac *pGmac, gmacQueList_t queueIdx);
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263 extern void GMAC_SetTxQueue(Gmac *pGmac, uint32_t dwAddr, gmacQueList_t queueIdx);
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264 extern uint32_t GMAC_GetTxQueue(Gmac *pGmac, gmacQueList_t queueIdx);
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265 extern void GMAC_NetworkControl(Gmac *pGmac, uint32_t bmNCR);
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266 extern uint32_t GMAC_GetNetworkControl(Gmac *pGmac);
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267 extern void GMAC_SetAddress(Gmac *pGmac, uint8_t bIndex, uint8_t *pMacAddr);
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268 extern void GMAC_SetAddress32(Gmac *pGmac, uint8_t bIndex, uint32_t dwMacT, uint32_t dwMacB);
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269 extern void GMAC_SetAddress64(Gmac *pGmac, uint8_t bIndex, uint64_t ddwMac);
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270 extern void GMAC_Configure(Gmac *pGmac, uint32_t dwCfg);
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271 extern void GMAC_DmaConfigure(Gmac *pGmac, uint32_t dwCfg);
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272 extern uint32_t GMAC_GetConfigure(Gmac *pGmac);
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273 extern void GMAC_TransmissionStart(Gmac *pGmac);
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274 extern void GMAC_TransmissionHalt(Gmac *pGmac);
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275 extern void GMAC_EnableRGMII(Gmac *pGmac, uint32_t duplex, uint32_t speed);
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276 #endif // #ifndef GMAC_H
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