1 /* ----------------------------------------------------------------------------
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2 * SAM Software Package License
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3 * ----------------------------------------------------------------------------
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4 * Copyright (c) 2012, Atmel Corporation
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6 * All rights reserved.
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8 * Redistribution and use in source and binary forms, with or without
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9 * modification, are permitted provided that the following conditions are met:
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11 * - Redistributions of source code must retain the above copyright notice,
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12 * this list of conditions and the disclaimer below.
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14 * Atmel's name may not be used to endorse or promote products derived from
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15 * this software without specific prior written permission.
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17 * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
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18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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20 * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
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21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
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23 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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24 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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25 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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26 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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27 * ----------------------------------------------------------------------------
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35 * This file provides a basic API for PIO configuration and usage of
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36 * user-controlled pins. Please refer to the board.h file for a list of
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37 * available pin definitions.
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41 * -# Define a constant pin description array such as the following one, using
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42 * the existing definitions provided by the board.h file if possible:
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44 * const Pin pPins[] = {PIN_USART0_TXD, PIN_USART0_RXD};
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46 * Alternatively, it is possible to add new pins by provided the full Pin
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49 * // Pin instance to configure PA10 & PA11 as inputs with the internal
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50 * // pull-up enabled.
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51 * const Pin pPins = {
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52 * (1 << 10) | (1 << 11),
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59 * -# Configure a pin array by calling PIO_Configure() with a pointer to the
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60 * array and its size (which is computed using the PIO_LISTSIZE macro).
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61 * -# Change and get the value of a user-controlled pin using the PIO_Set,
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62 * PIO_Clear and PIO_Get methods.
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63 * -# Get the level being currently output by a user-controlled pin configured
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64 * as an output using PIO_GetOutputDataStatus().
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79 * Global Definitions
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82 /** The pin is controlled by the associated signal of peripheral A. */
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83 #define PIO_PERIPH_A 0
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84 /** The pin is controlled by the associated signal of peripheral B. */
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85 #define PIO_PERIPH_B 1
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86 /** The pin is controlled by the associated signal of peripheral C. */
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87 #define PIO_PERIPH_C 2
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88 /** The pin is controlled by the associated signal of peripheral D. */
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89 #define PIO_PERIPH_D 3
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90 /** The pin is an input. */
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92 /** The pin is an output and has a default level of 0. */
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93 #define PIO_OUTPUT_0 5
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94 /** The pin is an output and has a default level of 1. */
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95 #define PIO_OUTPUT_1 6
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97 /** Default pin configuration (no attribute). */
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98 #define PIO_DEFAULT (0 << 0)
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99 /** The internal pin pull-up is active. */
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100 #define PIO_PULLUP (1 << 0)
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101 /** The internal glitch filter is active. */
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102 #define PIO_DEGLITCH (1 << 1)
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103 /** The pin is open-drain. */
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104 #define PIO_OPENDRAIN (1 << 2)
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106 /** The internal debouncing filter is active. */
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107 #define PIO_DEBOUNCE (1 << 3)
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109 /** Enable additional interrupt modes. */
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110 #define PIO_IT_AIME (1 << 4)
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112 /** Interrupt High Level/Rising Edge detection is active. */
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113 #define PIO_IT_RE_OR_HL (1 << 5)
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114 /** Interrupt Edge detection is active. */
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115 #define PIO_IT_EDGE (1 << 6)
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117 /** Low level interrupt is active */
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118 #define PIO_IT_LOW_LEVEL (0 | 0 | PIO_IT_AIME)
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119 /** High level interrupt is active */
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120 #define PIO_IT_HIGH_LEVEL (PIO_IT_RE_OR_HL | 0 | PIO_IT_AIME)
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121 /** Falling edge interrupt is active */
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122 #define PIO_IT_FALL_EDGE (0 | PIO_IT_EDGE | PIO_IT_AIME)
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123 /** Rising edge interrupt is active */
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124 #define PIO_IT_RISE_EDGE (PIO_IT_RE_OR_HL | PIO_IT_EDGE | PIO_IT_AIME)
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125 /** The WP is enable */
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126 #define PIO_WPMR_WPEN_EN ( 0x01 << 0 )
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127 /** The WP is disable */
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128 #define PIO_WPMR_WPEN_DIS ( 0x00 << 0 )
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129 /** Valid WP key */
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130 #define PIO_WPMR_WPKEY_VALID ( 0x50494F << 8 )
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140 * Calculates the size of an array of Pin instances. The array must be defined
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141 * locally (i.e. not a pointer), otherwise the computation will not be correct.
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142 * \param pPins Local array of Pin instances.
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143 * \return Number of elements in array.
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145 #define PIO_LISTSIZE(pPins) (sizeof(pPins) / sizeof(Pin))
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153 * Describes the type and attribute of one PIO pin or a group of similar pins.
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154 * The #type# field can have the following values:
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161 * The #attribute# field is a bitmask that can either be set to PIO_DEFAULt,
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162 * or combine (using bitwise OR '|') any number of the following constants:
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167 * - PIO_IT_LOW_LEVEL
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168 * - PIO_IT_HIGH_LEVEL
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169 * - PIO_IT_FALL_EDGE
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170 * - PIO_IT_RISE_EDGE
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172 typedef struct _Pin
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174 /* Bitmask indicating which pin(s) to configure. */
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176 /* Pointer to the PIO controller which has the pin(s). */
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178 /* Peripheral ID of the PIO controller which has the pin(s). */
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182 /* Pin attribute. */
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187 * Global Access Macros
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194 extern uint8_t PIO_Configure( const Pin *list, uint32_t size ) ;
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196 extern void PIO_Set( const Pin *pin ) ;
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198 extern void PIO_Clear( const Pin *pin ) ;
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200 extern uint8_t PIO_Get( const Pin *pin ) ;
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202 extern uint8_t PIO_GetOutputDataStatus( const Pin *pin ) ;
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204 extern void PIO_SetDebounceFilter( const Pin *pin, uint32_t cuttoff );
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206 extern void PIO_EnableWriteProtect( const Pin *pin );
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208 extern void PIO_DisableWriteProtect( const Pin *pin );
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210 extern void PIO_SetPinType( Pin * pin, uint8_t pinType);
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212 extern uint32_t PIO_GetWriteProtectViolationInfo( const Pin * pin );
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217 #endif /* #ifndef _PIO_ */
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