1 /* ----------------------------------------------------------------------------
\r
2 * SAM Software Package License
\r
3 * ----------------------------------------------------------------------------
\r
4 * Copyright (c) 2014, Atmel Corporation
\r
6 * All rights reserved.
\r
8 * Redistribution and use in source and binary forms, with or without
\r
9 * modification, are permitted provided that the following conditions are met:
\r
11 * - Redistributions of source code must retain the above copyright notice,
\r
12 * this list of conditions and the disclaimer below.
\r
14 * Atmel's name may not be used to endorse or promote products derived from
\r
15 * this software without specific prior written permission.
\r
17 * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
\r
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
\r
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
\r
20 * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
\r
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
\r
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
\r
23 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
\r
24 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
\r
25 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
\r
26 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
\r
27 * ----------------------------------------------------------------------------
\r
32 /*----------------------------------------------------------------------------
\r
34 *----------------------------------------------------------------------------*/
\r
37 /*----------------------------------------------------------------------------
\r
39 *----------------------------------------------------------------------------*/
\r
42 * \brief Configures one or more pin(s) of a PIO controller as being controlled by
\r
43 * peripheral A. Optionally, the corresponding internal pull-up(s) can be enabled.
\r
45 * \param pio Pointer to a PIO controller.
\r
46 * \param mask Bitmask of one or more pin(s) to configure.
\r
47 * \param enablePullUp Indicates if the pin(s) internal pull-up shall be
\r
50 static void PIO_SetPeripheralA(
\r
53 unsigned char enablePullUp)
\r
55 unsigned int abcdsr;
\r
56 /* Disable interrupts on the pin(s) */
\r
57 pio->PIO_IDR = mask;
\r
59 /* Enable the pull-up(s) if necessary */
\r
61 pio->PIO_PUER = mask;
\r
65 pio->PIO_PUDR = mask;
\r
68 abcdsr = pio->PIO_ABCDSR[0];
\r
69 pio->PIO_ABCDSR[0] &= (~mask & abcdsr);
\r
70 abcdsr = pio->PIO_ABCDSR[1];
\r
71 pio->PIO_ABCDSR[1] &= (~mask & abcdsr);
\r
72 pio->PIO_PDR = mask;
\r
76 * \brief Configures one or more pin(s) of a PIO controller as being controlled by
\r
77 * peripheral B. Optionally, the corresponding internal pull-up(s) can be enabled.
\r
79 * \param pio Pointer to a PIO controller.
\r
80 * \param mask Bitmask of one or more pin(s) to configure.
\r
81 * \param enablePullUp Indicates if the pin(s) internal pull-up shall be
\r
84 static void PIO_SetPeripheralB(
\r
87 unsigned char enablePullUp)
\r
89 unsigned int abcdsr;
\r
90 /* Disable interrupts on the pin(s) */
\r
91 pio->PIO_IDR = mask;
\r
93 /* Enable the pull-up(s) if necessary */
\r
96 pio->PIO_PUER = mask;
\r
100 pio->PIO_PUDR = mask;
\r
103 abcdsr = pio->PIO_ABCDSR[0];
\r
104 pio->PIO_ABCDSR[0] = (mask | abcdsr);
\r
105 abcdsr = pio->PIO_ABCDSR[1];
\r
106 pio->PIO_ABCDSR[1] &= (~mask & abcdsr);
\r
108 pio->PIO_PDR = mask;
\r
112 * \brief Configures one or more pin(s) of a PIO controller as being controlled by
\r
113 * peripheral C. Optionally, the corresponding internal pull-up(s) can be enabled.
\r
115 * \param pio Pointer to a PIO controller.
\r
116 * \param mask Bitmask of one or more pin(s) to configure.
\r
117 * \param enablePullUp Indicates if the pin(s) internal pull-up shall be
\r
120 static void PIO_SetPeripheralC(
\r
123 unsigned char enablePullUp)
\r
125 unsigned int abcdsr;
\r
126 /* Disable interrupts on the pin(s) */
\r
127 pio->PIO_IDR = mask;
\r
129 /* Enable the pull-up(s) if necessary */
\r
130 if (enablePullUp) {
\r
132 pio->PIO_PUER = mask;
\r
136 pio->PIO_PUDR = mask;
\r
139 abcdsr = pio->PIO_ABCDSR[0];
\r
140 pio->PIO_ABCDSR[0] &= (~mask & abcdsr);
\r
141 abcdsr = pio->PIO_ABCDSR[1];
\r
142 pio->PIO_ABCDSR[1] = (mask | abcdsr);
\r
144 pio->PIO_PDR = mask;
\r
148 * \brief Configures one or more pin(s) of a PIO controller as being controlled by
\r
149 * peripheral D. Optionally, the corresponding internal pull-up(s) can be enabled.
\r
151 * \param pio Pointer to a PIO controller.
\r
152 * \param mask Bitmask of one or more pin(s) to configure.
\r
153 * \param enablePullUp Indicates if the pin(s) internal pull-up shall be
\r
156 static void PIO_SetPeripheralD(
\r
159 unsigned char enablePullUp)
\r
161 unsigned int abcdsr;
\r
162 /* Disable interrupts on the pin(s) */
\r
163 pio->PIO_IDR = mask;
\r
165 /* Enable the pull-up(s) if necessary */
\r
166 if (enablePullUp) {
\r
168 pio->PIO_PUER = mask;
\r
172 pio->PIO_PUDR = mask;
\r
175 abcdsr = pio->PIO_ABCDSR[0];
\r
176 pio->PIO_ABCDSR[0] = (mask | abcdsr);
\r
177 abcdsr = pio->PIO_ABCDSR[1];
\r
178 pio->PIO_ABCDSR[1] = (mask | abcdsr);
\r
180 pio->PIO_PDR = mask;
\r
184 * \brief Configures one or more pin(s) or a PIO controller as inputs. Optionally,
\r
185 * the corresponding internal pull-up(s) and glitch filter(s) can be enabled.
\r
187 * \param pio Pointer to a PIO controller.
\r
188 * \param mask Bitmask indicating which pin(s) to configure as input(s).
\r
189 * \param enablePullUp Indicates if the internal pull-up(s) must be enabled.
\r
190 * \param enableFilter Indicates if the glitch filter(s) must be enabled.
\r
192 static void PIO_SetInput(
\r
195 unsigned char attribute)
\r
197 /* Disable interrupts */
\r
198 pio->PIO_IDR = mask;
\r
200 /* Enable pull-up(s) if necessary */
\r
201 if (attribute & PIO_PULLUP)
\r
202 pio->PIO_PUER = mask;
\r
204 pio->PIO_PUDR = mask;
\r
206 /* Enable Input Filter if necessary */
\r
207 if (attribute & (PIO_DEGLITCH | PIO_DEBOUNCE))
\r
208 pio->PIO_IFER = mask;
\r
210 pio->PIO_IFDR = mask;
\r
212 /* Enable de-glitch or de-bounce if necessary */
\r
213 if (attribute & PIO_DEGLITCH)
\r
215 pio->PIO_IFSCDR = mask;
\r
219 if (attribute & PIO_DEBOUNCE)
\r
221 pio->PIO_IFSCER = mask;
\r
225 /* Configure pin as input */
\r
226 pio->PIO_ODR = mask;
\r
227 pio->PIO_PER = mask;
\r
231 * \brief Configures one or more pin(s) of a PIO controller as outputs, with the
\r
232 * given default value. Optionally, the multi-drive feature can be enabled
\r
235 * \param pio Pointer to a PIO controller.
\r
236 * \param mask Bitmask indicating which pin(s) to configure.
\r
237 * \param defaultValue Default level on the pin(s).
\r
238 * \param enableMultiDrive Indicates if the pin(s) shall be configured as
\r
240 * \param enablePullUp Indicates if the pin shall have its pull-up activated.
\r
242 static void PIO_SetOutput(
\r
245 unsigned char defaultValue,
\r
246 unsigned char enableMultiDrive,
\r
247 unsigned char enablePullUp)
\r
249 /* Disable interrupts */
\r
250 pio->PIO_IDR = mask;
\r
252 /* Enable pull-up(s) if necessary */
\r
253 if (enablePullUp) {
\r
255 pio->PIO_PUER = mask;
\r
259 pio->PIO_PUDR = mask;
\r
262 /* Enable multi-drive if necessary */
\r
263 if (enableMultiDrive) {
\r
265 pio->PIO_MDER = mask;
\r
269 pio->PIO_MDDR = mask;
\r
272 /* Set default value */
\r
273 if (defaultValue) {
\r
275 pio->PIO_SODR = mask;
\r
279 pio->PIO_CODR = mask;
\r
282 /* Configure pin(s) as output(s) */
\r
283 pio->PIO_OER = mask;
\r
284 pio->PIO_PER = mask;
\r
287 /*----------------------------------------------------------------------------
\r
289 *----------------------------------------------------------------------------*/
\r
292 * \brief Configures a list of Pin instances, each of which can either hold a single
\r
293 * pin or a group of pins, depending on the mask value; all pins are configured
\r
294 * by this function. The size of the array must also be provided and is easily
\r
295 * computed using PIO_LISTSIZE whenever its length is not known in advance.
\r
297 * \param list Pointer to a list of Pin instances.
\r
298 * \param size Size of the Pin list (calculated using PIO_LISTSIZE).
\r
300 * \return 1 if the pins have been configured properly; otherwise 0.
\r
302 uint8_t PIO_Configure( const Pin *list, uint32_t size )
\r
304 /* Configure pins */
\r
307 switch ( list->type )
\r
311 PIO_SetPeripheralA(list->pio,
\r
313 (list->attribute & PIO_PULLUP) ? 1 : 0);
\r
317 PIO_SetPeripheralB(list->pio,
\r
319 (list->attribute & PIO_PULLUP) ? 1 : 0);
\r
323 PIO_SetPeripheralC(list->pio,
\r
325 (list->attribute & PIO_PULLUP) ? 1 : 0);
\r
329 PIO_SetPeripheralD(list->pio,
\r
331 (list->attribute & PIO_PULLUP) ? 1 : 0);
\r
335 PMC_EnablePeripheral(list->id);
\r
337 PIO_SetInput(list->pio,
\r
344 PIO_SetOutput(list->pio,
\r
346 (list->type == PIO_OUTPUT_1),
\r
347 (list->attribute & PIO_OPENDRAIN) ? 1 : 0,
\r
348 (list->attribute & PIO_PULLUP) ? 1 : 0);
\r
362 * \brief Sets a high output level on all the PIOs defined in the given Pin instance.
\r
363 * This has no immediate effects on PIOs that are not output, but the PIO
\r
364 * controller will memorize the value they are changed to outputs.
\r
366 * \param pin Pointer to a Pin instance describing one or more pins.
\r
368 void PIO_Set(const Pin *pin)
\r
370 pin->pio->PIO_SODR = pin->mask;
\r
374 * \brief Sets a low output level on all the PIOs defined in the given Pin instance.
\r
375 * This has no immediate effects on PIOs that are not output, but the PIO
\r
376 * controller will memorize the value they are changed to outputs.
\r
378 * \param pin Pointer to a Pin instance describing one or more pins.
\r
380 void PIO_Clear(const Pin *pin)
\r
382 pin->pio->PIO_CODR = pin->mask;
\r
386 * \brief Returns 1 if one or more PIO of the given Pin instance currently have
\r
387 * a high level; otherwise returns 0. This method returns the actual value that
\r
388 * is being read on the pin. To return the supposed output value of a pin, use
\r
389 * PIO_GetOutputDataStatus() instead.
\r
391 * \param pin Pointer to a Pin instance describing one or more pins.
\r
393 * \return 1 if the Pin instance contains at least one PIO that currently has
\r
394 * a high level; otherwise 0.
\r
396 unsigned char PIO_Get( const Pin *pin )
\r
400 if ( (pin->type == PIO_OUTPUT_0) || (pin->type == PIO_OUTPUT_1) )
\r
402 reg = pin->pio->PIO_ODSR ;
\r
406 reg = pin->pio->PIO_PDSR ;
\r
409 if ( (reg & pin->mask) == 0 )
\r
420 * \brief Returns 1 if one or more PIO of the given Pin are configured to output a
\r
421 * high level (even if they are not output).
\r
422 * To get the actual value of the pin, use PIO_Get() instead.
\r
424 * \param pin Pointer to a Pin instance describing one or more pins.
\r
426 * \return 1 if the Pin instance contains at least one PIO that is configured
\r
427 * to output a high level; otherwise 0.
\r
429 unsigned char PIO_GetOutputDataStatus(const Pin *pin)
\r
431 if ((pin->pio->PIO_ODSR & pin->mask) == 0) {
\r
442 * \brief Configures Glitch or Debouncing filter for input.
\r
444 * \param pin Pointer to a Pin instance describing one or more pins.
\r
445 * \param cuttoff Cutt off frequency for debounce filter.
\r
447 void PIO_SetDebounceFilter( const Pin *pin, uint32_t cuttoff )
\r
449 Pio *pio = pin->pio;
\r
451 pio->PIO_IFSCER = pin->mask; /* set Debouncing, 0 bit field no effect */
\r
452 pio->PIO_SCDR = ((32678/(2*(cuttoff))) - 1) & 0x3FFF; /* the lowest 14 bits work */
\r
456 * \brief Enable write protect.
\r
458 * \param pin Pointer to a Pin instance describing one or more pins.
\r
460 void PIO_EnableWriteProtect( const Pin *pin )
\r
462 Pio *pio = pin->pio;
\r
464 pio->PIO_WPMR = ( PIO_WPMR_WPKEY_VALID | PIO_WPMR_WPEN_EN );
\r
468 * \brief Disable write protect.
\r
470 * \param pin Pointer to a Pin instance describing one or more pins.
\r
473 void PIO_DisableWriteProtect( const Pin *pin )
\r
475 Pio *pio = pin->pio;
\r
477 pio->PIO_WPMR = ( PIO_WPMR_WPKEY_VALID | PIO_WPMR_WPEN_DIS );
\r
481 * \brief Get write protect violation information.
\r
483 * \param pin Pointer to a Pin instance describing one or more pins.
\r
486 uint32_t PIO_GetWriteProtectViolationInfo( const Pin * pin )
\r
488 Pio *pio = pin->pio;
\r
489 return (pio->PIO_WPSR);
\r
491 /* \brief Set pin type
\r
492 * the pin is controlled by the corresponding peripheral (A, B, C, D,E)
\r
493 * \param pin Pointer to a Pin instance describing one or more pins.
\r
494 * \param pinType PIO_PERIPH_A, PIO_PERIPH_B, ...
\r
497 void PIO_SetPinType( Pin * pin, uint8_t pinType)
\r
499 pin->type = pinType;
\r