1 /* ----------------------------------------------------------------------------
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2 * SAM Software Package License
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3 * ----------------------------------------------------------------------------
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4 * Copyright (c) 2012, Atmel Corporation
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6 * All rights reserved.
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8 * Redistribution and use in source and binary forms, with or without
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9 * modification, are permitted provided that the following conditions are met:
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11 * - Redistributions of source code must retain the above copyright notice,
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12 * this list of conditions and the disclaimer below.
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14 * Atmel's name may not be used to endorse or promote products derived from
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15 * this software without specific prior written permission.
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17 * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
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18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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20 * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
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21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
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23 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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24 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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25 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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26 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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27 * ----------------------------------------------------------------------------
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33 * Implementation of Watchdog Timer (WDT) controller.
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37 /** \addtogroup wdt_module Working with WDT
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38 * \ingroup peripherals_module
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39 * The WDT driver provides the interface to configure and use the WDT
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42 * The WDT can be used to prevent system lock-up if the software becomes
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43 * trapped in a deadlock. It can generate a general reset or a processor
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44 * reset only. It is clocked by slow clock divided by 128.
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46 * The WDT is running at reset with 16 seconds watchdog period (slow clock at 32.768 kHz)
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47 * and external reset generation enabled. The user must either disable it or
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48 * reprogram it to meet the application requires.
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50 * To use the WDT, the user could follow these few steps:
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52 * <li>Enable watchdog with given mode using \ref WDT_Enable().
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53 * <li>Restart the watchdog using \ref WDT_Restart() within the watchdog period.
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56 * For more accurate information, please look at the WDT section of the
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60 * The Watchdog Mode Register (WDT_MR) can be written only once.\n
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69 /*---------------------------------------------------------------------------
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71 *---------------------------------------------------------------------------*/
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77 /*----------------------------------------------------------------------------
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78 * Exported functions
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79 *----------------------------------------------------------------------------*/
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82 * \brief Enable watchdog with given mode.
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84 * \note The Watchdog Mode Register (WDT_MR) can be written only once.
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85 * Only a processor reset resets it.
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87 * \param dwMode WDT mode to be set
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89 extern void WDT_Enable( Wdt* pWDT, uint32_t dwMode )
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91 pWDT->WDT_MR = dwMode ;
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95 * \brief Disable watchdog.
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97 * \note The Watchdog Mode Register (WDT_MR) can be written only once.
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98 * Only a processor reset resets it.
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100 extern void WDT_Disable( Wdt* pWDT )
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102 pWDT->WDT_MR = WDT_MR_WDDIS;
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106 * \brief Watchdog restart.
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108 extern void WDT_Restart( Wdt* pWDT )
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110 pWDT->WDT_CR = 0xA5000001;
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114 * \brief Watchdog get status.
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116 extern uint32_t WDT_GetStatus( Wdt* pWDT )
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118 return (pWDT->WDT_SR & 0x3) ;
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122 * \brief Watchdog get period.
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124 * \param dwMs desired watchdog period in millisecond.
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126 extern uint32_t WDT_GetPeriod( uint32_t dwMs )
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128 if ( (dwMs < 4) || (dwMs > 16000) )
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132 return ((dwMs << 8) / 1000) ;
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