2 ******************************************************************************
\r
3 * @file stm32f7xx_hal_iwdg.h
\r
4 * @author MCD Application Team
\r
7 * @brief Header file of IWDG HAL module.
\r
8 ******************************************************************************
\r
11 * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
\r
13 * Redistribution and use in source and binary forms, with or without modification,
\r
14 * are permitted provided that the following conditions are met:
\r
15 * 1. Redistributions of source code must retain the above copyright notice,
\r
16 * this list of conditions and the following disclaimer.
\r
17 * 2. Redistributions in binary form must reproduce the above copyright notice,
\r
18 * this list of conditions and the following disclaimer in the documentation
\r
19 * and/or other materials provided with the distribution.
\r
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
\r
21 * may be used to endorse or promote products derived from this software
\r
22 * without specific prior written permission.
\r
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
\r
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
\r
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
\r
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
\r
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
\r
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
\r
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
\r
31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
\r
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
\r
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
\r
35 ******************************************************************************
\r
38 /* Define to prevent recursive inclusion -------------------------------------*/
\r
39 #ifndef __STM32F7xx_HAL_IWDG_H
\r
40 #define __STM32F7xx_HAL_IWDG_H
\r
46 /* Includes ------------------------------------------------------------------*/
\r
47 #include "stm32f7xx_hal_def.h"
\r
49 /** @addtogroup STM32F7xx_HAL_Driver
\r
53 /** @addtogroup IWDG
\r
57 /* Exported types ------------------------------------------------------------*/
\r
58 /** @defgroup IWDG_Exported_Types IWDG Exported Types
\r
63 * @brief IWDG HAL State Structure definition
\r
67 HAL_IWDG_STATE_RESET = 0x00, /*!< IWDG not yet initialized or disabled */
\r
68 HAL_IWDG_STATE_READY = 0x01, /*!< IWDG initialized and ready for use */
\r
69 HAL_IWDG_STATE_BUSY = 0x02, /*!< IWDG internal process is ongoing */
\r
70 HAL_IWDG_STATE_TIMEOUT = 0x03, /*!< IWDG timeout state */
\r
71 HAL_IWDG_STATE_ERROR = 0x04 /*!< IWDG error state */
\r
73 }HAL_IWDG_StateTypeDef;
\r
76 * @brief IWDG Init structure definition
\r
80 uint32_t Prescaler; /*!< Select the prescaler of the IWDG.
\r
81 This parameter can be a value of @ref IWDG_Prescaler */
\r
83 uint32_t Reload; /*!< Specifies the IWDG down-counter reload value.
\r
84 This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
\r
86 uint32_t Window; /*!< Specifies the window value to be compared to the down-counter.
\r
87 This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
\r
92 * @brief IWDG Handle Structure definition
\r
96 IWDG_TypeDef *Instance; /*!< Register base address */
\r
98 IWDG_InitTypeDef Init; /*!< IWDG required parameters */
\r
100 HAL_LockTypeDef Lock; /*!< IWDG Locking object */
\r
102 __IO HAL_IWDG_StateTypeDef State; /*!< IWDG communication state */
\r
104 }IWDG_HandleTypeDef;
\r
110 /* Exported constants --------------------------------------------------------*/
\r
111 /** @defgroup IWDG_Exported_Constants IWDG Exported Constants
\r
115 /** @defgroup IWDG_Prescaler IWDG Prescaler
\r
118 #define IWDG_PRESCALER_4 ((uint8_t)0x00) /*!< IWDG prescaler set to 4 */
\r
119 #define IWDG_PRESCALER_8 ((uint8_t)(IWDG_PR_PR_0)) /*!< IWDG prescaler set to 8 */
\r
120 #define IWDG_PRESCALER_16 ((uint8_t)(IWDG_PR_PR_1)) /*!< IWDG prescaler set to 16 */
\r
121 #define IWDG_PRESCALER_32 ((uint8_t)(IWDG_PR_PR_1 | IWDG_PR_PR_0)) /*!< IWDG prescaler set to 32 */
\r
122 #define IWDG_PRESCALER_64 ((uint8_t)(IWDG_PR_PR_2)) /*!< IWDG prescaler set to 64 */
\r
123 #define IWDG_PRESCALER_128 ((uint8_t)(IWDG_PR_PR_2 | IWDG_PR_PR_0)) /*!< IWDG prescaler set to 128 */
\r
124 #define IWDG_PRESCALER_256 ((uint8_t)(IWDG_PR_PR_2 | IWDG_PR_PR_1)) /*!< IWDG prescaler set to 256 */
\r
129 /** @defgroup IWDG_Window IWDG Window
\r
132 #define IWDG_WINDOW_DISABLE ((uint32_t)0x00000FFF)
\r
141 /* Exported macros -----------------------------------------------------------*/
\r
142 /** @defgroup IWDG_Exported_Macros IWDG Exported Macros
\r
146 /** @brief Reset IWDG handle state
\r
147 * @param __HANDLE__: IWDG handle.
\r
150 #define __HAL_IWDG_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_IWDG_STATE_RESET)
\r
153 * @brief Enables the IWDG peripheral.
\r
154 * @param __HANDLE__: IWDG handle
\r
157 #define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE)
\r
160 * @brief Reloads IWDG counter with value defined in the reload register
\r
161 * (write access to IWDG_PR and IWDG_RLR registers disabled).
\r
162 * @param __HANDLE__: IWDG handle
\r
165 #define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD)
\r
168 * @brief Gets the selected IWDG's flag status.
\r
169 * @param __HANDLE__: IWDG handle
\r
170 * @param __FLAG__: specifies the flag to check.
\r
171 * This parameter can be one of the following values:
\r
172 * @arg IWDG_FLAG_PVU: Watchdog counter reload value update flag
\r
173 * @arg IWDG_FLAG_RVU: Watchdog counter prescaler value flag
\r
174 * @arg IWDG_FLAG_WVU: Watchdog counter window value flag
\r
175 * @retval The new state of __FLAG__ (TRUE or FALSE) .
\r
177 #define __HAL_IWDG_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
\r
183 /* Exported functions --------------------------------------------------------*/
\r
184 /** @addtogroup IWDG_Exported_Functions
\r
188 /** @addtogroup IWDG_Exported_Functions_Group1
\r
191 /* Initialization/de-initialization functions ********************************/
\r
192 HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg);
\r
193 void HAL_IWDG_MspInit(IWDG_HandleTypeDef *hiwdg);
\r
198 /** @addtogroup IWDG_Exported_Functions_Group2
\r
201 /* I/O operation functions ****************************************************/
\r
202 HAL_StatusTypeDef HAL_IWDG_Start(IWDG_HandleTypeDef *hiwdg);
\r
203 HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg);
\r
208 /** @addtogroup IWDG_Exported_Functions_Group3
\r
211 /* Peripheral State functions ************************************************/
\r
212 HAL_IWDG_StateTypeDef HAL_IWDG_GetState(IWDG_HandleTypeDef *hiwdg);
\r
221 /* Private constants ---------------------------------------------------------*/
\r
222 /** @addtogroup IWDG_Private_Defines
\r
226 * @brief IWDG Key Register BitMask
\r
228 #define IWDG_KEY_RELOAD ((uint32_t)0x0000AAAA) /*!< IWDG Reload Counter Enable */
\r
229 #define IWDG_KEY_ENABLE ((uint32_t)0x0000CCCC) /*!< IWDG Peripheral Enable */
\r
230 #define IWDG_KEY_WRITE_ACCESS_ENABLE ((uint32_t)0x00005555) /*!< IWDG KR Write Access Enable */
\r
231 #define IWDG_KEY_WRITE_ACCESS_DISABLE ((uint32_t)0x00000000) /*!< IWDG KR Write Access Disable */
\r
234 * @brief IWDG Flag definition
\r
236 #define IWDG_FLAG_PVU ((uint32_t)IWDG_SR_PVU) /*!< Watchdog counter prescaler value update flag */
\r
237 #define IWDG_FLAG_RVU ((uint32_t)IWDG_SR_RVU) /*!< Watchdog counter reload value update flag */
\r
238 #define IWDG_FLAG_WVU ((uint32_t)IWDG_SR_WVU) /*!< Watchdog counter window value update flag */
\r
244 /* Private macros ------------------------------------------------------------*/
\r
245 /** @defgroup IWDG_Private_Macro IWDG Private Macros
\r
249 * @brief Enables write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers.
\r
250 * @param __HANDLE__: IWDG handle
\r
253 #define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE)
\r
256 * @brief Disables write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers.
\r
257 * @param __HANDLE__: IWDG handle
\r
260 #define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE)
\r
263 * @brief Check IWDG prescaler value.
\r
264 * @param __PRESCALER__: IWDG prescaler value
\r
267 #define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \
\r
268 ((__PRESCALER__) == IWDG_PRESCALER_8) || \
\r
269 ((__PRESCALER__) == IWDG_PRESCALER_16) || \
\r
270 ((__PRESCALER__) == IWDG_PRESCALER_32) || \
\r
271 ((__PRESCALER__) == IWDG_PRESCALER_64) || \
\r
272 ((__PRESCALER__) == IWDG_PRESCALER_128)|| \
\r
273 ((__PRESCALER__) == IWDG_PRESCALER_256))
\r
276 * @brief Check IWDG reload value.
\r
277 * @param __RELOAD__: IWDG reload value
\r
280 #define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= 0xFFF)
\r
283 * @brief Check IWDG window value.
\r
284 * @param __WINDOW__: IWDG window value
\r
287 #define IS_IWDG_WINDOW(__WINDOW__) ((__WINDOW__) <= 0xFFF)
\r
306 #endif /* __STM32F7xx_HAL_IWDG_H */
\r
308 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
\r