2 ******************************************************************************
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3 * @file stm32f7xx_hal_nor.h
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4 * @author MCD Application Team
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6 * @date 24-March-2015
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7 * @brief Header file of NOR HAL module.
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8 ******************************************************************************
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11 * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
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13 * Redistribution and use in source and binary forms, with or without modification,
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14 * are permitted provided that the following conditions are met:
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15 * 1. Redistributions of source code must retain the above copyright notice,
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16 * this list of conditions and the following disclaimer.
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17 * 2. Redistributions in binary form must reproduce the above copyright notice,
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18 * this list of conditions and the following disclaimer in the documentation
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19 * and/or other materials provided with the distribution.
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20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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21 * may be used to endorse or promote products derived from this software
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22 * without specific prior written permission.
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24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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35 ******************************************************************************
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38 /* Define to prevent recursive inclusion -------------------------------------*/
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39 #ifndef __STM32F7xx_HAL_NOR_H
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40 #define __STM32F7xx_HAL_NOR_H
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46 /* Includes ------------------------------------------------------------------*/
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47 #include "stm32f7xx_ll_fmc.h"
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50 /** @addtogroup STM32F7xx_HAL_Driver
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58 #if defined(STM32F756xx) || defined(STM32F746xx)
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59 /* Exported typedef ----------------------------------------------------------*/
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60 /** @defgroup NOR_Exported_Types NOR Exported Types
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65 * @brief HAL SRAM State structures definition
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69 HAL_NOR_STATE_RESET = 0x00, /*!< NOR not yet initialized or disabled */
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70 HAL_NOR_STATE_READY = 0x01, /*!< NOR initialized and ready for use */
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71 HAL_NOR_STATE_BUSY = 0x02, /*!< NOR internal processing is ongoing */
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72 HAL_NOR_STATE_ERROR = 0x03, /*!< NOR error state */
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73 HAL_NOR_STATE_PROTECTED = 0x04 /*!< NOR NORSRAM device write protected */
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74 }HAL_NOR_StateTypeDef;
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77 * @brief FMC NOR Status typedef
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81 HAL_NOR_STATUS_SUCCESS = 0,
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82 HAL_NOR_STATUS_ONGOING,
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83 HAL_NOR_STATUS_ERROR,
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84 HAL_NOR_STATUS_TIMEOUT
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85 }HAL_NOR_StatusTypeDef;
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88 * @brief FMC NOR ID typedef
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92 uint16_t Manufacturer_Code; /*!< Defines the device's manufacturer code used to identify the memory */
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94 uint16_t Device_Code1;
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96 uint16_t Device_Code2;
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98 uint16_t Device_Code3; /*!< Defines the device's codes used to identify the memory.
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99 These codes can be accessed by performing read operations with specific
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100 control signals and addresses set.They can also be accessed by issuing
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101 an Auto Select command */
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105 * @brief FMC NOR CFI typedef
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109 /*!< Defines the information stored in the memory's Common flash interface
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110 which contains a description of various electrical and timing parameters,
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111 density information and functions supported by the memory */
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123 * @brief NOR handle Structure definition
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127 FMC_NORSRAM_TypeDef *Instance; /*!< Register base address */
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129 FMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */
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131 FMC_NORSRAM_InitTypeDef Init; /*!< NOR device control configuration parameters */
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133 HAL_LockTypeDef Lock; /*!< NOR locking object */
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135 __IO HAL_NOR_StateTypeDef State; /*!< NOR device access state */
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137 }NOR_HandleTypeDef;
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142 /* Exported constants --------------------------------------------------------*/
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143 /* Exported macro ------------------------------------------------------------*/
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144 /** @defgroup NOR_Exported_Macros NOR Exported Macros
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147 /** @brief Reset NOR handle state
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148 * @param __HANDLE__: specifies the NOR handle.
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151 #define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NOR_STATE_RESET)
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156 /* Exported functions --------------------------------------------------------*/
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157 /** @addtogroup NOR_Exported_Functions NOR Exported Functions
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161 /** @addtogroup NOR_Exported_Functions_Group1 Initialization and de-initialization functions
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165 /* Initialization/de-initialization functions ********************************/
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166 HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming);
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167 HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor);
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168 void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor);
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169 void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor);
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170 void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout);
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175 /** @addtogroup NOR_Exported_Functions_Group2 Input and Output functions
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179 /* I/O operation functions ***************************************************/
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180 HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID);
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181 HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor);
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182 HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
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183 HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
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185 HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize);
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186 HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize);
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188 HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address);
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189 HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address);
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190 HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI);
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195 /** @addtogroup NOR_Exported_Functions_Group3 Peripheral Control functions
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199 /* NOR Control functions *****************************************************/
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200 HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor);
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201 HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor);
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206 /** @addtogroup NOR_Exported_Functions_Group4 Peripheral State functions
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210 /* NOR State functions ********************************************************/
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211 HAL_NOR_StateTypeDef HAL_NOR_GetState(NOR_HandleTypeDef *hnor);
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212 HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout);
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221 /* Private types -------------------------------------------------------------*/
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222 /* Private variables ---------------------------------------------------------*/
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223 /* Private constants ---------------------------------------------------------*/
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224 /** @defgroup NOR_Private_Constants NOR Private Constants
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227 /* NOR device IDs addresses */
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228 #define MC_ADDRESS ((uint16_t)0x0000)
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229 #define DEVICE_CODE1_ADDR ((uint16_t)0x0001)
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230 #define DEVICE_CODE2_ADDR ((uint16_t)0x000E)
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231 #define DEVICE_CODE3_ADDR ((uint16_t)0x000F)
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233 /* NOR CFI IDs addresses */
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234 #define CFI1_ADDRESS ((uint16_t)0x61)
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235 #define CFI2_ADDRESS ((uint16_t)0x62)
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236 #define CFI3_ADDRESS ((uint16_t)0x63)
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237 #define CFI4_ADDRESS ((uint16_t)0x64)
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239 /* NOR operation wait timeout */
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240 #define NOR_TMEOUT ((uint16_t)0xFFFF)
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242 /* NOR memory data width */
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243 #define NOR_MEMORY_8B ((uint8_t)0x0)
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244 #define NOR_MEMORY_16B ((uint8_t)0x1)
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246 /* NOR memory device read/write start address */
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247 #define NOR_MEMORY_ADRESS1 ((uint32_t)0x60000000)
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248 #define NOR_MEMORY_ADRESS2 ((uint32_t)0x64000000)
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249 #define NOR_MEMORY_ADRESS3 ((uint32_t)0x68000000)
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250 #define NOR_MEMORY_ADRESS4 ((uint32_t)0x6C000000)
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255 /* Private macros ------------------------------------------------------------*/
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256 /** @defgroup NOR_Private_Macros NOR Private Macros
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260 * @brief NOR memory address shifting.
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261 * @param __NOR_ADDRESS: NOR base address
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262 * @param __NOR_MEMORY_WIDTH_: NOR memory width
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263 * @param __ADDRESS__: NOR memory address
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264 * @retval NOR shifted address value
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266 #define NOR_ADDR_SHIFT(__NOR_ADDRESS, __NOR_MEMORY_WIDTH_, __ADDRESS__) \
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267 ((uint32_t)(((__NOR_MEMORY_WIDTH_) == NOR_MEMORY_8B)? \
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268 ((uint32_t)((__NOR_ADDRESS) + (2 * (__ADDRESS__)))): \
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269 ((uint32_t)((__NOR_ADDRESS) + (__ADDRESS__)))))
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272 * @brief NOR memory write data to specified address.
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273 * @param __ADDRESS__: NOR memory address
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274 * @param __DATA__: Data to write
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277 #define NOR_WRITE(__ADDRESS__, __DATA__) do{ \
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278 (*(__IO uint16_t *)((uint32_t)(__ADDRESS__)) = (__DATA__)); \
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285 #endif /* STM32F756xx || STM32F746xx */
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298 #endif /* __STM32F7xx_HAL_NOR_H */
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300 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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