2 ******************************************************************************
\r
3 * @file stm32f7xx_hal_adc.c
\r
4 * @author MCD Application Team
\r
6 * @date 24-March-2015
\r
7 * @brief This file provides firmware functions to manage the following
\r
8 * functionalities of the Analog to Digital Convertor (ADC) peripheral:
\r
9 * + Initialization and de-initialization functions
\r
10 * + IO operation functions
\r
11 * + State and errors functions
\r
14 ==============================================================================
\r
15 ##### ADC Peripheral features #####
\r
16 ==============================================================================
\r
18 (#) 12-bit, 10-bit, 8-bit or 6-bit configurable resolution.
\r
19 (#) Interrupt generation at the end of conversion, end of injected conversion,
\r
20 and in case of analog watchdog or overrun events
\r
21 (#) Single and continuous conversion modes.
\r
22 (#) Scan mode for automatic conversion of channel 0 to channel x.
\r
23 (#) Data alignment with in-built data coherency.
\r
24 (#) Channel-wise programmable sampling time.
\r
25 (#) External trigger option with configurable polarity for both regular and
\r
26 injected conversion.
\r
27 (#) Dual/Triple mode (on devices with 2 ADCs or more).
\r
28 (#) Configurable DMA data storage in Dual/Triple ADC mode.
\r
29 (#) Configurable delay between conversions in Dual/Triple interleaved mode.
\r
30 (#) ADC conversion type (refer to the datasheets).
\r
31 (#) ADC supply requirements: 2.4 V to 3.6 V at full speed and down to 1.8 V at
\r
33 (#) ADC input range: VREF(minus) = VIN = VREF(plus).
\r
34 (#) DMA request generation during regular channel conversion.
\r
37 ##### How to use this driver #####
\r
38 ==============================================================================
\r
40 (#)Initialize the ADC low level resources by implementing the HAL_ADC_MspInit():
\r
41 (##) Enable the ADC interface clock using __HAL_RCC_ADC_CLK_ENABLE()
\r
42 (##) ADC pins configuration
\r
43 (+++) Enable the clock for the ADC GPIOs using the following function:
\r
44 __HAL_RCC_GPIOx_CLK_ENABLE()
\r
45 (+++) Configure these ADC pins in analog mode using HAL_GPIO_Init()
\r
46 (##) In case of using interrupts (e.g. HAL_ADC_Start_IT())
\r
47 (+++) Configure the ADC interrupt priority using HAL_NVIC_SetPriority()
\r
48 (+++) Enable the ADC IRQ handler using HAL_NVIC_EnableIRQ()
\r
49 (+++) In ADC IRQ handler, call HAL_ADC_IRQHandler()
\r
50 (##) In case of using DMA to control data transfer (e.g. HAL_ADC_Start_DMA())
\r
51 (+++) Enable the DMAx interface clock using __HAL_RCC_DMAx_CLK_ENABLE()
\r
52 (+++) Configure and enable two DMA streams stream for managing data
\r
53 transfer from peripheral to memory (output stream)
\r
54 (+++) Associate the initialized DMA handle to the CRYP DMA handle
\r
55 using __HAL_LINKDMA()
\r
56 (+++) Configure the priority and enable the NVIC for the transfer complete
\r
57 interrupt on the two DMA Streams. The output stream should have higher
\r
58 priority than the input stream.
\r
60 *** Configuration of ADC, groups regular/injected, channels parameters ***
\r
61 ==============================================================================
\r
63 (#) Configure the ADC parameters (resolution, data alignment, ...)
\r
64 and regular group parameters (conversion trigger, sequencer, ...)
\r
65 using function HAL_ADC_Init().
\r
67 (#) Configure the channels for regular group parameters (channel number,
\r
68 channel rank into sequencer, ..., into regular group)
\r
69 using function HAL_ADC_ConfigChannel().
\r
71 (#) Optionally, configure the injected group parameters (conversion trigger,
\r
72 sequencer, ..., of injected group)
\r
73 and the channels for injected group parameters (channel number,
\r
74 channel rank into sequencer, ..., into injected group)
\r
75 using function HAL_ADCEx_InjectedConfigChannel().
\r
77 (#) Optionally, configure the analog watchdog parameters (channels
\r
78 monitored, thresholds, ...) using function HAL_ADC_AnalogWDGConfig().
\r
80 (#) Optionally, for devices with several ADC instances: configure the
\r
81 multimode parameters using function HAL_ADCEx_MultiModeConfigChannel().
\r
83 *** Execution of ADC conversions ***
\r
84 ==============================================================================
\r
86 (#) ADC driver can be used among three modes: polling, interruption,
\r
89 *** Polling mode IO operation ***
\r
90 =================================
\r
92 (+) Start the ADC peripheral using HAL_ADC_Start()
\r
93 (+) Wait for end of conversion using HAL_ADC_PollForConversion(), at this stage
\r
94 user can specify the value of timeout according to his end application
\r
95 (+) To read the ADC converted values, use the HAL_ADC_GetValue() function.
\r
96 (+) Stop the ADC peripheral using HAL_ADC_Stop()
\r
98 *** Interrupt mode IO operation ***
\r
99 ===================================
\r
101 (+) Start the ADC peripheral using HAL_ADC_Start_IT()
\r
102 (+) Use HAL_ADC_IRQHandler() called under ADC_IRQHandler() Interrupt subroutine
\r
103 (+) At ADC end of conversion HAL_ADC_ConvCpltCallback() function is executed and user can
\r
104 add his own code by customization of function pointer HAL_ADC_ConvCpltCallback
\r
105 (+) In case of ADC Error, HAL_ADC_ErrorCallback() function is executed and user can
\r
106 add his own code by customization of function pointer HAL_ADC_ErrorCallback
\r
107 (+) Stop the ADC peripheral using HAL_ADC_Stop_IT()
\r
109 *** DMA mode IO operation ***
\r
110 ==============================
\r
112 (+) Start the ADC peripheral using HAL_ADC_Start_DMA(), at this stage the user specify the length
\r
113 of data to be transferred at each end of conversion
\r
114 (+) At The end of data transfer by HAL_ADC_ConvCpltCallback() function is executed and user can
\r
115 add his own code by customization of function pointer HAL_ADC_ConvCpltCallback
\r
116 (+) In case of transfer Error, HAL_ADC_ErrorCallback() function is executed and user can
\r
117 add his own code by customization of function pointer HAL_ADC_ErrorCallback
\r
118 (+) Stop the ADC peripheral using HAL_ADC_Stop_DMA()
\r
120 *** ADC HAL driver macros list ***
\r
121 =============================================
\r
123 Below the list of most used macros in ADC HAL driver.
\r
125 (+) __HAL_ADC_ENABLE : Enable the ADC peripheral
\r
126 (+) __HAL_ADC_DISABLE : Disable the ADC peripheral
\r
127 (+) __HAL_ADC_ENABLE_IT: Enable the ADC end of conversion interrupt
\r
128 (+) __HAL_ADC_DISABLE_IT: Disable the ADC end of conversion interrupt
\r
129 (+) __HAL_ADC_GET_IT_SOURCE: Check if the specified ADC interrupt source is enabled or disabled
\r
130 (+) __HAL_ADC_CLEAR_FLAG: Clear the ADC's pending flags
\r
131 (+) __HAL_ADC_GET_FLAG: Get the selected ADC's flag status
\r
132 (+) ADC_GET_RESOLUTION: Return resolution bits in CR1 register
\r
135 (@) You can refer to the ADC HAL driver header file for more useful macros
\r
137 *** Deinitialization of ADC ***
\r
138 ==============================================================================
\r
140 (#) Disable the ADC interface
\r
141 (++) ADC clock can be hard reset and disabled at RCC top level.
\r
142 (++) Hard reset of ADC peripherals
\r
143 using macro __HAL_RCC_ADC_FORCE_RESET(), __HAL_RCC_ADC_RELEASE_RESET().
\r
144 (++) ADC clock disable using the equivalent macro/functions as configuration step.
\r
146 Into HAL_ADC_MspDeInit() (recommended code location) or with
\r
147 other device clock parameters configuration:
\r
148 (+++) HAL_RCC_GetOscConfig(&RCC_OscInitStructure);
\r
149 (+++) RCC_OscInitStructure.OscillatorType = RCC_OSCILLATORTYPE_HSI;
\r
150 (+++) RCC_OscInitStructure.HSIState = RCC_HSI_OFF; (if not used for system clock)
\r
151 (+++) HAL_RCC_OscConfig(&RCC_OscInitStructure);
\r
153 (#) ADC pins configuration
\r
154 (++) Disable the clock for the ADC GPIOs using macro __HAL_RCC_GPIOx_CLK_DISABLE()
\r
156 (#) Optionally, in case of usage of ADC with interruptions:
\r
157 (++) Disable the NVIC for ADC using function HAL_NVIC_DisableIRQ(ADCx_IRQn)
\r
159 (#) Optionally, in case of usage of DMA:
\r
160 (++) Deinitialize the DMA using function HAL_DMA_DeInit().
\r
161 (++) Disable the NVIC for DMA using function HAL_NVIC_DisableIRQ(DMAx_Channelx_IRQn)
\r
164 ******************************************************************************
\r
167 * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
\r
169 * Redistribution and use in source and binary forms, with or without modification,
\r
170 * are permitted provided that the following conditions are met:
\r
171 * 1. Redistributions of source code must retain the above copyright notice,
\r
172 * this list of conditions and the following disclaimer.
\r
173 * 2. Redistributions in binary form must reproduce the above copyright notice,
\r
174 * this list of conditions and the following disclaimer in the documentation
\r
175 * and/or other materials provided with the distribution.
\r
176 * 3. Neither the name of STMicroelectronics nor the names of its contributors
\r
177 * may be used to endorse or promote products derived from this software
\r
178 * without specific prior written permission.
\r
180 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
\r
181 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
\r
182 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
\r
183 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
\r
184 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
\r
185 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
\r
186 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
\r
187 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
\r
188 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
\r
189 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
\r
191 ******************************************************************************
\r
194 /* Includes ------------------------------------------------------------------*/
\r
195 #include "stm32f7xx_hal.h"
\r
197 /** @addtogroup STM32F7xx_HAL_Driver
\r
201 /** @defgroup ADC ADC
\r
202 * @brief ADC driver modules
\r
206 #ifdef HAL_ADC_MODULE_ENABLED
\r
208 /* Private typedef -----------------------------------------------------------*/
\r
209 /* Private define ------------------------------------------------------------*/
\r
210 /* Private macro -------------------------------------------------------------*/
\r
211 /* Private variables ---------------------------------------------------------*/
\r
212 /** @addtogroup ADC_Private_Functions
\r
215 /* Private function prototypes -----------------------------------------------*/
\r
216 static void ADC_Init(ADC_HandleTypeDef* hadc);
\r
217 static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma);
\r
218 static void ADC_DMAError(DMA_HandleTypeDef *hdma);
\r
219 static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma);
\r
224 /* Exported functions --------------------------------------------------------*/
\r
225 /** @defgroup ADC_Exported_Functions ADC Exported Functions
\r
229 /** @defgroup ADC_Exported_Functions_Group1 Initialization and de-initialization functions
\r
230 * @brief Initialization and Configuration functions
\r
233 ===============================================================================
\r
234 ##### Initialization and de-initialization functions #####
\r
235 ===============================================================================
\r
236 [..] This section provides functions allowing to:
\r
237 (+) Initialize and configure the ADC.
\r
238 (+) De-initialize the ADC.
\r
245 * @brief Initializes the ADCx peripheral according to the specified parameters
\r
246 * in the ADC_InitStruct and initializes the ADC MSP.
\r
248 * @note This function is used to configure the global features of the ADC (
\r
249 * ClockPrescaler, Resolution, Data Alignment and number of conversion), however,
\r
250 * the rest of the configuration parameters are specific to the regular
\r
251 * channels group (scan mode activation, continuous mode activation,
\r
252 * External trigger source and edge, DMA continuous request after the
\r
253 * last transfer and End of conversion selection).
\r
255 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
\r
256 * the configuration information for the specified ADC.
\r
257 * @retval HAL status
\r
259 HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
\r
261 /* Check ADC handle */
\r
267 /* Check the parameters */
\r
268 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
\r
269 assert_param(IS_ADC_CLOCKPRESCALER(hadc->Init.ClockPrescaler));
\r
270 assert_param(IS_ADC_RESOLUTION(hadc->Init.Resolution));
\r
271 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ScanConvMode));
\r
272 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
\r
273 assert_param(IS_ADC_EXT_TRIG(hadc->Init.ExternalTrigConv));
\r
274 assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign));
\r
275 assert_param(IS_ADC_REGULAR_LENGTH(hadc->Init.NbrOfConversion));
\r
276 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests));
\r
277 assert_param(IS_ADC_EOCSelection(hadc->Init.EOCSelection));
\r
278 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DiscontinuousConvMode));
\r
280 if(hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START)
\r
282 assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
\r
285 if(hadc->State == HAL_ADC_STATE_RESET)
\r
287 /* Init the low level hardware */
\r
288 HAL_ADC_MspInit(hadc);
\r
291 /* Initialize the ADC state */
\r
292 hadc->State = HAL_ADC_STATE_BUSY;
\r
294 /* Set ADC parameters */
\r
297 /* Set ADC error code to none */
\r
298 hadc->ErrorCode = HAL_ADC_ERROR_NONE;
\r
300 /* Initialize the ADC state */
\r
301 hadc->State = HAL_ADC_STATE_READY;
\r
304 __HAL_UNLOCK(hadc);
\r
306 /* Return function status */
\r
311 * @brief Deinitializes the ADCx peripheral registers to their default reset values.
\r
312 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
\r
313 * the configuration information for the specified ADC.
\r
314 * @retval HAL status
\r
316 HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc)
\r
318 /* Check ADC handle */
\r
324 /* Check the parameters */
\r
325 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
\r
327 /* Change ADC state */
\r
328 hadc->State = HAL_ADC_STATE_BUSY;
\r
330 /* DeInit the low level hardware */
\r
331 HAL_ADC_MspDeInit(hadc);
\r
333 /* Set ADC error code to none */
\r
334 hadc->ErrorCode = HAL_ADC_ERROR_NONE;
\r
336 /* Change ADC state */
\r
337 hadc->State = HAL_ADC_STATE_RESET;
\r
339 /* Return function status */
\r
344 * @brief Initializes the ADC MSP.
\r
345 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
\r
346 * the configuration information for the specified ADC.
\r
349 __weak void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
\r
351 /* NOTE : This function Should not be modified, when the callback is needed,
\r
352 the HAL_ADC_MspInit could be implemented in the user file
\r
357 * @brief DeInitializes the ADC MSP.
\r
358 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
\r
359 * the configuration information for the specified ADC.
\r
362 __weak void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
\r
364 /* NOTE : This function Should not be modified, when the callback is needed,
\r
365 the HAL_ADC_MspDeInit could be implemented in the user file
\r
373 /** @defgroup ADC_Exported_Functions_Group2 IO operation functions
\r
374 * @brief IO operation functions
\r
377 ===============================================================================
\r
378 ##### IO operation functions #####
\r
379 ===============================================================================
\r
380 [..] This section provides functions allowing to:
\r
381 (+) Start conversion of regular channel.
\r
382 (+) Stop conversion of regular channel.
\r
383 (+) Start conversion of regular channel and enable interrupt.
\r
384 (+) Stop conversion of regular channel and disable interrupt.
\r
385 (+) Start conversion of regular channel and enable DMA transfer.
\r
386 (+) Stop conversion of regular channel and disable DMA transfer.
\r
387 (+) Handle ADC interrupt request.
\r
394 * @brief Enables ADC and starts conversion of the regular channels.
\r
395 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
\r
396 * the configuration information for the specified ADC.
\r
397 * @retval HAL status
\r
399 HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc)
\r
401 __IO uint32_t counter = 0;
\r
403 /* Check the parameters */
\r
404 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
\r
405 assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
\r
407 /* Process locked */
\r
410 /* Check if an injected conversion is ongoing */
\r
411 if(hadc->State == HAL_ADC_STATE_BUSY_INJ)
\r
413 /* Change ADC state */
\r
414 hadc->State = HAL_ADC_STATE_BUSY_INJ_REG;
\r
418 /* Change ADC state */
\r
419 hadc->State = HAL_ADC_STATE_BUSY_REG;
\r
422 /* Check if ADC peripheral is disabled in order to enable it and wait during
\r
423 Tstab time the ADC's stabilization */
\r
424 if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
\r
426 /* Enable the Peripheral */
\r
427 __HAL_ADC_ENABLE(hadc);
\r
429 /* Delay for ADC stabilization time */
\r
430 /* Compute number of CPU cycles to wait for */
\r
431 counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000));
\r
432 while(counter != 0)
\r
438 /* Process unlocked */
\r
439 __HAL_UNLOCK(hadc);
\r
441 /* Check if Multimode enabled */
\r
442 if(HAL_IS_BIT_CLR(ADC->CCR, ADC_CCR_MULTI))
\r
444 /* if no external trigger present enable software conversion of regular channels */
\r
445 if((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET)
\r
447 /* Enable the selected ADC software conversion for regular group */
\r
448 hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART;
\r
453 /* if instance of handle correspond to ADC1 and no external trigger present enable software conversion of regular channels */
\r
454 if((hadc->Instance == ADC1) && ((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET))
\r
456 /* Enable the selected ADC software conversion for regular group */
\r
457 hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART;
\r
461 /* Return function status */
\r
466 * @brief Disables ADC and stop conversion of regular channels.
\r
468 * @note Caution: This function will stop also injected channels.
\r
470 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
\r
471 * the configuration information for the specified ADC.
\r
473 * @retval HAL status.
\r
475 HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc)
\r
477 /* Disable the Peripheral */
\r
478 __HAL_ADC_DISABLE(hadc);
\r
480 /* Change ADC state */
\r
481 hadc->State = HAL_ADC_STATE_READY;
\r
483 /* Return function status */
\r
488 * @brief Poll for regular conversion complete
\r
489 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
\r
490 * the configuration information for the specified ADC.
\r
491 * @param Timeout: Timeout value in millisecond.
\r
492 * @retval HAL status
\r
494 HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
\r
496 uint32_t tickstart = 0;
\r
498 /* Verification that ADC configuration is compliant with polling for */
\r
499 /* each conversion: */
\r
500 /* Particular case is ADC configured in DMA mode and ADC sequencer with */
\r
501 /* several ranks and polling for end of each conversion. */
\r
502 /* For code simplicity sake, this particular case is generalized to */
\r
503 /* ADC configured in DMA mode and polling for end of each conversion. */
\r
504 if (HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_EOCS) &&
\r
505 HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_DMA) )
\r
507 /* Update ADC state machine to error */
\r
508 hadc->State = HAL_ADC_STATE_ERROR;
\r
510 /* Process unlocked */
\r
511 __HAL_UNLOCK(hadc);
\r
517 tickstart = HAL_GetTick();
\r
519 /* Check End of conversion flag */
\r
520 while(!(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC)))
\r
522 /* Check for the Timeout */
\r
523 if(Timeout != HAL_MAX_DELAY)
\r
525 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
\r
527 hadc->State= HAL_ADC_STATE_TIMEOUT;
\r
528 /* Process unlocked */
\r
529 __HAL_UNLOCK(hadc);
\r
530 return HAL_TIMEOUT;
\r
535 /* Check if an injected conversion is ready */
\r
536 if(hadc->State == HAL_ADC_STATE_EOC_INJ)
\r
538 /* Change ADC state */
\r
539 hadc->State = HAL_ADC_STATE_EOC_INJ_REG;
\r
543 /* Change ADC state */
\r
544 hadc->State = HAL_ADC_STATE_EOC_REG;
\r
547 /* Return ADC state */
\r
552 * @brief Poll for conversion event
\r
553 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
\r
554 * the configuration information for the specified ADC.
\r
555 * @param EventType: the ADC event type.
\r
556 * This parameter can be one of the following values:
\r
557 * @arg ADC_AWD_EVENT: ADC Analog watch Dog event.
\r
558 * @arg ADC_OVR_EVENT: ADC Overrun event.
\r
559 * @param Timeout: Timeout value in millisecond.
\r
560 * @retval HAL status
\r
562 HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout)
\r
564 uint32_t tickstart = 0;
\r
566 /* Check the parameters */
\r
567 assert_param(IS_ADC_EVENT_TYPE(EventType));
\r
570 tickstart = HAL_GetTick();
\r
572 /* Check selected event flag */
\r
573 while(!(__HAL_ADC_GET_FLAG(hadc,EventType)))
\r
575 /* Check for the Timeout */
\r
576 if(Timeout != HAL_MAX_DELAY)
\r
578 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
\r
580 hadc->State= HAL_ADC_STATE_TIMEOUT;
\r
581 /* Process unlocked */
\r
582 __HAL_UNLOCK(hadc);
\r
583 return HAL_TIMEOUT;
\r
588 /* Check analog watchdog flag */
\r
589 if(EventType == ADC_AWD_EVENT)
\r
591 /* Change ADC state */
\r
592 hadc->State = HAL_ADC_STATE_AWD;
\r
594 /* Clear the ADCx's analog watchdog flag */
\r
595 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD);
\r
599 /* Change ADC state */
\r
600 hadc->State = HAL_ADC_STATE_ERROR;
\r
602 /* Clear the ADCx's Overrun flag */
\r
603 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
\r
606 /* Return ADC state */
\r
612 * @brief Enables the interrupt and starts ADC conversion of regular channels.
\r
613 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
\r
614 * the configuration information for the specified ADC.
\r
615 * @retval HAL status.
\r
617 HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc)
\r
619 __IO uint32_t counter = 0;
\r
621 /* Check the parameters */
\r
622 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
\r
623 assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
\r
625 /* Process locked */
\r
628 /* Check if an injected conversion is ongoing */
\r
629 if(hadc->State == HAL_ADC_STATE_BUSY_INJ)
\r
631 /* Change ADC state */
\r
632 hadc->State = HAL_ADC_STATE_BUSY_INJ_REG;
\r
636 /* Change ADC state */
\r
637 hadc->State = HAL_ADC_STATE_BUSY_REG;
\r
640 /* Set ADC error code to none */
\r
641 hadc->ErrorCode = HAL_ADC_ERROR_NONE;
\r
643 /* Check if ADC peripheral is disabled in order to enable it and wait during
\r
644 Tstab time the ADC's stabilization */
\r
645 if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
\r
647 /* Enable the Peripheral */
\r
648 __HAL_ADC_ENABLE(hadc);
\r
650 /* Delay for ADC stabilization time */
\r
651 /* Compute number of CPU cycles to wait for */
\r
652 counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000));
\r
653 while(counter != 0)
\r
659 /* Enable the ADC overrun interrupt */
\r
660 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
\r
662 /* Enable the ADC end of conversion interrupt for regular group */
\r
663 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_EOC);
\r
665 /* Process unlocked */
\r
666 __HAL_UNLOCK(hadc);
\r
668 /* Check if Multimode enabled */
\r
669 if(HAL_IS_BIT_CLR(ADC->CCR, ADC_CCR_MULTI))
\r
671 /* if no external trigger present enable software conversion of regular channels */
\r
672 if((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET)
\r
674 /* Enable the selected ADC software conversion for regular group */
\r
675 hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART;
\r
680 /* if instance of handle correspond to ADC1 and no external trigger present enable software conversion of regular channels */
\r
681 if((hadc->Instance == (ADC_TypeDef*)0x40012000) && ((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET))
\r
683 /* Enable the selected ADC software conversion for regular group */
\r
684 hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART;
\r
688 /* Return function status */
\r
693 * @brief Disables the interrupt and stop ADC conversion of regular channels.
\r
695 * @note Caution: This function will stop also injected channels.
\r
697 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
\r
698 * the configuration information for the specified ADC.
\r
699 * @retval HAL status.
\r
701 HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc)
\r
703 /* Disable the ADC end of conversion interrupt for regular group */
\r
704 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
\r
706 /* Disable the ADC end of conversion interrupt for injected group */
\r
707 __HAL_ADC_DISABLE_IT(hadc, ADC_CR1_JEOCIE);
\r
709 /* Enable the Peripheral */
\r
710 __HAL_ADC_DISABLE(hadc);
\r
712 /* Change ADC state */
\r
713 hadc->State = HAL_ADC_STATE_READY;
\r
715 /* Return function status */
\r
720 * @brief Handles ADC interrupt request
\r
721 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
\r
722 * the configuration information for the specified ADC.
\r
725 void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc)
\r
727 uint32_t tmp1 = 0, tmp2 = 0;
\r
729 /* Check the parameters */
\r
730 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
\r
731 assert_param(IS_ADC_REGULAR_LENGTH(hadc->Init.NbrOfConversion));
\r
732 assert_param(IS_ADC_EOCSelection(hadc->Init.EOCSelection));
\r
734 tmp1 = __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC);
\r
735 tmp2 = __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOC);
\r
736 /* Check End of conversion flag for regular channels */
\r
739 /* Check if an injected conversion is ready */
\r
740 if(hadc->State == HAL_ADC_STATE_EOC_INJ)
\r
742 /* Change ADC state */
\r
743 hadc->State = HAL_ADC_STATE_EOC_INJ_REG;
\r
747 /* Change ADC state */
\r
748 hadc->State = HAL_ADC_STATE_EOC_REG;
\r
751 if((hadc->Init.ContinuousConvMode == DISABLE) && ((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET))
\r
753 if(hadc->Init.EOCSelection == ADC_EOC_SEQ_CONV)
\r
755 /* DISABLE the ADC end of conversion interrupt for regular group */
\r
756 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
\r
758 /* DISABLE the ADC overrun interrupt */
\r
759 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
\r
763 if (hadc->NbrOfCurrentConversionRank == 0)
\r
765 hadc->NbrOfCurrentConversionRank = hadc->Init.NbrOfConversion;
\r
768 /* Decrement the number of conversion when an interrupt occurs */
\r
769 hadc->NbrOfCurrentConversionRank--;
\r
771 /* Check if all conversions are finished */
\r
772 if(hadc->NbrOfCurrentConversionRank == 0)
\r
774 /* DISABLE the ADC end of conversion interrupt for regular group */
\r
775 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
\r
777 /* DISABLE the ADC overrun interrupt */
\r
778 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
\r
783 /* Conversion complete callback */
\r
784 HAL_ADC_ConvCpltCallback(hadc);
\r
786 /* Clear the ADCx flag for regular end of conversion */
\r
787 __HAL_ADC_CLEAR_FLAG(hadc,ADC_FLAG_EOC);
\r
790 tmp1 = __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOC);
\r
791 tmp2 = __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_JEOC);
\r
792 /* Check End of conversion flag for injected channels */
\r
795 /* Check if a regular conversion is ready */
\r
796 if(hadc->State == HAL_ADC_STATE_EOC_REG)
\r
798 /* Change ADC state */
\r
799 hadc->State = HAL_ADC_STATE_EOC_INJ_REG;
\r
803 /* Change ADC state */
\r
804 hadc->State = HAL_ADC_STATE_EOC_INJ;
\r
807 tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO);
\r
808 tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN);
\r
809 if(((hadc->Init.ContinuousConvMode == DISABLE) || tmp1) && tmp2)
\r
811 /* DISABLE the ADC end of conversion interrupt for injected group */
\r
812 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC);
\r
815 /* Conversion complete callback */
\r
816 HAL_ADCEx_InjectedConvCpltCallback(hadc);
\r
818 /* Clear the ADCx flag for injected end of conversion */
\r
819 __HAL_ADC_CLEAR_FLAG(hadc,ADC_FLAG_JEOC);
\r
822 tmp1 = __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD);
\r
823 tmp2 = __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_AWD);
\r
824 /* Check Analog watchdog flag */
\r
827 /* Change ADC state */
\r
828 hadc->State = HAL_ADC_STATE_AWD;
\r
830 /* Clear the ADCx's Analog watchdog flag */
\r
831 __HAL_ADC_CLEAR_FLAG(hadc,ADC_FLAG_AWD);
\r
833 /* Level out of window callback */
\r
834 HAL_ADC_LevelOutOfWindowCallback(hadc);
\r
837 tmp1 = __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_OVR);
\r
838 tmp2 = __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_OVR);
\r
839 /* Check Overrun flag */
\r
842 /* Change ADC state to overrun state */
\r
843 hadc->State = HAL_ADC_STATE_ERROR;
\r
845 /* Set ADC error code to overrun */
\r
846 hadc->ErrorCode |= HAL_ADC_ERROR_OVR;
\r
848 /* Clear the Overrun flag */
\r
849 __HAL_ADC_CLEAR_FLAG(hadc,ADC_FLAG_OVR);
\r
851 /* Error callback */
\r
852 HAL_ADC_ErrorCallback(hadc);
\r
857 * @brief Enables ADC DMA request after last transfer (Single-ADC mode) and enables ADC peripheral
\r
858 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
\r
859 * the configuration information for the specified ADC.
\r
860 * @param pData: The destination Buffer address.
\r
861 * @param Length: The length of data to be transferred from ADC peripheral to memory.
\r
862 * @retval HAL status
\r
864 HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
\r
866 __IO uint32_t counter = 0;
\r
868 /* Check the parameters */
\r
869 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
\r
870 assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
\r
872 /* Process locked */
\r
875 /* Enable ADC overrun interrupt */
\r
876 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
\r
878 /* Enable ADC DMA mode */
\r
879 hadc->Instance->CR2 |= ADC_CR2_DMA;
\r
881 /* Set the DMA transfer complete callback */
\r
882 hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
\r
884 /* Set the DMA half transfer complete callback */
\r
885 hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
\r
887 /* Set the DMA error callback */
\r
888 hadc->DMA_Handle->XferErrorCallback = ADC_DMAError ;
\r
890 /* Enable the DMA Stream */
\r
891 HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
\r
893 /* Change ADC state */
\r
894 hadc->State = HAL_ADC_STATE_BUSY_REG;
\r
896 /* Process unlocked */
\r
897 __HAL_UNLOCK(hadc);
\r
899 /* Check if ADC peripheral is disabled in order to enable it and wait during
\r
900 Tstab time the ADC's stabilization */
\r
901 if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
\r
903 /* Enable the Peripheral */
\r
904 __HAL_ADC_ENABLE(hadc);
\r
906 /* Delay for ADC stabilization time */
\r
907 /* Compute number of CPU cycles to wait for */
\r
908 counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000));
\r
909 while(counter != 0)
\r
915 /* if no external trigger present enable software conversion of regular channels */
\r
916 if((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET)
\r
918 /* Enable the selected ADC software conversion for regular group */
\r
919 hadc->Instance->CR2 |= ADC_CR2_SWSTART;
\r
922 /* Return function status */
\r
927 * @brief Disables ADC DMA (Single-ADC mode) and disables ADC peripheral
\r
928 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
\r
929 * the configuration information for the specified ADC.
\r
930 * @retval HAL status
\r
932 HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc)
\r
934 /* Disable the Peripheral */
\r
935 __HAL_ADC_DISABLE(hadc);
\r
937 /* Disable ADC overrun interrupt */
\r
938 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
\r
940 /* Disable the selected ADC DMA mode */
\r
941 hadc->Instance->CR2 &= ~ADC_CR2_DMA;
\r
943 /* Disable the ADC DMA Stream */
\r
944 HAL_DMA_Abort(hadc->DMA_Handle);
\r
946 /* Change ADC state */
\r
947 hadc->State = HAL_ADC_STATE_READY;
\r
949 /* Return function status */
\r
954 * @brief Gets the converted value from data register of regular channel.
\r
955 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
\r
956 * the configuration information for the specified ADC.
\r
957 * @retval Converted value
\r
959 uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc)
\r
961 /* Return the selected ADC converted value */
\r
962 return hadc->Instance->DR;
\r
966 * @brief Regular conversion complete callback in non blocking mode
\r
967 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
\r
968 * the configuration information for the specified ADC.
\r
971 __weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
\r
973 /* NOTE : This function Should not be modified, when the callback is needed,
\r
974 the HAL_ADC_ConvCpltCallback could be implemented in the user file
\r
979 * @brief Regular conversion half DMA transfer callback in non blocking mode
\r
980 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
\r
981 * the configuration information for the specified ADC.
\r
984 __weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc)
\r
986 /* NOTE : This function Should not be modified, when the callback is needed,
\r
987 the HAL_ADC_ConvHalfCpltCallback could be implemented in the user file
\r
992 * @brief Analog watchdog callback in non blocking mode
\r
993 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
\r
994 * the configuration information for the specified ADC.
\r
997 __weak void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc)
\r
999 /* NOTE : This function Should not be modified, when the callback is needed,
\r
1000 the HAL_ADC_LevelOoutOfWindowCallback could be implemented in the user file
\r
1005 * @brief Error ADC callback.
\r
1006 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
\r
1007 * the configuration information for the specified ADC.
\r
1010 __weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc)
\r
1012 /* NOTE : This function Should not be modified, when the callback is needed,
\r
1013 the HAL_ADC_ErrorCallback could be implemented in the user file
\r
1021 /** @defgroup ADC_Exported_Functions_Group3 Peripheral Control functions
\r
1022 * @brief Peripheral Control functions
\r
1025 ===============================================================================
\r
1026 ##### Peripheral Control functions #####
\r
1027 ===============================================================================
\r
1028 [..] This section provides functions allowing to:
\r
1029 (+) Configure regular channels.
\r
1030 (+) Configure injected channels.
\r
1031 (+) Configure multimode.
\r
1032 (+) Configure the analog watch dog.
\r
1039 * @brief Configures for the selected ADC regular channel its corresponding
\r
1040 * rank in the sequencer and its sample time.
\r
1041 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
\r
1042 * the configuration information for the specified ADC.
\r
1043 * @param sConfig: ADC configuration structure.
\r
1044 * @retval HAL status
\r
1046 HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
\r
1048 __IO uint32_t counter = 0;
\r
1050 /* Check the parameters */
\r
1051 assert_param(IS_ADC_CHANNEL(sConfig->Channel));
\r
1052 assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank));
\r
1053 assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime));
\r
1055 /* Process locked */
\r
1058 /* if ADC_Channel_10 ... ADC_Channel_18 is selected */
\r
1059 if (sConfig->Channel > ADC_CHANNEL_9)
\r
1061 /* Clear the old sample time */
\r
1062 hadc->Instance->SMPR1 &= ~ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel);
\r
1064 /* Set the new sample time */
\r
1065 hadc->Instance->SMPR1 |= ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel);
\r
1067 else /* ADC_Channel include in ADC_Channel_[0..9] */
\r
1069 /* Clear the old sample time */
\r
1070 hadc->Instance->SMPR2 &= ~ADC_SMPR2(ADC_SMPR2_SMP0, sConfig->Channel);
\r
1072 /* Set the new sample time */
\r
1073 hadc->Instance->SMPR2 |= ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel);
\r
1076 /* For Rank 1 to 6 */
\r
1077 if (sConfig->Rank < 7)
\r
1079 /* Clear the old SQx bits for the selected rank */
\r
1080 hadc->Instance->SQR3 &= ~ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank);
\r
1082 /* Set the SQx bits for the selected rank */
\r
1083 hadc->Instance->SQR3 |= ADC_SQR3_RK(sConfig->Channel, sConfig->Rank);
\r
1085 /* For Rank 7 to 12 */
\r
1086 else if (sConfig->Rank < 13)
\r
1088 /* Clear the old SQx bits for the selected rank */
\r
1089 hadc->Instance->SQR2 &= ~ADC_SQR2_RK(ADC_SQR2_SQ7, sConfig->Rank);
\r
1091 /* Set the SQx bits for the selected rank */
\r
1092 hadc->Instance->SQR2 |= ADC_SQR2_RK(sConfig->Channel, sConfig->Rank);
\r
1094 /* For Rank 13 to 16 */
\r
1097 /* Clear the old SQx bits for the selected rank */
\r
1098 hadc->Instance->SQR1 &= ~ADC_SQR1_RK(ADC_SQR1_SQ13, sConfig->Rank);
\r
1100 /* Set the SQx bits for the selected rank */
\r
1101 hadc->Instance->SQR1 |= ADC_SQR1_RK(sConfig->Channel, sConfig->Rank);
\r
1104 /* if ADC1 Channel_18 is selected enable VBAT Channel */
\r
1105 if ((hadc->Instance == ADC1) && (sConfig->Channel == ADC_CHANNEL_VBAT))
\r
1107 /* Enable the VBAT channel*/
\r
1108 ADC->CCR |= ADC_CCR_VBATE;
\r
1111 /* if ADC1 Channel_16 or Channel_17 is selected enable TSVREFE Channel(Temperature sensor and VREFINT) */
\r
1112 if ((hadc->Instance == ADC1) && ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || (sConfig->Channel == ADC_CHANNEL_VREFINT)))
\r
1114 /* Enable the TSVREFE channel*/
\r
1115 ADC->CCR |= ADC_CCR_TSVREFE;
\r
1117 if((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR))
\r
1119 /* Delay for temperature sensor stabilization time */
\r
1120 /* Compute number of CPU cycles to wait for */
\r
1121 counter = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000));
\r
1122 while(counter != 0)
\r
1129 /* Process unlocked */
\r
1130 __HAL_UNLOCK(hadc);
\r
1132 /* Return function status */
\r
1137 * @brief Configures the analog watchdog.
\r
1138 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
\r
1139 * the configuration information for the specified ADC.
\r
1140 * @param AnalogWDGConfig : pointer to an ADC_AnalogWDGConfTypeDef structure
\r
1141 * that contains the configuration information of ADC analog watchdog.
\r
1142 * @retval HAL status
\r
1144 HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig)
\r
1146 #ifdef USE_FULL_ASSERT
\r
1148 #endif /* USE_FULL_ASSERT */
\r
1150 /* Check the parameters */
\r
1151 assert_param(IS_ADC_ANALOG_WATCHDOG(AnalogWDGConfig->WatchdogMode));
\r
1152 assert_param(IS_ADC_CHANNEL(AnalogWDGConfig->Channel));
\r
1153 assert_param(IS_FUNCTIONAL_STATE(AnalogWDGConfig->ITMode));
\r
1155 #ifdef USE_FULL_ASSERT
\r
1156 tmp = ADC_GET_RESOLUTION(hadc);
\r
1157 assert_param(IS_ADC_RANGE(tmp, AnalogWDGConfig->HighThreshold));
\r
1158 assert_param(IS_ADC_RANGE(tmp, AnalogWDGConfig->LowThreshold));
\r
1159 #endif /* USE_FULL_ASSERT */
\r
1161 /* Process locked */
\r
1164 if(AnalogWDGConfig->ITMode == ENABLE)
\r
1166 /* Enable the ADC Analog watchdog interrupt */
\r
1167 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_AWD);
\r
1171 /* Disable the ADC Analog watchdog interrupt */
\r
1172 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_AWD);
\r
1175 /* Clear AWDEN, JAWDEN and AWDSGL bits */
\r
1176 hadc->Instance->CR1 &= ~(ADC_CR1_AWDSGL | ADC_CR1_JAWDEN | ADC_CR1_AWDEN);
\r
1178 /* Set the analog watchdog enable mode */
\r
1179 hadc->Instance->CR1 |= AnalogWDGConfig->WatchdogMode;
\r
1181 /* Set the high threshold */
\r
1182 hadc->Instance->HTR = AnalogWDGConfig->HighThreshold;
\r
1184 /* Set the low threshold */
\r
1185 hadc->Instance->LTR = AnalogWDGConfig->LowThreshold;
\r
1187 /* Clear the Analog watchdog channel select bits */
\r
1188 hadc->Instance->CR1 &= ~ADC_CR1_AWDCH;
\r
1190 /* Set the Analog watchdog channel */
\r
1191 hadc->Instance->CR1 |= (uint32_t)((uint16_t)(AnalogWDGConfig->Channel));
\r
1193 /* Process unlocked */
\r
1194 __HAL_UNLOCK(hadc);
\r
1196 /* Return function status */
\r
1204 /** @defgroup ADC_Exported_Functions_Group4 ADC Peripheral State functions
\r
1205 * @brief ADC Peripheral State functions
\r
1208 ===============================================================================
\r
1209 ##### Peripheral State and errors functions #####
\r
1210 ===============================================================================
\r
1212 This subsection provides functions allowing to
\r
1213 (+) Check the ADC state
\r
1214 (+) Check the ADC Error
\r
1221 * @brief return the ADC state
\r
1222 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
\r
1223 * the configuration information for the specified ADC.
\r
1224 * @retval HAL state
\r
1226 HAL_ADC_StateTypeDef HAL_ADC_GetState(ADC_HandleTypeDef* hadc)
\r
1228 /* Return ADC state */
\r
1229 return hadc->State;
\r
1233 * @brief Return the ADC error code
\r
1234 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
\r
1235 * the configuration information for the specified ADC.
\r
1236 * @retval ADC Error Code
\r
1238 uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc)
\r
1240 return hadc->ErrorCode;
\r
1251 /* Private functions ---------------------------------------------------------*/
\r
1253 /** @defgroup ADC_Private_Functions
\r
1258 * @brief Initializes the ADCx peripheral according to the specified parameters
\r
1259 * in the ADC_InitStruct without initializing the ADC MSP.
\r
1260 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
\r
1261 * the configuration information for the specified ADC.
\r
1264 static void ADC_Init(ADC_HandleTypeDef* hadc)
\r
1266 /* Set ADC parameters */
\r
1267 /* Set the ADC clock prescaler */
\r
1268 ADC->CCR &= ~(ADC_CCR_ADCPRE);
\r
1269 ADC->CCR |= hadc->Init.ClockPrescaler;
\r
1271 /* Set ADC scan mode */
\r
1272 hadc->Instance->CR1 &= ~(ADC_CR1_SCAN);
\r
1273 hadc->Instance->CR1 |= ADC_CR1_SCANCONV(hadc->Init.ScanConvMode);
\r
1275 /* Set ADC resolution */
\r
1276 hadc->Instance->CR1 &= ~(ADC_CR1_RES);
\r
1277 hadc->Instance->CR1 |= hadc->Init.Resolution;
\r
1279 /* Set ADC data alignment */
\r
1280 hadc->Instance->CR2 &= ~(ADC_CR2_ALIGN);
\r
1281 hadc->Instance->CR2 |= hadc->Init.DataAlign;
\r
1283 /* Enable external trigger if trigger selection is different of software */
\r
1285 /* Note: This configuration keeps the hardware feature of parameter */
\r
1286 /* ExternalTrigConvEdge "trigger edge none" equivalent to */
\r
1287 /* software start. */
\r
1288 if(hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START)
\r
1290 /* Select external trigger to start conversion */
\r
1291 hadc->Instance->CR2 &= ~(ADC_CR2_EXTSEL);
\r
1292 hadc->Instance->CR2 |= hadc->Init.ExternalTrigConv;
\r
1294 /* Select external trigger polarity */
\r
1295 hadc->Instance->CR2 &= ~(ADC_CR2_EXTEN);
\r
1296 hadc->Instance->CR2 |= hadc->Init.ExternalTrigConvEdge;
\r
1300 /* Reset the external trigger */
\r
1301 hadc->Instance->CR2 &= ~(ADC_CR2_EXTSEL);
\r
1302 hadc->Instance->CR2 &= ~(ADC_CR2_EXTEN);
\r
1305 /* Enable or disable ADC continuous conversion mode */
\r
1306 hadc->Instance->CR2 &= ~(ADC_CR2_CONT);
\r
1307 hadc->Instance->CR2 |= ADC_CR2_CONTINUOUS(hadc->Init.ContinuousConvMode);
\r
1309 if(hadc->Init.DiscontinuousConvMode != DISABLE)
\r
1311 assert_param(IS_ADC_REGULAR_DISC_NUMBER(hadc->Init.NbrOfDiscConversion));
\r
1313 /* Enable the selected ADC regular discontinuous mode */
\r
1314 hadc->Instance->CR1 |= (uint32_t)ADC_CR1_DISCEN;
\r
1316 /* Set the number of channels to be converted in discontinuous mode */
\r
1317 hadc->Instance->CR1 &= ~(ADC_CR1_DISCNUM);
\r
1318 hadc->Instance->CR1 |= ADC_CR1_DISCONTINUOUS(hadc->Init.NbrOfDiscConversion);
\r
1322 /* Disable the selected ADC regular discontinuous mode */
\r
1323 hadc->Instance->CR1 &= ~(ADC_CR1_DISCEN);
\r
1326 /* Set ADC number of conversion */
\r
1327 hadc->Instance->SQR1 &= ~(ADC_SQR1_L);
\r
1328 hadc->Instance->SQR1 |= ADC_SQR1(hadc->Init.NbrOfConversion);
\r
1330 /* Enable or disable ADC DMA continuous request */
\r
1331 hadc->Instance->CR2 &= ~(ADC_CR2_DDS);
\r
1332 hadc->Instance->CR2 |= ADC_CR2_DMAContReq(hadc->Init.DMAContinuousRequests);
\r
1334 /* Enable or disable ADC end of conversion selection */
\r
1335 hadc->Instance->CR2 &= ~(ADC_CR2_EOCS);
\r
1336 hadc->Instance->CR2 |= ADC_CR2_EOCSelection(hadc->Init.EOCSelection);
\r
1340 * @brief DMA transfer complete callback.
\r
1341 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
\r
1342 * the configuration information for the specified DMA module.
\r
1345 static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma)
\r
1347 ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
\r
1349 /* Check if an injected conversion is ready */
\r
1350 if(hadc->State == HAL_ADC_STATE_EOC_INJ)
\r
1352 /* Change ADC state */
\r
1353 hadc->State = HAL_ADC_STATE_EOC_INJ_REG;
\r
1357 /* Change ADC state */
\r
1358 hadc->State = HAL_ADC_STATE_EOC_REG;
\r
1361 HAL_ADC_ConvCpltCallback(hadc);
\r
1365 * @brief DMA half transfer complete callback.
\r
1366 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
\r
1367 * the configuration information for the specified DMA module.
\r
1370 static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma)
\r
1372 ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
\r
1373 /* Conversion complete callback */
\r
1374 HAL_ADC_ConvHalfCpltCallback(hadc);
\r
1378 * @brief DMA error callback
\r
1379 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
\r
1380 * the configuration information for the specified DMA module.
\r
1383 static void ADC_DMAError(DMA_HandleTypeDef *hdma)
\r
1385 ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
\r
1386 hadc->State= HAL_ADC_STATE_ERROR;
\r
1387 /* Set ADC error code to DMA error */
\r
1388 hadc->ErrorCode |= HAL_ADC_ERROR_DMA;
\r
1389 HAL_ADC_ErrorCallback(hadc);
\r
1397 #endif /* HAL_ADC_MODULE_ENABLED */
\r
1406 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
\r