2 ******************************************************************************
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3 * @file stm32f7xx_hal_cryp_ex.c
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4 * @author MCD Application Team
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6 * @date 24-March-2015
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7 * @brief Extended CRYP HAL module driver
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8 * This file provides firmware functions to manage the following
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9 * functionalities of CRYP extension peripheral:
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10 * + Extended AES processing functions
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13 ==============================================================================
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14 ##### How to use this driver #####
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15 ==============================================================================
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17 The CRYP Extension HAL driver can be used as follows:
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18 (#)Initialize the CRYP low level resources by implementing the HAL_CRYP_MspInit():
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19 (##) Enable the CRYP interface clock using __HAL_RCC_CRYP_CLK_ENABLE()
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20 (##) In case of using interrupts (e.g. HAL_CRYPEx_AESGCM_Encrypt_IT())
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21 (+++) Configure the CRYP interrupt priority using HAL_NVIC_SetPriority()
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22 (+++) Enable the CRYP IRQ handler using HAL_NVIC_EnableIRQ()
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23 (+) In CRYP IRQ handler, call HAL_CRYP_IRQHandler()
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24 (##) In case of using DMA to control data transfer (e.g. HAL_AES_ECB_Encrypt_DMA())
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25 (+++) Enable the DMAx interface clock using __DMAx_CLK_ENABLE()
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26 (+++) Configure and enable two DMA streams one for managing data transfer from
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27 memory to peripheral (input stream) and another stream for managing data
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28 transfer from peripheral to memory (output stream)
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29 (+++) Associate the initialized DMA handle to the CRYP DMA handle
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30 using __HAL_LINKDMA()
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31 (+++) Configure the priority and enable the NVIC for the transfer complete
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32 interrupt on the two DMA Streams. The output stream should have higher
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33 priority than the input stream HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ()
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34 (#)Initialize the CRYP HAL using HAL_CRYP_Init(). This function configures mainly:
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35 (##) The data type: 1-bit, 8-bit, 16-bit and 32-bit
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36 (##) The key size: 128, 192 and 256. This parameter is relevant only for AES
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37 (##) The encryption/decryption key. Its size depends on the algorithm
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38 used for encryption/decryption
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39 (##) The initialization vector (counter). It is not used ECB mode.
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40 (#)Three processing (encryption/decryption) functions are available:
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41 (##) Polling mode: encryption and decryption APIs are blocking functions
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42 i.e. they process the data and wait till the processing is finished
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43 e.g. HAL_CRYPEx_AESGCM_Encrypt()
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44 (##) Interrupt mode: encryption and decryption APIs are not blocking functions
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45 i.e. they process the data under interrupt
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46 e.g. HAL_CRYPEx_AESGCM_Encrypt_IT()
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47 (##) DMA mode: encryption and decryption APIs are not blocking functions
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48 i.e. the data transfer is ensured by DMA
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49 e.g. HAL_CRYPEx_AESGCM_Encrypt_DMA()
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50 (#)When the processing function is called at first time after HAL_CRYP_Init()
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51 the CRYP peripheral is initialized and processes the buffer in input.
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52 At second call, the processing function performs an append of the already
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54 When a new data block is to be processed, call HAL_CRYP_Init() then the
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55 processing function.
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56 (#)In AES-GCM and AES-CCM modes are an authenticated encryption algorithms
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57 which provide authentication messages.
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58 HAL_AES_GCM_Finish() and HAL_AES_CCM_Finish() are used to provide those
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59 authentication messages.
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60 Call those functions after the processing ones (polling, interrupt or DMA).
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61 e.g. in AES-CCM mode call HAL_CRYPEx_AESCCM_Encrypt() to encrypt the plain data
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62 then call HAL_CRYPEx_AESCCM_Finish() to get the authentication message
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63 @note: For CCM Encrypt/Decrypt API's, only DataType = 8-bit is supported by this version.
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64 @note: The HAL_CRYPEx_AESGCM_xxxx() implementation is limited to 32bits inputs data length
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65 (Plain/Cyphertext, Header) compared with GCM standards specifications (800-38D).
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66 (#)Call HAL_CRYP_DeInit() to deinitialize the CRYP peripheral.
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69 ******************************************************************************
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72 * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
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74 * Redistribution and use in source and binary forms, with or without modification,
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75 * are permitted provided that the following conditions are met:
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76 * 1. Redistributions of source code must retain the above copyright notice,
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77 * this list of conditions and the following disclaimer.
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78 * 2. Redistributions in binary form must reproduce the above copyright notice,
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79 * this list of conditions and the following disclaimer in the documentation
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80 * and/or other materials provided with the distribution.
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81 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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82 * may be used to endorse or promote products derived from this software
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83 * without specific prior written permission.
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85 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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86 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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87 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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88 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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89 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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90 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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91 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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92 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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93 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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94 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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96 ******************************************************************************
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99 /* Includes ------------------------------------------------------------------*/
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100 #include "stm32f7xx_hal.h"
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102 /** @addtogroup STM32F7xx_HAL_Driver
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106 /** @defgroup CRYPEx CRYPEx
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107 * @brief CRYP Extension HAL module driver.
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111 #ifdef HAL_CRYP_MODULE_ENABLED
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113 #if defined(STM32F756xx)
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115 /* Private typedef -----------------------------------------------------------*/
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116 /* Private define ------------------------------------------------------------*/
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117 /** @addtogroup CRYPEx_Private_define
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120 #define CRYPEx_TIMEOUT_VALUE 1
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125 /* Private macro -------------------------------------------------------------*/
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126 /* Private variables ---------------------------------------------------------*/
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127 /* Private function prototypes -----------------------------------------------*/
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128 /** @defgroup CRYPEx_Private_Functions_prototypes CRYP Private Functions Prototypes
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131 static void CRYPEx_GCMCCM_SetInitVector(CRYP_HandleTypeDef *hcryp, uint8_t *InitVector);
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132 static void CRYPEx_GCMCCM_SetKey(CRYP_HandleTypeDef *hcryp, uint8_t *Key, uint32_t KeySize);
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133 static HAL_StatusTypeDef CRYPEx_GCMCCM_ProcessData(CRYP_HandleTypeDef *hcryp, uint8_t *Input, uint16_t Ilength, uint8_t *Output, uint32_t Timeout);
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134 static HAL_StatusTypeDef CRYPEx_GCMCCM_SetHeaderPhase(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint32_t Timeout);
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135 static void CRYPEx_GCMCCM_DMAInCplt(DMA_HandleTypeDef *hdma);
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136 static void CRYPEx_GCMCCM_DMAOutCplt(DMA_HandleTypeDef *hdma);
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137 static void CRYPEx_GCMCCM_DMAError(DMA_HandleTypeDef *hdma);
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138 static void CRYPEx_GCMCCM_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr);
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143 /* Private functions ---------------------------------------------------------*/
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144 /** @addtogroup CRYPEx_Private_Functions
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149 * @brief DMA CRYP Input Data process complete callback.
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150 * @param hdma: DMA handle
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153 static void CRYPEx_GCMCCM_DMAInCplt(DMA_HandleTypeDef *hdma)
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155 CRYP_HandleTypeDef* hcryp = ( CRYP_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
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157 /* Disable the DMA transfer for input Fifo request by resetting the DIEN bit
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158 in the DMACR register */
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159 hcryp->Instance->DMACR &= (uint32_t)(~CRYP_DMACR_DIEN);
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161 /* Call input data transfer complete callback */
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162 HAL_CRYP_InCpltCallback(hcryp);
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166 * @brief DMA CRYP Output Data process complete callback.
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167 * @param hdma: DMA handle
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170 static void CRYPEx_GCMCCM_DMAOutCplt(DMA_HandleTypeDef *hdma)
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172 CRYP_HandleTypeDef* hcryp = ( CRYP_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
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174 /* Disable the DMA transfer for output Fifo request by resetting the DOEN bit
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175 in the DMACR register */
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176 hcryp->Instance->DMACR &= (uint32_t)(~CRYP_DMACR_DOEN);
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178 /* Enable the CRYP peripheral */
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179 __HAL_CRYP_DISABLE(hcryp);
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181 /* Change the CRYP peripheral state */
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182 hcryp->State = HAL_CRYP_STATE_READY;
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184 /* Call output data transfer complete callback */
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185 HAL_CRYP_OutCpltCallback(hcryp);
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189 * @brief DMA CRYP communication error callback.
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190 * @param hdma: DMA handle
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193 static void CRYPEx_GCMCCM_DMAError(DMA_HandleTypeDef *hdma)
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195 CRYP_HandleTypeDef* hcryp = ( CRYP_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
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196 hcryp->State= HAL_CRYP_STATE_READY;
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197 HAL_CRYP_ErrorCallback(hcryp);
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201 * @brief Writes the Key in Key registers.
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202 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
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203 * the configuration information for CRYP module
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204 * @param Key: Pointer to Key buffer
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205 * @param KeySize: Size of Key
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208 static void CRYPEx_GCMCCM_SetKey(CRYP_HandleTypeDef *hcryp, uint8_t *Key, uint32_t KeySize)
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210 uint32_t keyaddr = (uint32_t)Key;
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214 case CRYP_KEYSIZE_256B:
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215 /* Key Initialisation */
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216 hcryp->Instance->K0LR = __REV(*(uint32_t*)(keyaddr));
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218 hcryp->Instance->K0RR = __REV(*(uint32_t*)(keyaddr));
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220 hcryp->Instance->K1LR = __REV(*(uint32_t*)(keyaddr));
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222 hcryp->Instance->K1RR = __REV(*(uint32_t*)(keyaddr));
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224 hcryp->Instance->K2LR = __REV(*(uint32_t*)(keyaddr));
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226 hcryp->Instance->K2RR = __REV(*(uint32_t*)(keyaddr));
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228 hcryp->Instance->K3LR = __REV(*(uint32_t*)(keyaddr));
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230 hcryp->Instance->K3RR = __REV(*(uint32_t*)(keyaddr));
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232 case CRYP_KEYSIZE_192B:
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233 hcryp->Instance->K1LR = __REV(*(uint32_t*)(keyaddr));
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235 hcryp->Instance->K1RR = __REV(*(uint32_t*)(keyaddr));
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237 hcryp->Instance->K2LR = __REV(*(uint32_t*)(keyaddr));
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239 hcryp->Instance->K2RR = __REV(*(uint32_t*)(keyaddr));
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241 hcryp->Instance->K3LR = __REV(*(uint32_t*)(keyaddr));
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243 hcryp->Instance->K3RR = __REV(*(uint32_t*)(keyaddr));
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245 case CRYP_KEYSIZE_128B:
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246 hcryp->Instance->K2LR = __REV(*(uint32_t*)(keyaddr));
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248 hcryp->Instance->K2RR = __REV(*(uint32_t*)(keyaddr));
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250 hcryp->Instance->K3LR = __REV(*(uint32_t*)(keyaddr));
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252 hcryp->Instance->K3RR = __REV(*(uint32_t*)(keyaddr));
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260 * @brief Writes the InitVector/InitCounter in IV registers.
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261 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
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262 * the configuration information for CRYP module
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263 * @param InitVector: Pointer to InitVector/InitCounter buffer
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266 static void CRYPEx_GCMCCM_SetInitVector(CRYP_HandleTypeDef *hcryp, uint8_t *InitVector)
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268 uint32_t ivaddr = (uint32_t)InitVector;
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270 hcryp->Instance->IV0LR = __REV(*(uint32_t*)(ivaddr));
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272 hcryp->Instance->IV0RR = __REV(*(uint32_t*)(ivaddr));
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274 hcryp->Instance->IV1LR = __REV(*(uint32_t*)(ivaddr));
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276 hcryp->Instance->IV1RR = __REV(*(uint32_t*)(ivaddr));
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280 * @brief Process Data: Writes Input data in polling mode and read the Output data.
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281 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
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282 * the configuration information for CRYP module
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283 * @param Input: Pointer to the Input buffer.
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284 * @param Ilength: Length of the Input buffer, must be a multiple of 16
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285 * @param Output: Pointer to the returned buffer
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286 * @param Timeout: Timeout value
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289 static HAL_StatusTypeDef CRYPEx_GCMCCM_ProcessData(CRYP_HandleTypeDef *hcryp, uint8_t *Input, uint16_t Ilength, uint8_t *Output, uint32_t Timeout)
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291 uint32_t tickstart = 0;
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293 uint32_t inputaddr = (uint32_t)Input;
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294 uint32_t outputaddr = (uint32_t)Output;
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296 for(i=0; (i < Ilength); i+=16)
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298 /* Write the Input block in the IN FIFO */
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299 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
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301 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
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303 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
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305 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
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309 tickstart = HAL_GetTick();
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311 while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_OFNE))
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313 /* Check for the Timeout */
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314 if(Timeout != HAL_MAX_DELAY)
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316 if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
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319 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
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321 /* Process Unlocked */
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322 __HAL_UNLOCK(hcryp);
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324 return HAL_TIMEOUT;
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328 /* Read the Output block from the OUT FIFO */
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329 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
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331 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
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333 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
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335 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
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338 /* Return function status */
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343 * @brief Sets the header phase
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344 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
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345 * the configuration information for CRYP module
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346 * @param Input: Pointer to the Input buffer.
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347 * @param Ilength: Length of the Input buffer, must be a multiple of 16
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348 * @param Timeout: Timeout value
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351 static HAL_StatusTypeDef CRYPEx_GCMCCM_SetHeaderPhase(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint32_t Timeout)
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353 uint32_t tickstart = 0;
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354 uint32_t loopcounter = 0;
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355 uint32_t headeraddr = (uint32_t)Input;
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357 /***************************** Header phase *********************************/
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358 if(hcryp->Init.HeaderSize != 0)
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360 /* Select header phase */
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361 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER);
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362 /* Enable the CRYP peripheral */
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363 __HAL_CRYP_ENABLE(hcryp);
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365 for(loopcounter = 0; (loopcounter < hcryp->Init.HeaderSize); loopcounter+=16)
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368 tickstart = HAL_GetTick();
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370 while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_IFEM))
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372 /* Check for the Timeout */
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373 if(Timeout != HAL_MAX_DELAY)
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375 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
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378 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
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380 /* Process Unlocked */
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381 __HAL_UNLOCK(hcryp);
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383 return HAL_TIMEOUT;
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387 /* Write the Input block in the IN FIFO */
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388 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
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390 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
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392 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
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394 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
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398 /* Wait until the complete message has been processed */
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401 tickstart = HAL_GetTick();
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403 while((hcryp->Instance->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY)
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405 /* Check for the Timeout */
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406 if(Timeout != HAL_MAX_DELAY)
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408 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
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411 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
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413 /* Process Unlocked */
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414 __HAL_UNLOCK(hcryp);
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416 return HAL_TIMEOUT;
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421 /* Return function status */
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426 * @brief Sets the DMA configuration and start the DMA transfer.
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427 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
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428 * the configuration information for CRYP module
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429 * @param inputaddr: Address of the Input buffer
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430 * @param Size: Size of the Input buffer, must be a multiple of 16
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431 * @param outputaddr: Address of the Output buffer
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434 static void CRYPEx_GCMCCM_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr)
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436 /* Set the CRYP DMA transfer complete callback */
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437 hcryp->hdmain->XferCpltCallback = CRYPEx_GCMCCM_DMAInCplt;
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438 /* Set the DMA error callback */
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439 hcryp->hdmain->XferErrorCallback = CRYPEx_GCMCCM_DMAError;
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441 /* Set the CRYP DMA transfer complete callback */
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442 hcryp->hdmaout->XferCpltCallback = CRYPEx_GCMCCM_DMAOutCplt;
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443 /* Set the DMA error callback */
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444 hcryp->hdmaout->XferErrorCallback = CRYPEx_GCMCCM_DMAError;
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446 /* Enable the CRYP peripheral */
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447 __HAL_CRYP_ENABLE(hcryp);
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449 /* Enable the DMA In DMA Stream */
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450 HAL_DMA_Start_IT(hcryp->hdmain, inputaddr, (uint32_t)&hcryp->Instance->DR, Size/4);
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452 /* Enable In DMA request */
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453 hcryp->Instance->DMACR = CRYP_DMACR_DIEN;
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455 /* Enable the DMA Out DMA Stream */
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456 HAL_DMA_Start_IT(hcryp->hdmaout, (uint32_t)&hcryp->Instance->DOUT, outputaddr, Size/4);
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458 /* Enable Out DMA request */
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459 hcryp->Instance->DMACR |= CRYP_DMACR_DOEN;
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466 /* Exported functions---------------------------------------------------------*/
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467 /** @addtogroup CRYPEx_Exported_Functions
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471 /** @defgroup CRYPEx_Exported_Functions_Group1 Extended AES processing functions
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472 * @brief Extended processing functions.
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475 ==============================================================================
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476 ##### Extended AES processing functions #####
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477 ==============================================================================
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478 [..] This section provides functions allowing to:
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479 (+) Encrypt plaintext using AES-128/192/256 using GCM and CCM chaining modes
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480 (+) Decrypt cyphertext using AES-128/192/256 using GCM and CCM chaining modes
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481 (+) Finish the processing. This function is available only for GCM and CCM
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482 [..] Three processing methods are available:
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493 * @brief Initializes the CRYP peripheral in AES CCM encryption mode then
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494 * encrypt pPlainData. The cypher data are available in pCypherData.
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495 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
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496 * the configuration information for CRYP module
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497 * @param pPlainData: Pointer to the plaintext buffer
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498 * @param Size: Length of the plaintext buffer, must be a multiple of 16
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499 * @param pCypherData: Pointer to the cyphertext buffer
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500 * @param Timeout: Timeout duration
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501 * @retval HAL status
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503 HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
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505 uint32_t tickstart = 0;
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506 uint32_t headersize = hcryp->Init.HeaderSize;
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507 uint32_t headeraddr = (uint32_t)hcryp->Init.Header;
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508 uint32_t loopcounter = 0;
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509 uint32_t bufferidx = 0;
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510 uint8_t blockb0[16] = {0};/* Block B0 */
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511 uint8_t ctr[16] = {0}; /* Counter */
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512 uint32_t b0addr = (uint32_t)blockb0;
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514 /* Process Locked */
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517 /* Change the CRYP peripheral state */
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518 hcryp->State = HAL_CRYP_STATE_BUSY;
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520 /* Check if initialization phase has already been performed */
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521 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
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523 /************************ Formatting the header block *********************/
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524 if(headersize != 0)
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526 /* Check that the associated data (or header) length is lower than 2^16 - 2^8 = 65536 - 256 = 65280 */
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527 if(headersize < 65280)
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529 hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize >> 8) & 0xFF);
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530 hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize) & 0xFF);
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535 /* Header is encoded as 0xff || 0xfe || [headersize]32, i.e., six octets */
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536 hcryp->Init.pScratch[bufferidx++] = 0xFF;
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537 hcryp->Init.pScratch[bufferidx++] = 0xFE;
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538 hcryp->Init.pScratch[bufferidx++] = headersize & 0xff000000;
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539 hcryp->Init.pScratch[bufferidx++] = headersize & 0x00ff0000;
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540 hcryp->Init.pScratch[bufferidx++] = headersize & 0x0000ff00;
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541 hcryp->Init.pScratch[bufferidx++] = headersize & 0x000000ff;
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544 /* Copy the header buffer in internal buffer "hcryp->Init.pScratch" */
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545 for(loopcounter = 0; loopcounter < headersize; loopcounter++)
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547 hcryp->Init.pScratch[bufferidx++] = hcryp->Init.Header[loopcounter];
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549 /* Check if the header size is modulo 16 */
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550 if ((headersize % 16) != 0)
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552 /* Padd the header buffer with 0s till the hcryp->Init.pScratch length is modulo 16 */
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553 for(loopcounter = headersize; loopcounter <= ((headersize/16) + 1) * 16; loopcounter++)
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555 hcryp->Init.pScratch[loopcounter] = 0;
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557 /* Set the header size to modulo 16 */
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558 headersize = ((headersize/16) + 1) * 16;
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560 /* Set the pointer headeraddr to hcryp->Init.pScratch */
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561 headeraddr = (uint32_t)hcryp->Init.pScratch;
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563 /*********************** Formatting the block B0 **************************/
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564 if(headersize != 0)
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569 /* blockb0[0] |= 0u | (((( (uint8_t) hcryp->Init.TagSize - 2) / 2) & 0x07 ) << 3 ) | ( ( (uint8_t) (15 - hcryp->Init.IVSize) - 1) & 0x07) */
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570 blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)(((uint8_t)(hcryp->Init.TagSize - (uint8_t)(2))) >> 1) & (uint8_t)0x07 ) << 3);
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571 blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)((uint8_t)(15) - hcryp->Init.IVSize) - (uint8_t)1) & (uint8_t)0x07);
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573 for (loopcounter = 0; loopcounter < hcryp->Init.IVSize; loopcounter++)
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575 blockb0[loopcounter+1] = hcryp->Init.pInitVect[loopcounter];
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577 for ( ; loopcounter < 13; loopcounter++)
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579 blockb0[loopcounter+1] = 0;
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582 blockb0[14] = (Size >> 8);
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583 blockb0[15] = (Size & 0xFF);
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585 /************************* Formatting the initial counter *****************/
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587 Bits 7 and 6 are reserved and shall be set to 0
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588 Bits 3, 4, and 5 shall also be set to 0, to ensure that all the counter blocks
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589 are distinct from B0
\r
590 Bits 0, 1, and 2 contain the same encoding of q as in B0
\r
592 ctr[0] = blockb0[0] & 0x07;
\r
593 /* byte 1 to NonceSize is the IV (Nonce) */
\r
594 for(loopcounter = 1; loopcounter < hcryp->Init.IVSize + 1; loopcounter++)
\r
596 ctr[loopcounter] = blockb0[loopcounter];
\r
598 /* Set the LSB to 1 */
\r
602 CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
\r
604 /* Set the CRYP peripheral in AES CCM mode */
\r
605 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CCM_ENCRYPT);
\r
607 /* Set the Initialization Vector */
\r
608 CRYPEx_GCMCCM_SetInitVector(hcryp, ctr);
\r
610 /* Select init phase */
\r
611 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT);
\r
613 b0addr = (uint32_t)blockb0;
\r
614 /* Write the blockb0 block in the IN FIFO */
\r
615 hcryp->Instance->DR = *(uint32_t*)(b0addr);
\r
617 hcryp->Instance->DR = *(uint32_t*)(b0addr);
\r
619 hcryp->Instance->DR = *(uint32_t*)(b0addr);
\r
621 hcryp->Instance->DR = *(uint32_t*)(b0addr);
\r
623 /* Enable the CRYP peripheral */
\r
624 __HAL_CRYP_ENABLE(hcryp);
\r
627 tickstart = HAL_GetTick();
\r
629 while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
\r
631 /* Check for the Timeout */
\r
632 if(Timeout != HAL_MAX_DELAY)
\r
634 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
\r
637 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
\r
639 /* Process Unlocked */
\r
640 __HAL_UNLOCK(hcryp);
\r
642 return HAL_TIMEOUT;
\r
646 /***************************** Header phase *******************************/
\r
647 if(headersize != 0)
\r
649 /* Select header phase */
\r
650 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER);
\r
652 /* Enable the CRYP peripheral */
\r
653 __HAL_CRYP_ENABLE(hcryp);
\r
655 for(loopcounter = 0; (loopcounter < headersize); loopcounter+=16)
\r
658 tickstart = HAL_GetTick();
\r
660 while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_IFEM))
\r
663 /* Check for the Timeout */
\r
664 if(Timeout != HAL_MAX_DELAY)
\r
666 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
\r
669 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
\r
671 /* Process Unlocked */
\r
672 __HAL_UNLOCK(hcryp);
\r
674 return HAL_TIMEOUT;
\r
679 /* Write the header block in the IN FIFO */
\r
680 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
\r
682 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
\r
684 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
\r
686 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
\r
691 tickstart = HAL_GetTick();
\r
693 while((hcryp->Instance->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY)
\r
695 /* Check for the Timeout */
\r
696 if(Timeout != HAL_MAX_DELAY)
\r
698 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
\r
701 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
\r
703 /* Process Unlocked */
\r
704 __HAL_UNLOCK(hcryp);
\r
706 return HAL_TIMEOUT;
\r
711 /* Save formatted counter into the scratch buffer pScratch */
\r
712 for(loopcounter = 0; (loopcounter < 16); loopcounter++)
\r
714 hcryp->Init.pScratch[loopcounter] = ctr[loopcounter];
\r
717 hcryp->Init.pScratch[15] &= 0xfe;
\r
719 /* Select payload phase once the header phase is performed */
\r
720 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD);
\r
723 __HAL_CRYP_FIFO_FLUSH(hcryp);
\r
725 /* Enable the CRYP peripheral */
\r
726 __HAL_CRYP_ENABLE(hcryp);
\r
728 /* Set the phase */
\r
729 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
\r
732 /* Write Plain Data and Get Cypher Data */
\r
733 if(CRYPEx_GCMCCM_ProcessData(hcryp,pPlainData, Size, pCypherData, Timeout) != HAL_OK)
\r
735 return HAL_TIMEOUT;
\r
738 /* Change the CRYP peripheral state */
\r
739 hcryp->State = HAL_CRYP_STATE_READY;
\r
741 /* Process Unlocked */
\r
742 __HAL_UNLOCK(hcryp);
\r
744 /* Return function status */
\r
749 * @brief Initializes the CRYP peripheral in AES GCM encryption mode then
\r
750 * encrypt pPlainData. The cypher data are available in pCypherData.
\r
751 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
\r
752 * the configuration information for CRYP module
\r
753 * @param pPlainData: Pointer to the plaintext buffer
\r
754 * @param Size: Length of the plaintext buffer, must be a multiple of 16
\r
755 * @param pCypherData: Pointer to the cyphertext buffer
\r
756 * @param Timeout: Timeout duration
\r
757 * @retval HAL status
\r
759 HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
\r
761 uint32_t tickstart = 0;
\r
763 /* Process Locked */
\r
766 /* Change the CRYP peripheral state */
\r
767 hcryp->State = HAL_CRYP_STATE_BUSY;
\r
769 /* Check if initialization phase has already been performed */
\r
770 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
\r
773 CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
\r
775 /* Set the CRYP peripheral in AES GCM mode */
\r
776 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_GCM_ENCRYPT);
\r
778 /* Set the Initialization Vector */
\r
779 CRYPEx_GCMCCM_SetInitVector(hcryp, hcryp->Init.pInitVect);
\r
782 __HAL_CRYP_FIFO_FLUSH(hcryp);
\r
784 /* Enable the CRYP peripheral */
\r
785 __HAL_CRYP_ENABLE(hcryp);
\r
788 tickstart = HAL_GetTick();
\r
790 while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
\r
792 /* Check for the Timeout */
\r
793 if(Timeout != HAL_MAX_DELAY)
\r
795 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
\r
798 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
\r
800 /* Process Unlocked */
\r
801 __HAL_UNLOCK(hcryp);
\r
803 return HAL_TIMEOUT;
\r
808 /* Set the header phase */
\r
809 if(CRYPEx_GCMCCM_SetHeaderPhase(hcryp, hcryp->Init.Header, hcryp->Init.HeaderSize, Timeout) != HAL_OK)
\r
811 return HAL_TIMEOUT;
\r
814 /* Disable the CRYP peripheral */
\r
815 __HAL_CRYP_DISABLE(hcryp);
\r
817 /* Select payload phase once the header phase is performed */
\r
818 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD);
\r
821 __HAL_CRYP_FIFO_FLUSH(hcryp);
\r
823 /* Enable the CRYP peripheral */
\r
824 __HAL_CRYP_ENABLE(hcryp);
\r
826 /* Set the phase */
\r
827 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
\r
830 /* Write Plain Data and Get Cypher Data */
\r
831 if(CRYPEx_GCMCCM_ProcessData(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
\r
833 return HAL_TIMEOUT;
\r
836 /* Change the CRYP peripheral state */
\r
837 hcryp->State = HAL_CRYP_STATE_READY;
\r
839 /* Process Unlocked */
\r
840 __HAL_UNLOCK(hcryp);
\r
842 /* Return function status */
\r
847 * @brief Initializes the CRYP peripheral in AES GCM decryption mode then
\r
848 * decrypted pCypherData. The cypher data are available in pPlainData.
\r
849 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
\r
850 * the configuration information for CRYP module
\r
851 * @param pCypherData: Pointer to the cyphertext buffer
\r
852 * @param Size: Length of the cyphertext buffer, must be a multiple of 16
\r
853 * @param pPlainData: Pointer to the plaintext buffer
\r
854 * @param Timeout: Timeout duration
\r
855 * @retval HAL status
\r
857 HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
\r
859 uint32_t tickstart = 0;
\r
861 /* Process Locked */
\r
864 /* Change the CRYP peripheral state */
\r
865 hcryp->State = HAL_CRYP_STATE_BUSY;
\r
867 /* Check if initialization phase has already been performed */
\r
868 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
\r
871 CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
\r
873 /* Set the CRYP peripheral in AES GCM decryption mode */
\r
874 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_GCM_DECRYPT);
\r
876 /* Set the Initialization Vector */
\r
877 CRYPEx_GCMCCM_SetInitVector(hcryp, hcryp->Init.pInitVect);
\r
880 __HAL_CRYP_FIFO_FLUSH(hcryp);
\r
882 /* Enable the CRYP peripheral */
\r
883 __HAL_CRYP_ENABLE(hcryp);
\r
886 tickstart = HAL_GetTick();
\r
888 while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
\r
890 /* Check for the Timeout */
\r
891 if(Timeout != HAL_MAX_DELAY)
\r
893 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
\r
896 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
\r
898 /* Process Unlocked */
\r
899 __HAL_UNLOCK(hcryp);
\r
901 return HAL_TIMEOUT;
\r
906 /* Set the header phase */
\r
907 if(CRYPEx_GCMCCM_SetHeaderPhase(hcryp, hcryp->Init.Header, hcryp->Init.HeaderSize, Timeout) != HAL_OK)
\r
909 return HAL_TIMEOUT;
\r
911 /* Disable the CRYP peripheral */
\r
912 __HAL_CRYP_DISABLE(hcryp);
\r
914 /* Select payload phase once the header phase is performed */
\r
915 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD);
\r
917 /* Enable the CRYP peripheral */
\r
918 __HAL_CRYP_ENABLE(hcryp);
\r
920 /* Set the phase */
\r
921 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
\r
924 /* Write Plain Data and Get Cypher Data */
\r
925 if(CRYPEx_GCMCCM_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
\r
927 return HAL_TIMEOUT;
\r
930 /* Change the CRYP peripheral state */
\r
931 hcryp->State = HAL_CRYP_STATE_READY;
\r
933 /* Process Unlocked */
\r
934 __HAL_UNLOCK(hcryp);
\r
936 /* Return function status */
\r
941 * @brief Computes the authentication TAG.
\r
942 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
\r
943 * the configuration information for CRYP module
\r
944 * @param Size: Total length of the plain/cyphertext buffer
\r
945 * @param AuthTag: Pointer to the authentication buffer
\r
946 * @param Timeout: Timeout duration
\r
947 * @retval HAL status
\r
949 HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Finish(CRYP_HandleTypeDef *hcryp, uint32_t Size, uint8_t *AuthTag, uint32_t Timeout)
\r
951 uint32_t tickstart = 0;
\r
952 uint64_t headerlength = hcryp->Init.HeaderSize * 8; /* Header length in bits */
\r
953 uint64_t inputlength = Size * 8; /* input length in bits */
\r
954 uint32_t tagaddr = (uint32_t)AuthTag;
\r
956 /* Process Locked */
\r
959 /* Change the CRYP peripheral state */
\r
960 hcryp->State = HAL_CRYP_STATE_BUSY;
\r
962 /* Check if initialization phase has already been performed */
\r
963 if(hcryp->Phase == HAL_CRYP_PHASE_PROCESS)
\r
965 /* Change the CRYP phase */
\r
966 hcryp->Phase = HAL_CRYP_PHASE_FINAL;
\r
968 /* Disable CRYP to start the final phase */
\r
969 __HAL_CRYP_DISABLE(hcryp);
\r
971 /* Select final phase */
\r
972 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_FINAL);
\r
974 /* Enable the CRYP peripheral */
\r
975 __HAL_CRYP_ENABLE(hcryp);
\r
977 /* Write the number of bits in header (64 bits) followed by the number of bits
\r
979 if(hcryp->Init.DataType == CRYP_DATATYPE_1B)
\r
981 hcryp->Instance->DR = __RBIT(headerlength >> 32);
\r
982 hcryp->Instance->DR = __RBIT(headerlength);
\r
983 hcryp->Instance->DR = __RBIT(inputlength >> 32);
\r
984 hcryp->Instance->DR = __RBIT(inputlength);
\r
986 else if(hcryp->Init.DataType == CRYP_DATATYPE_8B)
\r
988 hcryp->Instance->DR = __REV(headerlength >> 32);
\r
989 hcryp->Instance->DR = __REV(headerlength);
\r
990 hcryp->Instance->DR = __REV(inputlength >> 32);
\r
991 hcryp->Instance->DR = __REV(inputlength);
\r
993 else if(hcryp->Init.DataType == CRYP_DATATYPE_16B)
\r
995 hcryp->Instance->DR = __ROR((uint32_t)(headerlength >> 32), 16);
\r
996 hcryp->Instance->DR = __ROR((uint32_t)headerlength, 16);
\r
997 hcryp->Instance->DR = __ROR((uint32_t)(inputlength >> 32), 16);
\r
998 hcryp->Instance->DR = __ROR((uint32_t)inputlength, 16);
\r
1000 else if(hcryp->Init.DataType == CRYP_DATATYPE_32B)
\r
1002 hcryp->Instance->DR = (uint32_t)(headerlength >> 32);
\r
1003 hcryp->Instance->DR = (uint32_t)(headerlength);
\r
1004 hcryp->Instance->DR = (uint32_t)(inputlength >> 32);
\r
1005 hcryp->Instance->DR = (uint32_t)(inputlength);
\r
1008 tickstart = HAL_GetTick();
\r
1010 while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_OFNE))
\r
1012 /* Check for the Timeout */
\r
1013 if(Timeout != HAL_MAX_DELAY)
\r
1015 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
\r
1017 /* Change state */
\r
1018 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
\r
1020 /* Process Unlocked */
\r
1021 __HAL_UNLOCK(hcryp);
\r
1023 return HAL_TIMEOUT;
\r
1028 /* Read the Auth TAG in the IN FIFO */
\r
1029 *(uint32_t*)(tagaddr) = hcryp->Instance->DOUT;
\r
1031 *(uint32_t*)(tagaddr) = hcryp->Instance->DOUT;
\r
1033 *(uint32_t*)(tagaddr) = hcryp->Instance->DOUT;
\r
1035 *(uint32_t*)(tagaddr) = hcryp->Instance->DOUT;
\r
1038 /* Change the CRYP peripheral state */
\r
1039 hcryp->State = HAL_CRYP_STATE_READY;
\r
1041 /* Process Unlocked */
\r
1042 __HAL_UNLOCK(hcryp);
\r
1044 /* Return function status */
\r
1049 * @brief Computes the authentication TAG for AES CCM mode.
\r
1050 * @note This API is called after HAL_AES_CCM_Encrypt()/HAL_AES_CCM_Decrypt()
\r
1051 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
\r
1052 * the configuration information for CRYP module
\r
1053 * @param AuthTag: Pointer to the authentication buffer
\r
1054 * @param Timeout: Timeout duration
\r
1055 * @retval HAL status
\r
1057 HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Finish(CRYP_HandleTypeDef *hcryp, uint8_t *AuthTag, uint32_t Timeout)
\r
1059 uint32_t tickstart = 0;
\r
1060 uint32_t tagaddr = (uint32_t)AuthTag;
\r
1061 uint32_t ctraddr = (uint32_t)hcryp->Init.pScratch;
\r
1062 uint32_t temptag[4] = {0}; /* Temporary TAG (MAC) */
\r
1063 uint32_t loopcounter;
\r
1065 /* Process Locked */
\r
1066 __HAL_LOCK(hcryp);
\r
1068 /* Change the CRYP peripheral state */
\r
1069 hcryp->State = HAL_CRYP_STATE_BUSY;
\r
1071 /* Check if initialization phase has already been performed */
\r
1072 if(hcryp->Phase == HAL_CRYP_PHASE_PROCESS)
\r
1074 /* Change the CRYP phase */
\r
1075 hcryp->Phase = HAL_CRYP_PHASE_FINAL;
\r
1077 /* Disable CRYP to start the final phase */
\r
1078 __HAL_CRYP_DISABLE(hcryp);
\r
1080 /* Select final phase */
\r
1081 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_FINAL);
\r
1083 /* Enable the CRYP peripheral */
\r
1084 __HAL_CRYP_ENABLE(hcryp);
\r
1086 /* Write the counter block in the IN FIFO */
\r
1087 hcryp->Instance->DR = *(uint32_t*)ctraddr;
\r
1089 hcryp->Instance->DR = *(uint32_t*)ctraddr;
\r
1091 hcryp->Instance->DR = *(uint32_t*)ctraddr;
\r
1093 hcryp->Instance->DR = *(uint32_t*)ctraddr;
\r
1096 tickstart = HAL_GetTick();
\r
1098 while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_OFNE))
\r
1100 /* Check for the Timeout */
\r
1101 if(Timeout != HAL_MAX_DELAY)
\r
1103 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
\r
1105 /* Change state */
\r
1106 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
\r
1108 /* Process Unlocked */
\r
1109 __HAL_UNLOCK(hcryp);
\r
1111 return HAL_TIMEOUT;
\r
1116 /* Read the Auth TAG in the IN FIFO */
\r
1117 temptag[0] = hcryp->Instance->DOUT;
\r
1118 temptag[1] = hcryp->Instance->DOUT;
\r
1119 temptag[2] = hcryp->Instance->DOUT;
\r
1120 temptag[3] = hcryp->Instance->DOUT;
\r
1123 /* Copy temporary authentication TAG in user TAG buffer */
\r
1124 for(loopcounter = 0; loopcounter < hcryp->Init.TagSize ; loopcounter++)
\r
1126 /* Set the authentication TAG buffer */
\r
1127 *((uint8_t*)tagaddr+loopcounter) = *((uint8_t*)temptag+loopcounter);
\r
1130 /* Change the CRYP peripheral state */
\r
1131 hcryp->State = HAL_CRYP_STATE_READY;
\r
1133 /* Process Unlocked */
\r
1134 __HAL_UNLOCK(hcryp);
\r
1136 /* Return function status */
\r
1141 * @brief Initializes the CRYP peripheral in AES CCM decryption mode then
\r
1142 * decrypted pCypherData. The cypher data are available in pPlainData.
\r
1143 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
\r
1144 * the configuration information for CRYP module
\r
1145 * @param pPlainData: Pointer to the plaintext buffer
\r
1146 * @param Size: Length of the plaintext buffer, must be a multiple of 16
\r
1147 * @param pCypherData: Pointer to the cyphertext buffer
\r
1148 * @param Timeout: Timeout duration
\r
1149 * @retval HAL status
\r
1151 HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
\r
1153 uint32_t tickstart = 0;
\r
1154 uint32_t headersize = hcryp->Init.HeaderSize;
\r
1155 uint32_t headeraddr = (uint32_t)hcryp->Init.Header;
\r
1156 uint32_t loopcounter = 0;
\r
1157 uint32_t bufferidx = 0;
\r
1158 uint8_t blockb0[16] = {0};/* Block B0 */
\r
1159 uint8_t ctr[16] = {0}; /* Counter */
\r
1160 uint32_t b0addr = (uint32_t)blockb0;
\r
1162 /* Process Locked */
\r
1163 __HAL_LOCK(hcryp);
\r
1165 /* Change the CRYP peripheral state */
\r
1166 hcryp->State = HAL_CRYP_STATE_BUSY;
\r
1168 /* Check if initialization phase has already been performed */
\r
1169 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
\r
1171 /************************ Formatting the header block *********************/
\r
1172 if(headersize != 0)
\r
1174 /* Check that the associated data (or header) length is lower than 2^16 - 2^8 = 65536 - 256 = 65280 */
\r
1175 if(headersize < 65280)
\r
1177 hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize >> 8) & 0xFF);
\r
1178 hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize) & 0xFF);
\r
1183 /* Header is encoded as 0xff || 0xfe || [headersize]32, i.e., six octets */
\r
1184 hcryp->Init.pScratch[bufferidx++] = 0xFF;
\r
1185 hcryp->Init.pScratch[bufferidx++] = 0xFE;
\r
1186 hcryp->Init.pScratch[bufferidx++] = headersize & 0xff000000;
\r
1187 hcryp->Init.pScratch[bufferidx++] = headersize & 0x00ff0000;
\r
1188 hcryp->Init.pScratch[bufferidx++] = headersize & 0x0000ff00;
\r
1189 hcryp->Init.pScratch[bufferidx++] = headersize & 0x000000ff;
\r
1192 /* Copy the header buffer in internal buffer "hcryp->Init.pScratch" */
\r
1193 for(loopcounter = 0; loopcounter < headersize; loopcounter++)
\r
1195 hcryp->Init.pScratch[bufferidx++] = hcryp->Init.Header[loopcounter];
\r
1197 /* Check if the header size is modulo 16 */
\r
1198 if ((headersize % 16) != 0)
\r
1200 /* Padd the header buffer with 0s till the hcryp->Init.pScratch length is modulo 16 */
\r
1201 for(loopcounter = headersize; loopcounter <= ((headersize/16) + 1) * 16; loopcounter++)
\r
1203 hcryp->Init.pScratch[loopcounter] = 0;
\r
1205 /* Set the header size to modulo 16 */
\r
1206 headersize = ((headersize/16) + 1) * 16;
\r
1208 /* Set the pointer headeraddr to hcryp->Init.pScratch */
\r
1209 headeraddr = (uint32_t)hcryp->Init.pScratch;
\r
1211 /*********************** Formatting the block B0 **************************/
\r
1212 if(headersize != 0)
\r
1214 blockb0[0] = 0x40;
\r
1217 /* blockb0[0] |= 0u | (((( (uint8_t) hcryp->Init.TagSize - 2) / 2) & 0x07 ) << 3 ) | ( ( (uint8_t) (15 - hcryp->Init.IVSize) - 1) & 0x07) */
\r
1218 blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)(((uint8_t)(hcryp->Init.TagSize - (uint8_t)(2))) >> 1) & (uint8_t)0x07 ) << 3);
\r
1219 blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)((uint8_t)(15) - hcryp->Init.IVSize) - (uint8_t)1) & (uint8_t)0x07);
\r
1221 for (loopcounter = 0; loopcounter < hcryp->Init.IVSize; loopcounter++)
\r
1223 blockb0[loopcounter+1] = hcryp->Init.pInitVect[loopcounter];
\r
1225 for ( ; loopcounter < 13; loopcounter++)
\r
1227 blockb0[loopcounter+1] = 0;
\r
1230 blockb0[14] = (Size >> 8);
\r
1231 blockb0[15] = (Size & 0xFF);
\r
1233 /************************* Formatting the initial counter *****************/
\r
1235 Bits 7 and 6 are reserved and shall be set to 0
\r
1236 Bits 3, 4, and 5 shall also be set to 0, to ensure that all the counter
\r
1237 blocks are distinct from B0
\r
1238 Bits 0, 1, and 2 contain the same encoding of q as in B0
\r
1240 ctr[0] = blockb0[0] & 0x07;
\r
1241 /* byte 1 to NonceSize is the IV (Nonce) */
\r
1242 for(loopcounter = 1; loopcounter < hcryp->Init.IVSize + 1; loopcounter++)
\r
1244 ctr[loopcounter] = blockb0[loopcounter];
\r
1246 /* Set the LSB to 1 */
\r
1250 CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
\r
1252 /* Set the CRYP peripheral in AES CCM mode */
\r
1253 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CCM_DECRYPT);
\r
1255 /* Set the Initialization Vector */
\r
1256 CRYPEx_GCMCCM_SetInitVector(hcryp, ctr);
\r
1258 /* Select init phase */
\r
1259 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT);
\r
1261 b0addr = (uint32_t)blockb0;
\r
1262 /* Write the blockb0 block in the IN FIFO */
\r
1263 hcryp->Instance->DR = *(uint32_t*)(b0addr);
\r
1265 hcryp->Instance->DR = *(uint32_t*)(b0addr);
\r
1267 hcryp->Instance->DR = *(uint32_t*)(b0addr);
\r
1269 hcryp->Instance->DR = *(uint32_t*)(b0addr);
\r
1271 /* Enable the CRYP peripheral */
\r
1272 __HAL_CRYP_ENABLE(hcryp);
\r
1275 tickstart = HAL_GetTick();
\r
1277 while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
\r
1279 /* Check for the Timeout */
\r
1280 if(Timeout != HAL_MAX_DELAY)
\r
1282 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
\r
1284 /* Change state */
\r
1285 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
\r
1287 /* Process Unlocked */
\r
1288 __HAL_UNLOCK(hcryp);
\r
1290 return HAL_TIMEOUT;
\r
1294 /***************************** Header phase *******************************/
\r
1295 if(headersize != 0)
\r
1297 /* Select header phase */
\r
1298 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER);
\r
1300 /* Enable Crypto processor */
\r
1301 __HAL_CRYP_ENABLE(hcryp);
\r
1303 for(loopcounter = 0; (loopcounter < headersize); loopcounter+=16)
\r
1306 tickstart = HAL_GetTick();
\r
1308 while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_IFEM))
\r
1310 /* Check for the Timeout */
\r
1311 if(Timeout != HAL_MAX_DELAY)
\r
1313 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
\r
1315 /* Change state */
\r
1316 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
\r
1318 /* Process Unlocked */
\r
1319 __HAL_UNLOCK(hcryp);
\r
1321 return HAL_TIMEOUT;
\r
1325 /* Write the header block in the IN FIFO */
\r
1326 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
\r
1328 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
\r
1330 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
\r
1332 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
\r
1337 tickstart = HAL_GetTick();
\r
1339 while((hcryp->Instance->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY)
\r
1341 /* Check for the Timeout */
\r
1342 if(Timeout != HAL_MAX_DELAY)
\r
1344 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
\r
1346 /* Change state */
\r
1347 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
\r
1349 /* Process Unlocked */
\r
1350 __HAL_UNLOCK(hcryp);
\r
1352 return HAL_TIMEOUT;
\r
1357 /* Save formatted counter into the scratch buffer pScratch */
\r
1358 for(loopcounter = 0; (loopcounter < 16); loopcounter++)
\r
1360 hcryp->Init.pScratch[loopcounter] = ctr[loopcounter];
\r
1363 hcryp->Init.pScratch[15] &= 0xfe;
\r
1364 /* Select payload phase once the header phase is performed */
\r
1365 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD);
\r
1368 __HAL_CRYP_FIFO_FLUSH(hcryp);
\r
1370 /* Enable the CRYP peripheral */
\r
1371 __HAL_CRYP_ENABLE(hcryp);
\r
1373 /* Set the phase */
\r
1374 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
\r
1377 /* Write Plain Data and Get Cypher Data */
\r
1378 if(CRYPEx_GCMCCM_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
\r
1380 return HAL_TIMEOUT;
\r
1383 /* Change the CRYP peripheral state */
\r
1384 hcryp->State = HAL_CRYP_STATE_READY;
\r
1386 /* Process Unlocked */
\r
1387 __HAL_UNLOCK(hcryp);
\r
1389 /* Return function status */
\r
1394 * @brief Initializes the CRYP peripheral in AES GCM encryption mode using IT.
\r
1395 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
\r
1396 * the configuration information for CRYP module
\r
1397 * @param pPlainData: Pointer to the plaintext buffer
\r
1398 * @param Size: Length of the plaintext buffer, must be a multiple of 16
\r
1399 * @param pCypherData: Pointer to the cyphertext buffer
\r
1400 * @retval HAL status
\r
1402 HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
\r
1404 uint32_t tickstart = 0;
\r
1405 uint32_t inputaddr;
\r
1406 uint32_t outputaddr;
\r
1408 if(hcryp->State == HAL_CRYP_STATE_READY)
\r
1410 /* Process Locked */
\r
1411 __HAL_LOCK(hcryp);
\r
1413 /* Get the buffer addresses and sizes */
\r
1414 hcryp->CrypInCount = Size;
\r
1415 hcryp->pCrypInBuffPtr = pPlainData;
\r
1416 hcryp->pCrypOutBuffPtr = pCypherData;
\r
1417 hcryp->CrypOutCount = Size;
\r
1419 /* Change the CRYP peripheral state */
\r
1420 hcryp->State = HAL_CRYP_STATE_BUSY;
\r
1422 /* Check if initialization phase has already been performed */
\r
1423 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
\r
1426 CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
\r
1428 /* Set the CRYP peripheral in AES GCM mode */
\r
1429 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_GCM_ENCRYPT);
\r
1431 /* Set the Initialization Vector */
\r
1432 CRYPEx_GCMCCM_SetInitVector(hcryp, hcryp->Init.pInitVect);
\r
1435 __HAL_CRYP_FIFO_FLUSH(hcryp);
\r
1437 /* Enable CRYP to start the init phase */
\r
1438 __HAL_CRYP_ENABLE(hcryp);
\r
1441 tickstart = HAL_GetTick();
\r
1443 while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
\r
1445 /* Check for the Timeout */
\r
1447 if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
\r
1449 /* Change state */
\r
1450 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
\r
1452 /* Process Unlocked */
\r
1453 __HAL_UNLOCK(hcryp);
\r
1455 return HAL_TIMEOUT;
\r
1460 /* Set the header phase */
\r
1461 if(CRYPEx_GCMCCM_SetHeaderPhase(hcryp, hcryp->Init.Header, hcryp->Init.HeaderSize, 1) != HAL_OK)
\r
1463 return HAL_TIMEOUT;
\r
1465 /* Disable the CRYP peripheral */
\r
1466 __HAL_CRYP_DISABLE(hcryp);
\r
1468 /* Select payload phase once the header phase is performed */
\r
1469 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD);
\r
1472 __HAL_CRYP_FIFO_FLUSH(hcryp);
\r
1474 /* Set the phase */
\r
1475 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
\r
1480 /* Enable Interrupts */
\r
1481 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
\r
1482 /* Enable the CRYP peripheral */
\r
1483 __HAL_CRYP_ENABLE(hcryp);
\r
1487 /* Process Locked */
\r
1488 __HAL_UNLOCK(hcryp);
\r
1489 /* Change the CRYP state and phase */
\r
1490 hcryp->State = HAL_CRYP_STATE_READY;
\r
1492 /* Return function status */
\r
1495 else if (__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
\r
1497 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
\r
1498 /* Write the Input block in the IN FIFO */
\r
1499 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
\r
1501 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
\r
1503 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
\r
1505 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
\r
1506 hcryp->pCrypInBuffPtr += 16;
\r
1507 hcryp->CrypInCount -= 16;
\r
1508 if(hcryp->CrypInCount == 0)
\r
1510 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
\r
1511 /* Call the Input data transfer complete callback */
\r
1512 HAL_CRYP_InCpltCallback(hcryp);
\r
1515 else if (__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
\r
1517 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
\r
1518 /* Read the Output block from the Output FIFO */
\r
1519 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
\r
1521 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
\r
1523 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
\r
1525 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
\r
1526 hcryp->pCrypOutBuffPtr += 16;
\r
1527 hcryp->CrypOutCount -= 16;
\r
1528 if(hcryp->CrypOutCount == 0)
\r
1530 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
\r
1531 /* Process Unlocked */
\r
1532 __HAL_UNLOCK(hcryp);
\r
1533 /* Change the CRYP peripheral state */
\r
1534 hcryp->State = HAL_CRYP_STATE_READY;
\r
1535 /* Call Input transfer complete callback */
\r
1536 HAL_CRYP_OutCpltCallback(hcryp);
\r
1540 /* Return function status */
\r
1545 * @brief Initializes the CRYP peripheral in AES CCM encryption mode using interrupt.
\r
1546 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
\r
1547 * the configuration information for CRYP module
\r
1548 * @param pPlainData: Pointer to the plaintext buffer
\r
1549 * @param Size: Length of the plaintext buffer, must be a multiple of 16
\r
1550 * @param pCypherData: Pointer to the cyphertext buffer
\r
1551 * @retval HAL status
\r
1553 HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
\r
1555 uint32_t tickstart = 0;
\r
1556 uint32_t inputaddr;
\r
1557 uint32_t outputaddr;
\r
1559 uint32_t headersize = hcryp->Init.HeaderSize;
\r
1560 uint32_t headeraddr = (uint32_t)hcryp->Init.Header;
\r
1561 uint32_t loopcounter = 0;
\r
1562 uint32_t bufferidx = 0;
\r
1563 uint8_t blockb0[16] = {0};/* Block B0 */
\r
1564 uint8_t ctr[16] = {0}; /* Counter */
\r
1565 uint32_t b0addr = (uint32_t)blockb0;
\r
1567 if(hcryp->State == HAL_CRYP_STATE_READY)
\r
1569 /* Process Locked */
\r
1570 __HAL_LOCK(hcryp);
\r
1572 hcryp->CrypInCount = Size;
\r
1573 hcryp->pCrypInBuffPtr = pPlainData;
\r
1574 hcryp->pCrypOutBuffPtr = pCypherData;
\r
1575 hcryp->CrypOutCount = Size;
\r
1577 /* Change the CRYP peripheral state */
\r
1578 hcryp->State = HAL_CRYP_STATE_BUSY;
\r
1580 /* Check if initialization phase has already been performed */
\r
1581 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
\r
1583 /************************ Formatting the header block *******************/
\r
1584 if(headersize != 0)
\r
1586 /* Check that the associated data (or header) length is lower than 2^16 - 2^8 = 65536 - 256 = 65280 */
\r
1587 if(headersize < 65280)
\r
1589 hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize >> 8) & 0xFF);
\r
1590 hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize) & 0xFF);
\r
1595 /* Header is encoded as 0xff || 0xfe || [headersize]32, i.e., six octets */
\r
1596 hcryp->Init.pScratch[bufferidx++] = 0xFF;
\r
1597 hcryp->Init.pScratch[bufferidx++] = 0xFE;
\r
1598 hcryp->Init.pScratch[bufferidx++] = headersize & 0xff000000;
\r
1599 hcryp->Init.pScratch[bufferidx++] = headersize & 0x00ff0000;
\r
1600 hcryp->Init.pScratch[bufferidx++] = headersize & 0x0000ff00;
\r
1601 hcryp->Init.pScratch[bufferidx++] = headersize & 0x000000ff;
\r
1604 /* Copy the header buffer in internal buffer "hcryp->Init.pScratch" */
\r
1605 for(loopcounter = 0; loopcounter < headersize; loopcounter++)
\r
1607 hcryp->Init.pScratch[bufferidx++] = hcryp->Init.Header[loopcounter];
\r
1609 /* Check if the header size is modulo 16 */
\r
1610 if ((headersize % 16) != 0)
\r
1612 /* Padd the header buffer with 0s till the hcryp->Init.pScratch length is modulo 16 */
\r
1613 for(loopcounter = headersize; loopcounter <= ((headersize/16) + 1) * 16; loopcounter++)
\r
1615 hcryp->Init.pScratch[loopcounter] = 0;
\r
1617 /* Set the header size to modulo 16 */
\r
1618 headersize = ((headersize/16) + 1) * 16;
\r
1620 /* Set the pointer headeraddr to hcryp->Init.pScratch */
\r
1621 headeraddr = (uint32_t)hcryp->Init.pScratch;
\r
1623 /*********************** Formatting the block B0 ************************/
\r
1624 if(headersize != 0)
\r
1626 blockb0[0] = 0x40;
\r
1629 /* blockb0[0] |= 0u | (((( (uint8_t) hcryp->Init.TagSize - 2) / 2) & 0x07 ) << 3 ) | ( ( (uint8_t) (15 - hcryp->Init.IVSize) - 1) & 0x07) */
\r
1630 blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)(((uint8_t)(hcryp->Init.TagSize - (uint8_t)(2))) >> 1) & (uint8_t)0x07 ) << 3);
\r
1631 blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)((uint8_t)(15) - hcryp->Init.IVSize) - (uint8_t)1) & (uint8_t)0x07);
\r
1633 for (loopcounter = 0; loopcounter < hcryp->Init.IVSize; loopcounter++)
\r
1635 blockb0[loopcounter+1] = hcryp->Init.pInitVect[loopcounter];
\r
1637 for ( ; loopcounter < 13; loopcounter++)
\r
1639 blockb0[loopcounter+1] = 0;
\r
1642 blockb0[14] = (Size >> 8);
\r
1643 blockb0[15] = (Size & 0xFF);
\r
1645 /************************* Formatting the initial counter ***************/
\r
1647 Bits 7 and 6 are reserved and shall be set to 0
\r
1648 Bits 3, 4, and 5 shall also be set to 0, to ensure that all the counter
\r
1649 blocks are distinct from B0
\r
1650 Bits 0, 1, and 2 contain the same encoding of q as in B0
\r
1652 ctr[0] = blockb0[0] & 0x07;
\r
1653 /* byte 1 to NonceSize is the IV (Nonce) */
\r
1654 for(loopcounter = 1; loopcounter < hcryp->Init.IVSize + 1; loopcounter++)
\r
1656 ctr[loopcounter] = blockb0[loopcounter];
\r
1658 /* Set the LSB to 1 */
\r
1662 CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
\r
1664 /* Set the CRYP peripheral in AES CCM mode */
\r
1665 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CCM_ENCRYPT);
\r
1667 /* Set the Initialization Vector */
\r
1668 CRYPEx_GCMCCM_SetInitVector(hcryp, ctr);
\r
1670 /* Select init phase */
\r
1671 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT);
\r
1673 b0addr = (uint32_t)blockb0;
\r
1674 /* Write the blockb0 block in the IN FIFO */
\r
1675 hcryp->Instance->DR = *(uint32_t*)(b0addr);
\r
1677 hcryp->Instance->DR = *(uint32_t*)(b0addr);
\r
1679 hcryp->Instance->DR = *(uint32_t*)(b0addr);
\r
1681 hcryp->Instance->DR = *(uint32_t*)(b0addr);
\r
1683 /* Enable the CRYP peripheral */
\r
1684 __HAL_CRYP_ENABLE(hcryp);
\r
1687 tickstart = HAL_GetTick();
\r
1689 while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
\r
1691 /* Check for the Timeout */
\r
1692 if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
\r
1694 /* Change state */
\r
1695 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
\r
1697 /* Process Unlocked */
\r
1698 __HAL_UNLOCK(hcryp);
\r
1700 return HAL_TIMEOUT;
\r
1703 /***************************** Header phase *****************************/
\r
1704 if(headersize != 0)
\r
1706 /* Select header phase */
\r
1707 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER);
\r
1709 /* Enable Crypto processor */
\r
1710 __HAL_CRYP_ENABLE(hcryp);
\r
1712 for(loopcounter = 0; (loopcounter < headersize); loopcounter+=16)
\r
1715 tickstart = HAL_GetTick();
\r
1717 while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_IFEM))
\r
1719 /* Check for the Timeout */
\r
1720 if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
\r
1722 /* Change state */
\r
1723 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
\r
1725 /* Process Unlocked */
\r
1726 __HAL_UNLOCK(hcryp);
\r
1728 return HAL_TIMEOUT;
\r
1731 /* Write the header block in the IN FIFO */
\r
1732 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
\r
1734 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
\r
1736 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
\r
1738 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
\r
1743 tickstart = HAL_GetTick();
\r
1745 while((hcryp->Instance->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY)
\r
1747 /* Check for the Timeout */
\r
1748 if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
\r
1750 /* Change state */
\r
1751 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
\r
1753 /* Process Unlocked */
\r
1754 __HAL_UNLOCK(hcryp);
\r
1756 return HAL_TIMEOUT;
\r
1760 /* Save formatted counter into the scratch buffer pScratch */
\r
1761 for(loopcounter = 0; (loopcounter < 16); loopcounter++)
\r
1763 hcryp->Init.pScratch[loopcounter] = ctr[loopcounter];
\r
1766 hcryp->Init.pScratch[15] &= 0xfe;
\r
1768 /* Select payload phase once the header phase is performed */
\r
1769 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD);
\r
1772 __HAL_CRYP_FIFO_FLUSH(hcryp);
\r
1774 /* Set the phase */
\r
1775 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
\r
1780 /* Enable Interrupts */
\r
1781 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
\r
1782 /* Enable the CRYP peripheral */
\r
1783 __HAL_CRYP_ENABLE(hcryp);
\r
1787 /* Change the CRYP state and phase */
\r
1788 hcryp->State = HAL_CRYP_STATE_READY;
\r
1791 /* Return function status */
\r
1794 else if (__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
\r
1796 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
\r
1797 /* Write the Input block in the IN FIFO */
\r
1798 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
\r
1800 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
\r
1802 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
\r
1804 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
\r
1805 hcryp->pCrypInBuffPtr += 16;
\r
1806 hcryp->CrypInCount -= 16;
\r
1807 if(hcryp->CrypInCount == 0)
\r
1809 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
\r
1810 /* Call Input transfer complete callback */
\r
1811 HAL_CRYP_InCpltCallback(hcryp);
\r
1814 else if (__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
\r
1816 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
\r
1817 /* Read the Output block from the Output FIFO */
\r
1818 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
\r
1820 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
\r
1822 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
\r
1824 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
\r
1825 hcryp->pCrypOutBuffPtr += 16;
\r
1826 hcryp->CrypOutCount -= 16;
\r
1827 if(hcryp->CrypOutCount == 0)
\r
1829 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
\r
1830 /* Process Unlocked */
\r
1831 __HAL_UNLOCK(hcryp);
\r
1832 /* Change the CRYP peripheral state */
\r
1833 hcryp->State = HAL_CRYP_STATE_READY;
\r
1834 /* Call Input transfer complete callback */
\r
1835 HAL_CRYP_OutCpltCallback(hcryp);
\r
1839 /* Return function status */
\r
1844 * @brief Initializes the CRYP peripheral in AES GCM decryption mode using IT.
\r
1845 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
\r
1846 * the configuration information for CRYP module
\r
1847 * @param pCypherData: Pointer to the cyphertext buffer
\r
1848 * @param Size: Length of the cyphertext buffer, must be a multiple of 16
\r
1849 * @param pPlainData: Pointer to the plaintext buffer
\r
1850 * @retval HAL status
\r
1852 HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
\r
1854 uint32_t tickstart = 0;
\r
1855 uint32_t inputaddr;
\r
1856 uint32_t outputaddr;
\r
1858 if(hcryp->State == HAL_CRYP_STATE_READY)
\r
1860 /* Process Locked */
\r
1861 __HAL_LOCK(hcryp);
\r
1863 /* Get the buffer addresses and sizes */
\r
1864 hcryp->CrypInCount = Size;
\r
1865 hcryp->pCrypInBuffPtr = pCypherData;
\r
1866 hcryp->pCrypOutBuffPtr = pPlainData;
\r
1867 hcryp->CrypOutCount = Size;
\r
1869 /* Change the CRYP peripheral state */
\r
1870 hcryp->State = HAL_CRYP_STATE_BUSY;
\r
1872 /* Check if initialization phase has already been performed */
\r
1873 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
\r
1876 CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
\r
1878 /* Set the CRYP peripheral in AES GCM decryption mode */
\r
1879 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_GCM_DECRYPT);
\r
1881 /* Set the Initialization Vector */
\r
1882 CRYPEx_GCMCCM_SetInitVector(hcryp, hcryp->Init.pInitVect);
\r
1885 __HAL_CRYP_FIFO_FLUSH(hcryp);
\r
1887 /* Enable CRYP to start the init phase */
\r
1888 __HAL_CRYP_ENABLE(hcryp);
\r
1891 tickstart = HAL_GetTick();
\r
1893 while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
\r
1895 /* Check for the Timeout */
\r
1896 if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
\r
1898 /* Change state */
\r
1899 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
\r
1901 /* Process Unlocked */
\r
1902 __HAL_UNLOCK(hcryp);
\r
1904 return HAL_TIMEOUT;
\r
1908 /* Set the header phase */
\r
1909 if(CRYPEx_GCMCCM_SetHeaderPhase(hcryp, hcryp->Init.Header, hcryp->Init.HeaderSize, 1) != HAL_OK)
\r
1911 return HAL_TIMEOUT;
\r
1913 /* Disable the CRYP peripheral */
\r
1914 __HAL_CRYP_DISABLE(hcryp);
\r
1916 /* Select payload phase once the header phase is performed */
\r
1917 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD);
\r
1919 /* Set the phase */
\r
1920 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
\r
1925 /* Enable Interrupts */
\r
1926 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
\r
1927 /* Enable the CRYP peripheral */
\r
1928 __HAL_CRYP_ENABLE(hcryp);
\r
1932 /* Process Locked */
\r
1933 __HAL_UNLOCK(hcryp);
\r
1934 /* Change the CRYP state and phase */
\r
1935 hcryp->State = HAL_CRYP_STATE_READY;
\r
1938 /* Return function status */
\r
1941 else if (__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
\r
1943 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
\r
1944 /* Write the Input block in the IN FIFO */
\r
1945 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
\r
1947 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
\r
1949 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
\r
1951 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
\r
1952 hcryp->pCrypInBuffPtr += 16;
\r
1953 hcryp->CrypInCount -= 16;
\r
1954 if(hcryp->CrypInCount == 0)
\r
1956 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
\r
1957 /* Call the Input data transfer complete callback */
\r
1958 HAL_CRYP_InCpltCallback(hcryp);
\r
1961 else if (__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
\r
1963 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
\r
1964 /* Read the Output block from the Output FIFO */
\r
1965 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
\r
1967 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
\r
1969 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
\r
1971 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
\r
1972 hcryp->pCrypOutBuffPtr += 16;
\r
1973 hcryp->CrypOutCount -= 16;
\r
1974 if(hcryp->CrypOutCount == 0)
\r
1976 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
\r
1977 /* Process Unlocked */
\r
1978 __HAL_UNLOCK(hcryp);
\r
1979 /* Change the CRYP peripheral state */
\r
1980 hcryp->State = HAL_CRYP_STATE_READY;
\r
1981 /* Call Input transfer complete callback */
\r
1982 HAL_CRYP_OutCpltCallback(hcryp);
\r
1986 /* Return function status */
\r
1991 * @brief Initializes the CRYP peripheral in AES CCM decryption mode using interrupt
\r
1992 * then decrypted pCypherData. The cypher data are available in pPlainData.
\r
1993 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
\r
1994 * the configuration information for CRYP module
\r
1995 * @param pCypherData: Pointer to the cyphertext buffer
\r
1996 * @param Size: Length of the plaintext buffer, must be a multiple of 16
\r
1997 * @param pPlainData: Pointer to the plaintext buffer
\r
1998 * @retval HAL status
\r
2000 HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
\r
2002 uint32_t inputaddr;
\r
2003 uint32_t outputaddr;
\r
2004 uint32_t tickstart = 0;
\r
2005 uint32_t headersize = hcryp->Init.HeaderSize;
\r
2006 uint32_t headeraddr = (uint32_t)hcryp->Init.Header;
\r
2007 uint32_t loopcounter = 0;
\r
2008 uint32_t bufferidx = 0;
\r
2009 uint8_t blockb0[16] = {0};/* Block B0 */
\r
2010 uint8_t ctr[16] = {0}; /* Counter */
\r
2011 uint32_t b0addr = (uint32_t)blockb0;
\r
2013 if(hcryp->State == HAL_CRYP_STATE_READY)
\r
2015 /* Process Locked */
\r
2016 __HAL_LOCK(hcryp);
\r
2018 hcryp->CrypInCount = Size;
\r
2019 hcryp->pCrypInBuffPtr = pCypherData;
\r
2020 hcryp->pCrypOutBuffPtr = pPlainData;
\r
2021 hcryp->CrypOutCount = Size;
\r
2023 /* Change the CRYP peripheral state */
\r
2024 hcryp->State = HAL_CRYP_STATE_BUSY;
\r
2026 /* Check if initialization phase has already been performed */
\r
2027 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
\r
2029 /************************ Formatting the header block *******************/
\r
2030 if(headersize != 0)
\r
2032 /* Check that the associated data (or header) length is lower than 2^16 - 2^8 = 65536 - 256 = 65280 */
\r
2033 if(headersize < 65280)
\r
2035 hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize >> 8) & 0xFF);
\r
2036 hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize) & 0xFF);
\r
2041 /* Header is encoded as 0xff || 0xfe || [headersize]32, i.e., six octets */
\r
2042 hcryp->Init.pScratch[bufferidx++] = 0xFF;
\r
2043 hcryp->Init.pScratch[bufferidx++] = 0xFE;
\r
2044 hcryp->Init.pScratch[bufferidx++] = headersize & 0xff000000;
\r
2045 hcryp->Init.pScratch[bufferidx++] = headersize & 0x00ff0000;
\r
2046 hcryp->Init.pScratch[bufferidx++] = headersize & 0x0000ff00;
\r
2047 hcryp->Init.pScratch[bufferidx++] = headersize & 0x000000ff;
\r
2050 /* Copy the header buffer in internal buffer "hcryp->Init.pScratch" */
\r
2051 for(loopcounter = 0; loopcounter < headersize; loopcounter++)
\r
2053 hcryp->Init.pScratch[bufferidx++] = hcryp->Init.Header[loopcounter];
\r
2055 /* Check if the header size is modulo 16 */
\r
2056 if ((headersize % 16) != 0)
\r
2058 /* Padd the header buffer with 0s till the hcryp->Init.pScratch length is modulo 16 */
\r
2059 for(loopcounter = headersize; loopcounter <= ((headersize/16) + 1) * 16; loopcounter++)
\r
2061 hcryp->Init.pScratch[loopcounter] = 0;
\r
2063 /* Set the header size to modulo 16 */
\r
2064 headersize = ((headersize/16) + 1) * 16;
\r
2066 /* Set the pointer headeraddr to hcryp->Init.pScratch */
\r
2067 headeraddr = (uint32_t)hcryp->Init.pScratch;
\r
2069 /*********************** Formatting the block B0 ************************/
\r
2070 if(headersize != 0)
\r
2072 blockb0[0] = 0x40;
\r
2075 /* blockb0[0] |= 0u | (((( (uint8_t) hcryp->Init.TagSize - 2) / 2) & 0x07 ) << 3 ) | ( ( (uint8_t) (15 - hcryp->Init.IVSize) - 1) & 0x07) */
\r
2076 blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)(((uint8_t)(hcryp->Init.TagSize - (uint8_t)(2))) >> 1) & (uint8_t)0x07 ) << 3);
\r
2077 blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)((uint8_t)(15) - hcryp->Init.IVSize) - (uint8_t)1) & (uint8_t)0x07);
\r
2079 for (loopcounter = 0; loopcounter < hcryp->Init.IVSize; loopcounter++)
\r
2081 blockb0[loopcounter+1] = hcryp->Init.pInitVect[loopcounter];
\r
2083 for ( ; loopcounter < 13; loopcounter++)
\r
2085 blockb0[loopcounter+1] = 0;
\r
2088 blockb0[14] = (Size >> 8);
\r
2089 blockb0[15] = (Size & 0xFF);
\r
2091 /************************* Formatting the initial counter ***************/
\r
2093 Bits 7 and 6 are reserved and shall be set to 0
\r
2094 Bits 3, 4, and 5 shall also be set to 0, to ensure that all the counter
\r
2095 blocks are distinct from B0
\r
2096 Bits 0, 1, and 2 contain the same encoding of q as in B0
\r
2098 ctr[0] = blockb0[0] & 0x07;
\r
2099 /* byte 1 to NonceSize is the IV (Nonce) */
\r
2100 for(loopcounter = 1; loopcounter < hcryp->Init.IVSize + 1; loopcounter++)
\r
2102 ctr[loopcounter] = blockb0[loopcounter];
\r
2104 /* Set the LSB to 1 */
\r
2108 CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
\r
2110 /* Set the CRYP peripheral in AES CCM mode */
\r
2111 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CCM_DECRYPT);
\r
2113 /* Set the Initialization Vector */
\r
2114 CRYPEx_GCMCCM_SetInitVector(hcryp, ctr);
\r
2116 /* Select init phase */
\r
2117 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT);
\r
2119 b0addr = (uint32_t)blockb0;
\r
2120 /* Write the blockb0 block in the IN FIFO */
\r
2121 hcryp->Instance->DR = *(uint32_t*)(b0addr);
\r
2123 hcryp->Instance->DR = *(uint32_t*)(b0addr);
\r
2125 hcryp->Instance->DR = *(uint32_t*)(b0addr);
\r
2127 hcryp->Instance->DR = *(uint32_t*)(b0addr);
\r
2129 /* Enable the CRYP peripheral */
\r
2130 __HAL_CRYP_ENABLE(hcryp);
\r
2133 tickstart = HAL_GetTick();
\r
2135 while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
\r
2137 /* Check for the Timeout */
\r
2138 if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
\r
2140 /* Change state */
\r
2141 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
\r
2143 /* Process Unlocked */
\r
2144 __HAL_UNLOCK(hcryp);
\r
2146 return HAL_TIMEOUT;
\r
2149 /***************************** Header phase *****************************/
\r
2150 if(headersize != 0)
\r
2152 /* Select header phase */
\r
2153 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER);
\r
2155 /* Enable Crypto processor */
\r
2156 __HAL_CRYP_ENABLE(hcryp);
\r
2158 for(loopcounter = 0; (loopcounter < headersize); loopcounter+=16)
\r
2161 tickstart = HAL_GetTick();
\r
2163 while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_IFEM))
\r
2165 /* Check for the Timeout */
\r
2166 if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
\r
2168 /* Change state */
\r
2169 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
\r
2171 /* Process Unlocked */
\r
2172 __HAL_UNLOCK(hcryp);
\r
2174 return HAL_TIMEOUT;
\r
2177 /* Write the header block in the IN FIFO */
\r
2178 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
\r
2180 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
\r
2182 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
\r
2184 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
\r
2189 tickstart = HAL_GetTick();
\r
2191 while((hcryp->Instance->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY)
\r
2193 /* Check for the Timeout */
\r
2194 if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
\r
2196 /* Change state */
\r
2197 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
\r
2199 /* Process Unlocked */
\r
2200 __HAL_UNLOCK(hcryp);
\r
2202 return HAL_TIMEOUT;
\r
2206 /* Save formatted counter into the scratch buffer pScratch */
\r
2207 for(loopcounter = 0; (loopcounter < 16); loopcounter++)
\r
2209 hcryp->Init.pScratch[loopcounter] = ctr[loopcounter];
\r
2212 hcryp->Init.pScratch[15] &= 0xfe;
\r
2213 /* Select payload phase once the header phase is performed */
\r
2214 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD);
\r
2217 __HAL_CRYP_FIFO_FLUSH(hcryp);
\r
2219 /* Set the phase */
\r
2220 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
\r
2223 /* Enable Interrupts */
\r
2224 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
\r
2226 /* Enable the CRYP peripheral */
\r
2227 __HAL_CRYP_ENABLE(hcryp);
\r
2229 /* Return function status */
\r
2232 else if (__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
\r
2234 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
\r
2235 /* Write the Input block in the IN FIFO */
\r
2236 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
\r
2238 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
\r
2240 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
\r
2242 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
\r
2243 hcryp->pCrypInBuffPtr += 16;
\r
2244 hcryp->CrypInCount -= 16;
\r
2245 if(hcryp->CrypInCount == 0)
\r
2247 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
\r
2248 /* Call the Input data transfer complete callback */
\r
2249 HAL_CRYP_InCpltCallback(hcryp);
\r
2252 else if (__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
\r
2254 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
\r
2255 /* Read the Output block from the Output FIFO */
\r
2256 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
\r
2258 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
\r
2260 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
\r
2262 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
\r
2263 hcryp->pCrypOutBuffPtr += 16;
\r
2264 hcryp->CrypOutCount -= 16;
\r
2265 if(hcryp->CrypOutCount == 0)
\r
2267 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
\r
2268 /* Process Unlocked */
\r
2269 __HAL_UNLOCK(hcryp);
\r
2270 /* Change the CRYP peripheral state */
\r
2271 hcryp->State = HAL_CRYP_STATE_READY;
\r
2272 /* Call Input transfer complete callback */
\r
2273 HAL_CRYP_OutCpltCallback(hcryp);
\r
2277 /* Return function status */
\r
2282 * @brief Initializes the CRYP peripheral in AES GCM encryption mode using DMA.
\r
2283 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
\r
2284 * the configuration information for CRYP module
\r
2285 * @param pPlainData: Pointer to the plaintext buffer
\r
2286 * @param Size: Length of the plaintext buffer, must be a multiple of 16
\r
2287 * @param pCypherData: Pointer to the cyphertext buffer
\r
2288 * @retval HAL status
\r
2290 HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
\r
2292 uint32_t tickstart = 0;
\r
2293 uint32_t inputaddr;
\r
2294 uint32_t outputaddr;
\r
2296 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
\r
2298 /* Process Locked */
\r
2299 __HAL_LOCK(hcryp);
\r
2301 inputaddr = (uint32_t)pPlainData;
\r
2302 outputaddr = (uint32_t)pCypherData;
\r
2304 /* Change the CRYP peripheral state */
\r
2305 hcryp->State = HAL_CRYP_STATE_BUSY;
\r
2307 /* Check if initialization phase has already been performed */
\r
2308 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
\r
2311 CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
\r
2313 /* Set the CRYP peripheral in AES GCM mode */
\r
2314 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_GCM_ENCRYPT);
\r
2316 /* Set the Initialization Vector */
\r
2317 CRYPEx_GCMCCM_SetInitVector(hcryp, hcryp->Init.pInitVect);
\r
2320 __HAL_CRYP_FIFO_FLUSH(hcryp);
\r
2322 /* Enable CRYP to start the init phase */
\r
2323 __HAL_CRYP_ENABLE(hcryp);
\r
2326 tickstart = HAL_GetTick();
\r
2328 while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
\r
2330 /* Check for the Timeout */
\r
2331 if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
\r
2333 /* Change state */
\r
2334 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
\r
2336 /* Process Unlocked */
\r
2337 __HAL_UNLOCK(hcryp);
\r
2339 return HAL_TIMEOUT;
\r
2343 __HAL_CRYP_FIFO_FLUSH(hcryp);
\r
2345 /* Set the header phase */
\r
2346 if(CRYPEx_GCMCCM_SetHeaderPhase(hcryp, hcryp->Init.Header, hcryp->Init.HeaderSize, 1) != HAL_OK)
\r
2348 return HAL_TIMEOUT;
\r
2350 /* Disable the CRYP peripheral */
\r
2351 __HAL_CRYP_DISABLE(hcryp);
\r
2353 /* Select payload phase once the header phase is performed */
\r
2354 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD);
\r
2357 __HAL_CRYP_FIFO_FLUSH(hcryp);
\r
2359 /* Set the phase */
\r
2360 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
\r
2363 /* Set the input and output addresses and start DMA transfer */
\r
2364 CRYPEx_GCMCCM_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
\r
2366 /* Unlock process */
\r
2367 __HAL_UNLOCK(hcryp);
\r
2369 /* Return function status */
\r
2374 return HAL_ERROR;
\r
2379 * @brief Initializes the CRYP peripheral in AES CCM encryption mode using interrupt.
\r
2380 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
\r
2381 * the configuration information for CRYP module
\r
2382 * @param pPlainData: Pointer to the plaintext buffer
\r
2383 * @param Size: Length of the plaintext buffer, must be a multiple of 16
\r
2384 * @param pCypherData: Pointer to the cyphertext buffer
\r
2385 * @retval HAL status
\r
2387 HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
\r
2389 uint32_t tickstart = 0;
\r
2390 uint32_t inputaddr;
\r
2391 uint32_t outputaddr;
\r
2392 uint32_t headersize;
\r
2393 uint32_t headeraddr;
\r
2394 uint32_t loopcounter = 0;
\r
2395 uint32_t bufferidx = 0;
\r
2396 uint8_t blockb0[16] = {0};/* Block B0 */
\r
2397 uint8_t ctr[16] = {0}; /* Counter */
\r
2398 uint32_t b0addr = (uint32_t)blockb0;
\r
2400 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
\r
2402 /* Process Locked */
\r
2403 __HAL_LOCK(hcryp);
\r
2405 inputaddr = (uint32_t)pPlainData;
\r
2406 outputaddr = (uint32_t)pCypherData;
\r
2408 headersize = hcryp->Init.HeaderSize;
\r
2409 headeraddr = (uint32_t)hcryp->Init.Header;
\r
2411 hcryp->CrypInCount = Size;
\r
2412 hcryp->pCrypInBuffPtr = pPlainData;
\r
2413 hcryp->pCrypOutBuffPtr = pCypherData;
\r
2414 hcryp->CrypOutCount = Size;
\r
2416 /* Change the CRYP peripheral state */
\r
2417 hcryp->State = HAL_CRYP_STATE_BUSY;
\r
2419 /* Check if initialization phase has already been performed */
\r
2420 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
\r
2422 /************************ Formatting the header block *******************/
\r
2423 if(headersize != 0)
\r
2425 /* Check that the associated data (or header) length is lower than 2^16 - 2^8 = 65536 - 256 = 65280 */
\r
2426 if(headersize < 65280)
\r
2428 hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize >> 8) & 0xFF);
\r
2429 hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize) & 0xFF);
\r
2434 /* Header is encoded as 0xff || 0xfe || [headersize]32, i.e., six octets */
\r
2435 hcryp->Init.pScratch[bufferidx++] = 0xFF;
\r
2436 hcryp->Init.pScratch[bufferidx++] = 0xFE;
\r
2437 hcryp->Init.pScratch[bufferidx++] = headersize & 0xff000000;
\r
2438 hcryp->Init.pScratch[bufferidx++] = headersize & 0x00ff0000;
\r
2439 hcryp->Init.pScratch[bufferidx++] = headersize & 0x0000ff00;
\r
2440 hcryp->Init.pScratch[bufferidx++] = headersize & 0x000000ff;
\r
2443 /* Copy the header buffer in internal buffer "hcryp->Init.pScratch" */
\r
2444 for(loopcounter = 0; loopcounter < headersize; loopcounter++)
\r
2446 hcryp->Init.pScratch[bufferidx++] = hcryp->Init.Header[loopcounter];
\r
2448 /* Check if the header size is modulo 16 */
\r
2449 if ((headersize % 16) != 0)
\r
2451 /* Padd the header buffer with 0s till the hcryp->Init.pScratch length is modulo 16 */
\r
2452 for(loopcounter = headersize; loopcounter <= ((headersize/16) + 1) * 16; loopcounter++)
\r
2454 hcryp->Init.pScratch[loopcounter] = 0;
\r
2456 /* Set the header size to modulo 16 */
\r
2457 headersize = ((headersize/16) + 1) * 16;
\r
2459 /* Set the pointer headeraddr to hcryp->Init.pScratch */
\r
2460 headeraddr = (uint32_t)hcryp->Init.pScratch;
\r
2462 /*********************** Formatting the block B0 ************************/
\r
2463 if(headersize != 0)
\r
2465 blockb0[0] = 0x40;
\r
2468 /* blockb0[0] |= 0u | (((( (uint8_t) hcryp->Init.TagSize - 2) / 2) & 0x07 ) << 3 ) | ( ( (uint8_t) (15 - hcryp->Init.IVSize) - 1) & 0x07) */
\r
2469 blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)(((uint8_t)(hcryp->Init.TagSize - (uint8_t)(2))) >> 1) & (uint8_t)0x07 ) << 3);
\r
2470 blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)((uint8_t)(15) - hcryp->Init.IVSize) - (uint8_t)1) & (uint8_t)0x07);
\r
2472 for (loopcounter = 0; loopcounter < hcryp->Init.IVSize; loopcounter++)
\r
2474 blockb0[loopcounter+1] = hcryp->Init.pInitVect[loopcounter];
\r
2476 for ( ; loopcounter < 13; loopcounter++)
\r
2478 blockb0[loopcounter+1] = 0;
\r
2481 blockb0[14] = (Size >> 8);
\r
2482 blockb0[15] = (Size & 0xFF);
\r
2484 /************************* Formatting the initial counter ***************/
\r
2486 Bits 7 and 6 are reserved and shall be set to 0
\r
2487 Bits 3, 4, and 5 shall also be set to 0, to ensure that all the counter
\r
2488 blocks are distinct from B0
\r
2489 Bits 0, 1, and 2 contain the same encoding of q as in B0
\r
2491 ctr[0] = blockb0[0] & 0x07;
\r
2492 /* byte 1 to NonceSize is the IV (Nonce) */
\r
2493 for(loopcounter = 1; loopcounter < hcryp->Init.IVSize + 1; loopcounter++)
\r
2495 ctr[loopcounter] = blockb0[loopcounter];
\r
2497 /* Set the LSB to 1 */
\r
2501 CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
\r
2503 /* Set the CRYP peripheral in AES CCM mode */
\r
2504 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CCM_ENCRYPT);
\r
2506 /* Set the Initialization Vector */
\r
2507 CRYPEx_GCMCCM_SetInitVector(hcryp, ctr);
\r
2509 /* Select init phase */
\r
2510 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT);
\r
2512 b0addr = (uint32_t)blockb0;
\r
2513 /* Write the blockb0 block in the IN FIFO */
\r
2514 hcryp->Instance->DR = *(uint32_t*)(b0addr);
\r
2516 hcryp->Instance->DR = *(uint32_t*)(b0addr);
\r
2518 hcryp->Instance->DR = *(uint32_t*)(b0addr);
\r
2520 hcryp->Instance->DR = *(uint32_t*)(b0addr);
\r
2522 /* Enable the CRYP peripheral */
\r
2523 __HAL_CRYP_ENABLE(hcryp);
\r
2526 tickstart = HAL_GetTick();
\r
2528 while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
\r
2530 /* Check for the Timeout */
\r
2531 if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
\r
2533 /* Change state */
\r
2534 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
\r
2536 /* Process Unlocked */
\r
2537 __HAL_UNLOCK(hcryp);
\r
2539 return HAL_TIMEOUT;
\r
2542 /***************************** Header phase *****************************/
\r
2543 if(headersize != 0)
\r
2545 /* Select header phase */
\r
2546 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER);
\r
2548 /* Enable Crypto processor */
\r
2549 __HAL_CRYP_ENABLE(hcryp);
\r
2551 for(loopcounter = 0; (loopcounter < headersize); loopcounter+=16)
\r
2554 tickstart = HAL_GetTick();
\r
2556 while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_IFEM))
\r
2558 /* Check for the Timeout */
\r
2559 if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
\r
2561 /* Change state */
\r
2562 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
\r
2564 /* Process Unlocked */
\r
2565 __HAL_UNLOCK(hcryp);
\r
2567 return HAL_TIMEOUT;
\r
2570 /* Write the header block in the IN FIFO */
\r
2571 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
\r
2573 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
\r
2575 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
\r
2577 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
\r
2582 tickstart = HAL_GetTick();
\r
2584 while((hcryp->Instance->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY)
\r
2586 /* Check for the Timeout */
\r
2587 if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
\r
2589 /* Change state */
\r
2590 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
\r
2592 /* Process Unlocked */
\r
2593 __HAL_UNLOCK(hcryp);
\r
2595 return HAL_TIMEOUT;
\r
2599 /* Save formatted counter into the scratch buffer pScratch */
\r
2600 for(loopcounter = 0; (loopcounter < 16); loopcounter++)
\r
2602 hcryp->Init.pScratch[loopcounter] = ctr[loopcounter];
\r
2605 hcryp->Init.pScratch[15] &= 0xfe;
\r
2607 /* Select payload phase once the header phase is performed */
\r
2608 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD);
\r
2611 __HAL_CRYP_FIFO_FLUSH(hcryp);
\r
2613 /* Set the phase */
\r
2614 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
\r
2617 /* Set the input and output addresses and start DMA transfer */
\r
2618 CRYPEx_GCMCCM_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
\r
2620 /* Unlock process */
\r
2621 __HAL_UNLOCK(hcryp);
\r
2623 /* Return function status */
\r
2628 return HAL_ERROR;
\r
2633 * @brief Initializes the CRYP peripheral in AES GCM decryption mode using DMA.
\r
2634 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
\r
2635 * the configuration information for CRYP module
\r
2636 * @param pCypherData: Pointer to the cyphertext buffer.
\r
2637 * @param Size: Length of the cyphertext buffer, must be a multiple of 16
\r
2638 * @param pPlainData: Pointer to the plaintext buffer
\r
2639 * @retval HAL status
\r
2641 HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
\r
2643 uint32_t tickstart = 0;
\r
2644 uint32_t inputaddr;
\r
2645 uint32_t outputaddr;
\r
2647 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
\r
2649 /* Process Locked */
\r
2650 __HAL_LOCK(hcryp);
\r
2652 inputaddr = (uint32_t)pCypherData;
\r
2653 outputaddr = (uint32_t)pPlainData;
\r
2655 /* Change the CRYP peripheral state */
\r
2656 hcryp->State = HAL_CRYP_STATE_BUSY;
\r
2658 /* Check if initialization phase has already been performed */
\r
2659 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
\r
2662 CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
\r
2664 /* Set the CRYP peripheral in AES GCM decryption mode */
\r
2665 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_GCM_DECRYPT);
\r
2667 /* Set the Initialization Vector */
\r
2668 CRYPEx_GCMCCM_SetInitVector(hcryp, hcryp->Init.pInitVect);
\r
2670 /* Enable CRYP to start the init phase */
\r
2671 __HAL_CRYP_ENABLE(hcryp);
\r
2674 tickstart = HAL_GetTick();
\r
2676 while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
\r
2678 /* Check for the Timeout */
\r
2679 if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
\r
2681 /* Change state */
\r
2682 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
\r
2684 /* Process Unlocked */
\r
2685 __HAL_UNLOCK(hcryp);
\r
2687 return HAL_TIMEOUT;
\r
2691 /* Set the header phase */
\r
2692 if(CRYPEx_GCMCCM_SetHeaderPhase(hcryp, hcryp->Init.Header, hcryp->Init.HeaderSize, 1) != HAL_OK)
\r
2694 return HAL_TIMEOUT;
\r
2696 /* Disable the CRYP peripheral */
\r
2697 __HAL_CRYP_DISABLE(hcryp);
\r
2699 /* Select payload phase once the header phase is performed */
\r
2700 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD);
\r
2702 /* Set the phase */
\r
2703 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
\r
2706 /* Set the input and output addresses and start DMA transfer */
\r
2707 CRYPEx_GCMCCM_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
\r
2709 /* Unlock process */
\r
2710 __HAL_UNLOCK(hcryp);
\r
2712 /* Return function status */
\r
2717 return HAL_ERROR;
\r
2722 * @brief Initializes the CRYP peripheral in AES CCM decryption mode using DMA
\r
2723 * then decrypted pCypherData. The cypher data are available in pPlainData.
\r
2724 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
\r
2725 * the configuration information for CRYP module
\r
2726 * @param pCypherData: Pointer to the cyphertext buffer
\r
2727 * @param Size: Length of the plaintext buffer, must be a multiple of 16
\r
2728 * @param pPlainData: Pointer to the plaintext buffer
\r
2729 * @retval HAL status
\r
2731 HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
\r
2733 uint32_t tickstart = 0;
\r
2734 uint32_t inputaddr;
\r
2735 uint32_t outputaddr;
\r
2736 uint32_t headersize;
\r
2737 uint32_t headeraddr;
\r
2738 uint32_t loopcounter = 0;
\r
2739 uint32_t bufferidx = 0;
\r
2740 uint8_t blockb0[16] = {0};/* Block B0 */
\r
2741 uint8_t ctr[16] = {0}; /* Counter */
\r
2742 uint32_t b0addr = (uint32_t)blockb0;
\r
2744 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
\r
2746 /* Process Locked */
\r
2747 __HAL_LOCK(hcryp);
\r
2749 inputaddr = (uint32_t)pCypherData;
\r
2750 outputaddr = (uint32_t)pPlainData;
\r
2752 headersize = hcryp->Init.HeaderSize;
\r
2753 headeraddr = (uint32_t)hcryp->Init.Header;
\r
2755 hcryp->CrypInCount = Size;
\r
2756 hcryp->pCrypInBuffPtr = pCypherData;
\r
2757 hcryp->pCrypOutBuffPtr = pPlainData;
\r
2758 hcryp->CrypOutCount = Size;
\r
2760 /* Change the CRYP peripheral state */
\r
2761 hcryp->State = HAL_CRYP_STATE_BUSY;
\r
2763 /* Check if initialization phase has already been performed */
\r
2764 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
\r
2766 /************************ Formatting the header block *******************/
\r
2767 if(headersize != 0)
\r
2769 /* Check that the associated data (or header) length is lower than 2^16 - 2^8 = 65536 - 256 = 65280 */
\r
2770 if(headersize < 65280)
\r
2772 hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize >> 8) & 0xFF);
\r
2773 hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize) & 0xFF);
\r
2778 /* Header is encoded as 0xff || 0xfe || [headersize]32, i.e., six octets */
\r
2779 hcryp->Init.pScratch[bufferidx++] = 0xFF;
\r
2780 hcryp->Init.pScratch[bufferidx++] = 0xFE;
\r
2781 hcryp->Init.pScratch[bufferidx++] = headersize & 0xff000000;
\r
2782 hcryp->Init.pScratch[bufferidx++] = headersize & 0x00ff0000;
\r
2783 hcryp->Init.pScratch[bufferidx++] = headersize & 0x0000ff00;
\r
2784 hcryp->Init.pScratch[bufferidx++] = headersize & 0x000000ff;
\r
2787 /* Copy the header buffer in internal buffer "hcryp->Init.pScratch" */
\r
2788 for(loopcounter = 0; loopcounter < headersize; loopcounter++)
\r
2790 hcryp->Init.pScratch[bufferidx++] = hcryp->Init.Header[loopcounter];
\r
2792 /* Check if the header size is modulo 16 */
\r
2793 if ((headersize % 16) != 0)
\r
2795 /* Padd the header buffer with 0s till the hcryp->Init.pScratch length is modulo 16 */
\r
2796 for(loopcounter = headersize; loopcounter <= ((headersize/16) + 1) * 16; loopcounter++)
\r
2798 hcryp->Init.pScratch[loopcounter] = 0;
\r
2800 /* Set the header size to modulo 16 */
\r
2801 headersize = ((headersize/16) + 1) * 16;
\r
2803 /* Set the pointer headeraddr to hcryp->Init.pScratch */
\r
2804 headeraddr = (uint32_t)hcryp->Init.pScratch;
\r
2806 /*********************** Formatting the block B0 ************************/
\r
2807 if(headersize != 0)
\r
2809 blockb0[0] = 0x40;
\r
2812 /* blockb0[0] |= 0u | (((( (uint8_t) hcryp->Init.TagSize - 2) / 2) & 0x07 ) << 3 ) | ( ( (uint8_t) (15 - hcryp->Init.IVSize) - 1) & 0x07) */
\r
2813 blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)(((uint8_t)(hcryp->Init.TagSize - (uint8_t)(2))) >> 1) & (uint8_t)0x07 ) << 3);
\r
2814 blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)((uint8_t)(15) - hcryp->Init.IVSize) - (uint8_t)1) & (uint8_t)0x07);
\r
2816 for (loopcounter = 0; loopcounter < hcryp->Init.IVSize; loopcounter++)
\r
2818 blockb0[loopcounter+1] = hcryp->Init.pInitVect[loopcounter];
\r
2820 for ( ; loopcounter < 13; loopcounter++)
\r
2822 blockb0[loopcounter+1] = 0;
\r
2825 blockb0[14] = (Size >> 8);
\r
2826 blockb0[15] = (Size & 0xFF);
\r
2828 /************************* Formatting the initial counter ***************/
\r
2830 Bits 7 and 6 are reserved and shall be set to 0
\r
2831 Bits 3, 4, and 5 shall also be set to 0, to ensure that all the counter
\r
2832 blocks are distinct from B0
\r
2833 Bits 0, 1, and 2 contain the same encoding of q as in B0
\r
2835 ctr[0] = blockb0[0] & 0x07;
\r
2836 /* byte 1 to NonceSize is the IV (Nonce) */
\r
2837 for(loopcounter = 1; loopcounter < hcryp->Init.IVSize + 1; loopcounter++)
\r
2839 ctr[loopcounter] = blockb0[loopcounter];
\r
2841 /* Set the LSB to 1 */
\r
2845 CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
\r
2847 /* Set the CRYP peripheral in AES CCM mode */
\r
2848 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CCM_DECRYPT);
\r
2850 /* Set the Initialization Vector */
\r
2851 CRYPEx_GCMCCM_SetInitVector(hcryp, ctr);
\r
2853 /* Select init phase */
\r
2854 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT);
\r
2856 b0addr = (uint32_t)blockb0;
\r
2857 /* Write the blockb0 block in the IN FIFO */
\r
2858 hcryp->Instance->DR = *(uint32_t*)(b0addr);
\r
2860 hcryp->Instance->DR = *(uint32_t*)(b0addr);
\r
2862 hcryp->Instance->DR = *(uint32_t*)(b0addr);
\r
2864 hcryp->Instance->DR = *(uint32_t*)(b0addr);
\r
2866 /* Enable the CRYP peripheral */
\r
2867 __HAL_CRYP_ENABLE(hcryp);
\r
2870 tickstart = HAL_GetTick();
\r
2872 while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
\r
2874 /* Check for the Timeout */
\r
2876 if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
\r
2878 /* Change state */
\r
2879 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
\r
2881 /* Process Unlocked */
\r
2882 __HAL_UNLOCK(hcryp);
\r
2884 return HAL_TIMEOUT;
\r
2888 /***************************** Header phase *****************************/
\r
2889 if(headersize != 0)
\r
2891 /* Select header phase */
\r
2892 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER);
\r
2894 /* Enable Crypto processor */
\r
2895 __HAL_CRYP_ENABLE(hcryp);
\r
2897 for(loopcounter = 0; (loopcounter < headersize); loopcounter+=16)
\r
2900 tickstart = HAL_GetTick();
\r
2902 while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_IFEM))
\r
2904 /* Check for the Timeout */
\r
2905 if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
\r
2907 /* Change state */
\r
2908 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
\r
2910 /* Process Unlocked */
\r
2911 __HAL_UNLOCK(hcryp);
\r
2913 return HAL_TIMEOUT;
\r
2916 /* Write the header block in the IN FIFO */
\r
2917 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
\r
2919 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
\r
2921 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
\r
2923 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
\r
2928 tickstart = HAL_GetTick();
\r
2930 while((hcryp->Instance->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY)
\r
2932 /* Check for the Timeout */
\r
2933 if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
\r
2935 /* Change state */
\r
2936 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
\r
2938 /* Process Unlocked */
\r
2939 __HAL_UNLOCK(hcryp);
\r
2941 return HAL_TIMEOUT;
\r
2945 /* Save formatted counter into the scratch buffer pScratch */
\r
2946 for(loopcounter = 0; (loopcounter < 16); loopcounter++)
\r
2948 hcryp->Init.pScratch[loopcounter] = ctr[loopcounter];
\r
2951 hcryp->Init.pScratch[15] &= 0xfe;
\r
2952 /* Select payload phase once the header phase is performed */
\r
2953 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD);
\r
2956 __HAL_CRYP_FIFO_FLUSH(hcryp);
\r
2958 /* Set the phase */
\r
2959 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
\r
2961 /* Set the input and output addresses and start DMA transfer */
\r
2962 CRYPEx_GCMCCM_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
\r
2964 /* Unlock process */
\r
2965 __HAL_UNLOCK(hcryp);
\r
2967 /* Return function status */
\r
2972 return HAL_ERROR;
\r
2980 /** @defgroup CRYPEx_Exported_Functions_Group2 CRYPEx IRQ handler management
\r
2981 * @brief CRYPEx IRQ handler.
\r
2984 ==============================================================================
\r
2985 ##### CRYPEx IRQ handler management #####
\r
2986 ==============================================================================
\r
2987 [..] This section provides CRYPEx IRQ handler function.
\r
2994 * @brief This function handles CRYPEx interrupt request.
\r
2995 * @param hcryp: pointer to a CRYPEx_HandleTypeDef structure that contains
\r
2996 * the configuration information for CRYP module
\r
2999 void HAL_CRYPEx_GCMCCM_IRQHandler(CRYP_HandleTypeDef *hcryp)
\r
3001 switch(CRYP->CR & CRYP_CR_ALGOMODE_DIRECTION)
\r
3003 case CRYP_CR_ALGOMODE_AES_GCM_ENCRYPT:
\r
3004 HAL_CRYPEx_AESGCM_Encrypt_IT(hcryp, NULL, 0, NULL);
\r
3007 case CRYP_CR_ALGOMODE_AES_GCM_DECRYPT:
\r
3008 HAL_CRYPEx_AESGCM_Decrypt_IT(hcryp, NULL, 0, NULL);
\r
3011 case CRYP_CR_ALGOMODE_AES_CCM_ENCRYPT:
\r
3012 HAL_CRYPEx_AESCCM_Encrypt_IT(hcryp, NULL, 0, NULL);
\r
3015 case CRYP_CR_ALGOMODE_AES_CCM_DECRYPT:
\r
3016 HAL_CRYPEx_AESCCM_Decrypt_IT(hcryp, NULL, 0, NULL);
\r
3031 #endif /* STM32F756xx */
\r
3033 #endif /* HAL_CRYP_MODULE_ENABLED */
\r
3043 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
\r