2 ******************************************************************************
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3 * @file stm32f7xx_hal_i2s.c
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4 * @author MCD Application Team
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7 * @brief I2S HAL module driver.
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8 * This file provides firmware functions to manage the following
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9 * functionalities of the Integrated Interchip Sound (I2S) peripheral:
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10 * + Initialization and de-initialization functions
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11 * + IO operation functions
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12 * + Peripheral State and Errors functions
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14 ===============================================================================
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15 ##### How to use this driver #####
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16 ===============================================================================
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18 The I2S HAL driver can be used as follows:
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20 (#) Declare a I2S_HandleTypeDef handle structure.
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21 (#) Initialize the I2S low level resources by implement the HAL_I2S_MspInit() API:
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22 (##) Enable the SPIx interface clock.
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23 (##) I2S pins configuration:
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24 (+++) Enable the clock for the I2S GPIOs.
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25 (+++) Configure these I2S pins as alternate function pull-up.
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26 (##) NVIC configuration if you need to use interrupt process (HAL_I2S_Transmit_IT()
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27 and HAL_I2S_Receive_IT() APIs).
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28 (+++) Configure the I2Sx interrupt priority.
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29 (+++) Enable the NVIC I2S IRQ handle.
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30 (##) DMA Configuration if you need to use DMA process (HAL_I2S_Transmit_DMA()
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31 and HAL_I2S_Receive_DMA() APIs:
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32 (+++) Declare a DMA handle structure for the Tx/Rx channel.
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33 (+++) Enable the DMAx interface clock.
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34 (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters.
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35 (+++) Configure the DMA Tx/Rx Channel.
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36 (+++) Associate the initialized DMA handle to the I2S DMA Tx/Rx handle.
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37 (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the
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40 (#) Program the Mode, Standard, Data Format, MCLK Output, Audio frequency and Polarity
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41 using HAL_I2S_Init() function.
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43 -@- The specific I2S interrupts (Transmission complete interrupt,
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44 RXNE interrupt and Error Interrupts) will be managed using the macros
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45 __HAL_I2S_ENABLE_IT() and __HAL_I2S_DISABLE_IT() inside the transmit and receive process.
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46 -@- Make sure that either:
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47 (+@) I2S clock is configured based on SYSCLK or
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48 (+@) External clock source is configured after setting correctly
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49 the define constant EXTERNAL_CLOCK_VALUE in the stm32f3xx_hal_conf.h file.
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51 (#) Three mode of operations are available within this driver :
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53 *** Polling mode IO operation ***
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54 =================================
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56 (+) Send an amount of data in blocking mode using HAL_I2S_Transmit()
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57 (+) Receive an amount of data in blocking mode using HAL_I2S_Receive()
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59 *** Interrupt mode IO operation ***
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60 ===================================
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62 (+) Send an amount of data in non blocking mode using HAL_I2S_Transmit_IT()
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63 (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can
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64 add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback
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65 (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can
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66 add his own code by customization of function pointer HAL_I2S_TxCpltCallback
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67 (+) Receive an amount of data in non blocking mode using HAL_I2S_Receive_IT()
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68 (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can
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69 add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback
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70 (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can
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71 add his own code by customization of function pointer HAL_I2S_RxCpltCallback
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72 (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can
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73 add his own code by customization of function pointer HAL_I2S_ErrorCallback
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75 *** DMA mode IO operation ***
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76 ==============================
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78 (+) Send an amount of data in non blocking mode (DMA) using HAL_I2S_Transmit_DMA()
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79 (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can
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80 add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback
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81 (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can
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82 add his own code by customization of function pointer HAL_I2S_TxCpltCallback
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83 (+) Receive an amount of data in non blocking mode (DMA) using HAL_I2S_Receive_DMA()
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84 (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can
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85 add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback
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86 (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can
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87 add his own code by customization of function pointer HAL_I2S_RxCpltCallback
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88 (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can
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89 add his own code by customization of function pointer HAL_I2S_ErrorCallback
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90 (+) Pause the DMA Transfer using HAL_I2S_DMAPause()
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91 (+) Resume the DMA Transfer using HAL_I2S_DMAResume()
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92 (+) Stop the DMA Transfer using HAL_I2S_DMAStop()
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94 *** I2S HAL driver macros list ***
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95 =============================================
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97 Below the list of most used macros in I2S HAL driver.
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99 (+) __HAL_I2S_ENABLE: Enable the specified SPI peripheral (in I2S mode)
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100 (+) __HAL_I2S_DISABLE: Disable the specified SPI peripheral (in I2S mode)
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101 (+) __HAL_I2S_ENABLE_IT : Enable the specified I2S interrupts
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102 (+) __HAL_I2S_DISABLE_IT : Disable the specified I2S interrupts
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103 (+) __HAL_I2S_GET_FLAG: Check whether the specified I2S flag is set or not
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106 (@) You can refer to the I2S HAL driver header file for more useful macros
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109 ******************************************************************************
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112 * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
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114 * Redistribution and use in source and binary forms, with or without modification,
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115 * are permitted provided that the following conditions are met:
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116 * 1. Redistributions of source code must retain the above copyright notice,
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117 * this list of conditions and the following disclaimer.
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118 * 2. Redistributions in binary form must reproduce the above copyright notice,
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119 * this list of conditions and the following disclaimer in the documentation
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120 * and/or other materials provided with the distribution.
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121 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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122 * may be used to endorse or promote products derived from this software
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123 * without specific prior written permission.
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125 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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126 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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127 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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128 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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129 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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130 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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131 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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132 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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133 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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134 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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136 ******************************************************************************
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139 /* Includes ------------------------------------------------------------------*/
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140 #include "stm32f7xx_hal.h"
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142 /** @addtogroup STM32F7xx_HAL_Driver
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146 /** @defgroup I2S I2S
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147 * @brief I2S HAL module driver
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151 #ifdef HAL_I2S_MODULE_ENABLED
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153 /* Private typedef -----------------------------------------------------------*/
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154 /* Private define ------------------------------------------------------------*/
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155 /* Private macro -------------------------------------------------------------*/
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156 /* Private variables ---------------------------------------------------------*/
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157 /* Private function prototypes -----------------------------------------------*/
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158 /** @defgroup I2S_Private_Functions I2S Private Functions
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161 static void I2S_DMATxCplt(DMA_HandleTypeDef *hdma);
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162 static void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
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163 static void I2S_DMARxCplt(DMA_HandleTypeDef *hdma);
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164 static void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
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165 static void I2S_DMAError(DMA_HandleTypeDef *hdma);
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166 static void I2S_Transmit_IT(I2S_HandleTypeDef *hi2s);
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167 static void I2S_Receive_IT(I2S_HandleTypeDef *hi2s);
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168 static uint32_t I2S_GetClockFreq(I2S_HandleTypeDef *hi2s);
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169 static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t State, uint32_t Timeout);
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174 /* Exported functions ---------------------------------------------------------*/
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176 /** @defgroup I2S_Exported_Functions I2S Exported Functions
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180 /** @defgroup I2S_Exported_Functions_Group1 Initialization and de-initialization functions
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181 * @brief Initialization and Configuration functions
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184 ===============================================================================
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185 ##### Initialization and de-initialization functions #####
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186 ===============================================================================
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187 [..] This subsection provides a set of functions allowing to initialize and
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188 de-initialize the I2Sx peripheral in simplex mode:
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190 (+) User must Implement HAL_I2S_MspInit() function in which he configures
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191 all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
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193 (+) Call the function HAL_I2S_Init() to configure the selected device with
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194 the selected configuration:
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199 (++) Audio frequency
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201 (++) Full duplex mode
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203 (+) Call the function HAL_I2S_DeInit() to restore the default configuration
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204 of the selected I2Sx peripheral.
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210 * @brief Initializes the I2S according to the specified parameters
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211 * in the I2S_InitTypeDef and create the associated handle.
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212 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
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213 * the configuration information for I2S module
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214 * @retval HAL status
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216 HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s)
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218 uint16_t tmpreg = 0, i2sdiv = 2, i2sodd = 0, packetlength = 1;
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219 uint32_t tmp = 0, i2sclk = 0;
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221 /* Check the I2S handle allocation */
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227 /* Check the parameters */
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228 assert_param(IS_I2S_ALL_INSTANCE(hi2s->Instance));
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229 assert_param(IS_I2S_MODE(hi2s->Init.Mode));
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230 assert_param(IS_I2S_STANDARD(hi2s->Init.Standard));
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231 assert_param(IS_I2S_DATA_FORMAT(hi2s->Init.DataFormat));
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232 assert_param(IS_I2S_MCLK_OUTPUT(hi2s->Init.MCLKOutput));
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233 assert_param(IS_I2S_AUDIO_FREQ(hi2s->Init.AudioFreq));
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234 assert_param(IS_I2S_CPOL(hi2s->Init.CPOL));
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235 assert_param(IS_I2S_CLOCKSOURCE(hi2s->Init.ClockSource));
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237 if(hi2s->State == HAL_I2S_STATE_RESET)
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239 /* Allocate lock resource and initialize it */
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240 hi2s->Lock = HAL_UNLOCKED;
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241 /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
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242 HAL_I2S_MspInit(hi2s);
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245 hi2s->State = HAL_I2S_STATE_BUSY;
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247 /*----------------------- SPIx I2SCFGR & I2SPR Configuration -----------------*/
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248 /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
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249 hi2s->Instance->I2SCFGR &= ~(SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CKPOL | \
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250 SPI_I2SCFGR_I2SSTD | SPI_I2SCFGR_PCMSYNC | SPI_I2SCFGR_I2SCFG | \
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251 SPI_I2SCFGR_I2SE | SPI_I2SCFGR_I2SMOD);
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252 hi2s->Instance->I2SPR = 0x0002;
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254 /* Get the I2SCFGR register value */
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255 tmpreg = hi2s->Instance->I2SCFGR;
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257 /* If the default value has to be written, reinitialize i2sdiv and i2sodd*/
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258 if(hi2s->Init.AudioFreq == I2S_AUDIOFREQ_DEFAULT)
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260 i2sodd = (uint16_t)0;
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261 i2sdiv = (uint16_t)2;
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263 /* If the requested audio frequency is not the default, compute the prescaler */
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266 /* Check the frame length (For the Prescaler computing) *******************/
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267 if(hi2s->Init.DataFormat == I2S_DATAFORMAT_16B)
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269 /* Packet length is 16 bits */
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274 /* Packet length is 32 bits */
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278 /* Get I2S source Clock frequency ****************************************/
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280 /* If an external I2S clock has to be used, the specific define should be set
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281 in the project configuration or in the stm32f3xx_conf.h file */
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282 if(hi2s->Init.ClockSource == I2S_CLOCK_EXTERNAL)
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284 /* Set the I2S clock to the external clock value */
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285 i2sclk = EXTERNAL_CLOCK_VALUE;
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289 /* Get the I2S source clock value */
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290 i2sclk = I2S_GetClockFreq(hi2s);
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293 /* Compute the Real divider depending on the MCLK output state, with a floating point */
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294 if(hi2s->Init.MCLKOutput == I2S_MCLKOUTPUT_ENABLE)
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296 /* MCLK output is enabled */
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297 tmp = (uint16_t)(((((i2sclk / 256) * 10) / hi2s->Init.AudioFreq)) + 5);
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301 /* MCLK output is disabled */
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302 tmp = (uint16_t)(((((i2sclk / (32 * packetlength)) *10 ) / hi2s->Init.AudioFreq)) + 5);
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305 /* Remove the flatting point */
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308 /* Check the parity of the divider */
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309 i2sodd = (uint16_t)(tmp & (uint16_t)0x0001);
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311 /* Compute the i2sdiv prescaler */
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312 i2sdiv = (uint16_t)((tmp - i2sodd) / 2);
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314 /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */
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315 i2sodd = (uint16_t) (i2sodd << 8);
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318 /* Test if the divider is 1 or 0 or greater than 0xFF */
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319 if((i2sdiv < 2) || (i2sdiv > 0xFF))
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321 /* Set the default values */
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326 /* Write to SPIx I2SPR register the computed value */
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327 hi2s->Instance->I2SPR = (uint16_t)((uint16_t)i2sdiv | (uint16_t)(i2sodd | (uint16_t)hi2s->Init.MCLKOutput));
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329 /* Configure the I2S with the I2S_InitStruct values */
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330 tmpreg |= (uint16_t)((uint16_t)SPI_I2SCFGR_I2SMOD | (uint16_t)(hi2s->Init.Mode | \
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331 (uint16_t)(hi2s->Init.Standard | (uint16_t)(hi2s->Init.DataFormat | \
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332 (uint16_t)hi2s->Init.CPOL))));
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334 /* Write to SPIx I2SCFGR */
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335 hi2s->Instance->I2SCFGR = tmpreg;
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337 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
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338 hi2s->State= HAL_I2S_STATE_READY;
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344 * @brief DeInitializes the I2S peripheral
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345 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
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346 * the configuration information for I2S module
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347 * @retval HAL status
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349 HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s)
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351 /* Check the I2S handle allocation */
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357 /* Check the parameters */
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358 assert_param(IS_I2S_ALL_INSTANCE(hi2s->Instance));
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360 hi2s->State = HAL_I2S_STATE_BUSY;
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362 /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
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363 HAL_I2S_MspDeInit(hi2s);
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365 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
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366 hi2s->State = HAL_I2S_STATE_RESET;
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369 __HAL_UNLOCK(hi2s);
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375 * @brief I2S MSP Init
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376 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
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377 * the configuration information for I2S module
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380 __weak void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s)
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382 /* NOTE : This function Should not be modified, when the callback is needed,
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383 the HAL_I2S_MspInit could be implemented in the user file
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388 * @brief I2S MSP DeInit
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389 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
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390 * the configuration information for I2S module
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393 __weak void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s)
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395 /* NOTE : This function Should not be modified, when the callback is needed,
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396 the HAL_I2S_MspDeInit could be implemented in the user file
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404 /** @defgroup I2S_Exported_Functions_Group2 Input and Output operation functions
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405 * @brief Data transfers functions
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408 ===============================================================================
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409 ##### IO operation functions #####
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410 ===============================================================================
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412 This subsection provides a set of functions allowing to manage the I2S data
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415 (#) There are two modes of transfer:
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416 (++) Blocking mode : The communication is performed in the polling mode.
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417 The status of all data processing is returned by the same function
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418 after finishing transfer.
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419 (++) No-Blocking mode : The communication is performed using Interrupts
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420 or DMA. These functions return the status of the transfer startup.
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421 The end of the data processing will be indicated through the
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422 dedicated I2S IRQ when using Interrupt mode or the DMA IRQ when
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425 (#) Blocking mode functions are :
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426 (++) HAL_I2S_Transmit()
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427 (++) HAL_I2S_Receive()
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429 (#) No-Blocking mode functions with Interrupt are :
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430 (++) HAL_I2S_Transmit_IT()
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431 (++) HAL_I2S_Receive_IT()
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433 (#) No-Blocking mode functions with DMA are :
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434 (++) HAL_I2S_Transmit_DMA()
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435 (++) HAL_I2S_Receive_DMA()
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437 (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
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438 (++) HAL_I2S_TxCpltCallback()
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439 (++) HAL_I2S_RxCpltCallback()
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440 (++) HAL_I2S_ErrorCallback()
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447 * @brief Transmit an amount of data in blocking mode
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448 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
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449 * the configuration information for I2S module
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450 * @param pData: a 16-bit pointer to data buffer.
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451 * @param Size: number of data sample to be sent:
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452 * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
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453 * configuration phase, the Size parameter means the number of 16-bit data length
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454 * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
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455 * the Size parameter means the number of 16-bit data length.
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456 * @param Timeout: Timeout duration
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457 * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
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458 * between Master and Slave(example: audio streaming).
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459 * @retval HAL status
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461 HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout)
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463 if((pData == NULL ) || (Size == 0))
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468 if(hi2s->State == HAL_I2S_STATE_READY)
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470 if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
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471 ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
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473 hi2s->TxXferSize = (Size << 1);
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474 hi2s->TxXferCount = (Size << 1);
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478 hi2s->TxXferSize = Size;
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479 hi2s->TxXferCount = Size;
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482 /* Process Locked */
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485 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
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486 hi2s->State = HAL_I2S_STATE_BUSY_TX;
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488 /* Check if the I2S is already enabled */
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489 if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
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491 /* Enable I2S peripheral */
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492 __HAL_I2S_ENABLE(hi2s);
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495 while(hi2s->TxXferCount > 0)
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497 hi2s->Instance->DR = (*pData++);
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498 hi2s->TxXferCount--;
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499 /* Wait until TXE flag is set */
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500 if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_TXE, SET, Timeout) != HAL_OK)
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502 /* Set the error code and execute error callback*/
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503 hi2s->ErrorCode |= HAL_I2S_ERROR_TIMEOUT;
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504 HAL_I2S_ErrorCallback(hi2s);
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505 return HAL_TIMEOUT;
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508 /* Check if an underrun occurs */
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509 if(__HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_UDR) == SET)
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511 /* Set the I2S State ready */
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512 hi2s->State = HAL_I2S_STATE_READY;
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514 /* Process Unlocked */
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515 __HAL_UNLOCK(hi2s);
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517 /* Set the error code and execute error callback*/
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518 hi2s->ErrorCode |= HAL_I2S_ERROR_UDR;
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519 HAL_I2S_ErrorCallback(hi2s);
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525 /* Wait until Busy flag is reset */
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526 if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_BSY, RESET, Timeout) != HAL_OK)
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528 /* Set the error code and execute error callback*/
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529 hi2s->ErrorCode |= HAL_I2S_ERROR_TIMEOUT;
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530 HAL_I2S_ErrorCallback(hi2s);
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531 return HAL_TIMEOUT;
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534 hi2s->State = HAL_I2S_STATE_READY;
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536 /* Process Unlocked */
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537 __HAL_UNLOCK(hi2s);
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548 * @brief Receive an amount of data in blocking mode
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549 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
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550 * the configuration information for I2S module
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551 * @param pData: a 16-bit pointer to data buffer.
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552 * @param Size: number of data sample to be sent:
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553 * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
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554 * configuration phase, the Size parameter means the number of 16-bit data length
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555 * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
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556 * the Size parameter means the number of 16-bit data length.
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557 * @param Timeout: Timeout duration
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558 * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
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559 * between Master and Slave(example: audio streaming).
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560 * @note In I2S Master Receiver mode, just after enabling the peripheral the clock will be generate
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561 * in continuous way and as the I2S is not disabled at the end of the I2S transaction.
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562 * @retval HAL status
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564 HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout)
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566 if((pData == NULL ) || (Size == 0))
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571 if(hi2s->State == HAL_I2S_STATE_READY)
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573 if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
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574 ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
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576 hi2s->RxXferSize = (Size << 1);
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577 hi2s->RxXferCount = (Size << 1);
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581 hi2s->RxXferSize = Size;
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582 hi2s->RxXferCount = Size;
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584 /* Process Locked */
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587 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
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588 hi2s->State = HAL_I2S_STATE_BUSY_RX;
\r
590 /* Check if the I2S is already enabled */
\r
591 if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
\r
593 /* Enable I2S peripheral */
\r
594 __HAL_I2S_ENABLE(hi2s);
\r
597 /* Check if Master Receiver mode is selected */
\r
598 if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX)
\r
600 /* Clear the Overrun Flag by a read operation on the SPI_DR register followed by a read
\r
601 access to the SPI_SR register. */
\r
602 __HAL_I2S_CLEAR_OVRFLAG(hi2s);
\r
606 while(hi2s->RxXferCount > 0)
\r
608 /* Wait until RXNE flag is set */
\r
609 if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_RXNE, SET, Timeout) != HAL_OK)
\r
611 /* Set the error code and execute error callback*/
\r
612 hi2s->ErrorCode |= HAL_I2S_ERROR_TIMEOUT;
\r
613 HAL_I2S_ErrorCallback(hi2s);
\r
614 return HAL_TIMEOUT;
\r
617 /* Check if an overrun occurs */
\r
618 if(__HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_OVR) == SET)
\r
620 /* Set the I2S State ready */
\r
621 hi2s->State = HAL_I2S_STATE_READY;
\r
623 /* Process Unlocked */
\r
624 __HAL_UNLOCK(hi2s);
\r
626 /* Set the error code and execute error callback*/
\r
627 hi2s->ErrorCode |= HAL_I2S_ERROR_OVR;
\r
628 HAL_I2S_ErrorCallback(hi2s);
\r
633 (*pData++) = hi2s->Instance->DR;
\r
634 hi2s->RxXferCount--;
\r
637 hi2s->State = HAL_I2S_STATE_READY;
\r
639 /* Process Unlocked */
\r
640 __HAL_UNLOCK(hi2s);
\r
651 * @brief Transmit an amount of data in non-blocking mode with Interrupt
\r
652 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
\r
653 * the configuration information for I2S module
\r
654 * @param pData: a 16-bit pointer to data buffer.
\r
655 * @param Size: number of data sample to be sent:
\r
656 * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
\r
657 * configuration phase, the Size parameter means the number of 16-bit data length
\r
658 * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
\r
659 * the Size parameter means the number of 16-bit data length.
\r
660 * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
\r
661 * between Master and Slave(example: audio streaming).
\r
662 * @retval HAL status
\r
664 HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
\r
666 if(hi2s->State == HAL_I2S_STATE_READY)
\r
668 if((pData == NULL) || (Size == 0))
\r
673 hi2s->pTxBuffPtr = pData;
\r
674 if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
\r
675 ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
\r
677 hi2s->TxXferSize = (Size << 1);
\r
678 hi2s->TxXferCount = (Size << 1);
\r
682 hi2s->TxXferSize = Size;
\r
683 hi2s->TxXferCount = Size;
\r
686 /* Process Locked */
\r
689 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
\r
690 hi2s->State = HAL_I2S_STATE_BUSY_TX;
\r
692 /* Enable TXE and ERR interrupt */
\r
693 __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
\r
695 /* Check if the I2S is already enabled */
\r
696 if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
\r
698 /* Enable I2S peripheral */
\r
699 __HAL_I2S_ENABLE(hi2s);
\r
702 /* Process Unlocked */
\r
703 __HAL_UNLOCK(hi2s);
\r
714 * @brief Receive an amount of data in non-blocking mode with Interrupt
\r
715 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
\r
716 * the configuration information for I2S module
\r
717 * @param pData: a 16-bit pointer to the Receive data buffer.
\r
718 * @param Size: number of data sample to be sent:
\r
719 * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
\r
720 * configuration phase, the Size parameter means the number of 16-bit data length
\r
721 * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
\r
722 * the Size parameter means the number of 16-bit data length.
\r
723 * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
\r
724 * between Master and Slave(example: audio streaming).
\r
725 * @note It is recommended to use DMA for the I2S receiver to avoid de-synchronisation
\r
726 * between Master and Slave otherwise the I2S interrupt should be optimized.
\r
727 * @retval HAL status
\r
729 HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
\r
731 if(hi2s->State == HAL_I2S_STATE_READY)
\r
733 if((pData == NULL) || (Size == 0))
\r
738 hi2s->pRxBuffPtr = pData;
\r
739 if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
\r
740 ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
\r
742 hi2s->RxXferSize = (Size << 1);
\r
743 hi2s->RxXferCount = (Size << 1);
\r
747 hi2s->RxXferSize = Size;
\r
748 hi2s->RxXferCount = Size;
\r
750 /* Process Locked */
\r
753 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
\r
754 hi2s->State = HAL_I2S_STATE_BUSY_RX;
\r
756 /* Enable TXE and ERR interrupt */
\r
757 __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
\r
759 /* Check if the I2S is already enabled */
\r
760 if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
\r
762 /* Enable I2S peripheral */
\r
763 __HAL_I2S_ENABLE(hi2s);
\r
766 /* Process Unlocked */
\r
767 __HAL_UNLOCK(hi2s);
\r
778 * @brief Transmit an amount of data in non-blocking mode with DMA
\r
779 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
\r
780 * the configuration information for I2S module
\r
781 * @param pData: a 16-bit pointer to the Transmit data buffer.
\r
782 * @param Size: number of data sample to be sent:
\r
783 * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
\r
784 * configuration phase, the Size parameter means the number of 16-bit data length
\r
785 * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
\r
786 * the Size parameter means the number of 16-bit data length.
\r
787 * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
\r
788 * between Master and Slave(example: audio streaming).
\r
789 * @retval HAL status
\r
791 HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
\r
795 if((pData == NULL) || (Size == 0))
\r
800 if(hi2s->State == HAL_I2S_STATE_READY)
\r
802 hi2s->pTxBuffPtr = pData;
\r
803 if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
\r
804 ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
\r
806 hi2s->TxXferSize = (Size << 1);
\r
807 hi2s->TxXferCount = (Size << 1);
\r
811 hi2s->TxXferSize = Size;
\r
812 hi2s->TxXferCount = Size;
\r
815 /* Process Locked */
\r
818 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
\r
819 hi2s->State = HAL_I2S_STATE_BUSY_TX;
\r
821 /* Set the I2S Tx DMA Half transfer complete callback */
\r
822 hi2s->hdmatx->XferHalfCpltCallback = I2S_DMATxHalfCplt;
\r
824 /* Set the I2S TxDMA transfer complete callback */
\r
825 hi2s->hdmatx->XferCpltCallback = I2S_DMATxCplt;
\r
827 /* Set the DMA error callback */
\r
828 hi2s->hdmatx->XferErrorCallback = I2S_DMAError;
\r
830 /* Enable the Tx DMA Channel */
\r
831 tmp = (uint32_t*)&pData;
\r
832 HAL_DMA_Start_IT(hi2s->hdmatx, *(uint32_t*)tmp, (uint32_t)&hi2s->Instance->DR, hi2s->TxXferSize);
\r
834 /* Check if the I2S is already enabled */
\r
835 if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
\r
837 /* Enable I2S peripheral */
\r
838 __HAL_I2S_ENABLE(hi2s);
\r
841 /* Enable Tx DMA Request */
\r
842 hi2s->Instance->CR2 |= SPI_CR2_TXDMAEN;
\r
844 /* Process Unlocked */
\r
845 __HAL_UNLOCK(hi2s);
\r
856 * @brief Receive an amount of data in non-blocking mode with DMA
\r
857 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
\r
858 * the configuration information for I2S module
\r
859 * @param pData: a 16-bit pointer to the Receive data buffer.
\r
860 * @param Size: number of data sample to be sent:
\r
861 * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
\r
862 * configuration phase, the Size parameter means the number of 16-bit data length
\r
863 * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
\r
864 * the Size parameter means the number of 16-bit data length.
\r
865 * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
\r
866 * between Master and Slave(example: audio streaming).
\r
867 * @retval HAL status
\r
869 HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
\r
873 if((pData == NULL) || (Size == 0))
\r
878 if(hi2s->State == HAL_I2S_STATE_READY)
\r
880 hi2s->pRxBuffPtr = pData;
\r
881 if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
\r
882 ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
\r
884 hi2s->RxXferSize = (Size << 1);
\r
885 hi2s->RxXferCount = (Size << 1);
\r
889 hi2s->RxXferSize = Size;
\r
890 hi2s->RxXferCount = Size;
\r
892 /* Process Locked */
\r
895 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
\r
896 hi2s->State = HAL_I2S_STATE_BUSY_RX;
\r
898 /* Set the I2S Rx DMA Half transfer complete callback */
\r
899 hi2s->hdmarx->XferHalfCpltCallback = I2S_DMARxHalfCplt;
\r
901 /* Set the I2S Rx DMA transfer complete callback */
\r
902 hi2s->hdmarx->XferCpltCallback = I2S_DMARxCplt;
\r
904 /* Set the DMA error callback */
\r
905 hi2s->hdmarx->XferErrorCallback = I2S_DMAError;
\r
907 /* Check if Master Receiver mode is selected */
\r
908 if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX)
\r
910 /* Clear the Overrun Flag by a read operation to the SPI_DR register followed by a read
\r
911 access to the SPI_SR register. */
\r
912 __HAL_I2S_CLEAR_OVRFLAG(hi2s);
\r
915 /* Enable the Rx DMA Channel */
\r
916 tmp = (uint32_t*)&pData;
\r
917 HAL_DMA_Start_IT(hi2s->hdmarx, (uint32_t)&hi2s->Instance->DR, *(uint32_t*)tmp, hi2s->RxXferSize);
\r
919 /* Check if the I2S is already enabled */
\r
920 if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
\r
922 /* Enable I2S peripheral */
\r
923 __HAL_I2S_ENABLE(hi2s);
\r
926 /* Enable Rx DMA Request */
\r
927 hi2s->Instance->CR2 |= SPI_CR2_RXDMAEN;
\r
929 /* Process Unlocked */
\r
930 __HAL_UNLOCK(hi2s);
\r
941 * @brief Pauses the audio stream playing from the Media.
\r
942 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
\r
943 * the configuration information for I2S module
\r
944 * @retval HAL status
\r
946 HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s)
\r
948 /* Process Locked */
\r
951 if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
\r
953 /* Disable the I2S DMA Tx request */
\r
954 hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN);
\r
956 else if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
\r
958 /* Disable the I2S DMA Rx request */
\r
959 hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN);
\r
961 else if(hi2s->State == HAL_I2S_STATE_BUSY_TX_RX)
\r
963 if((hi2s->Init.Mode == I2S_MODE_SLAVE_TX)||(hi2s->Init.Mode == I2S_MODE_MASTER_TX))
\r
965 /* Disable the I2S DMA Tx request */
\r
966 hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN);
\r
970 /* Disable the I2S DMA Rx request */
\r
971 hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN);
\r
975 /* Process Unlocked */
\r
976 __HAL_UNLOCK(hi2s);
\r
982 * @brief Resumes the audio stream playing from the Media.
\r
983 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
\r
984 * the configuration information for I2S module
\r
985 * @retval HAL status
\r
987 HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s)
\r
989 /* Process Locked */
\r
992 if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
\r
994 /* Enable the I2S DMA Tx request */
\r
995 SET_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN);
\r
997 else if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
\r
999 /* Enable the I2S DMA Rx request */
\r
1000 SET_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN);
\r
1003 /* If the I2S peripheral is still not enabled, enable it */
\r
1004 if(HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
\r
1006 /* Enable I2S peripheral */
\r
1007 __HAL_I2S_ENABLE(hi2s);
\r
1010 /* Process Unlocked */
\r
1011 __HAL_UNLOCK(hi2s);
\r
1017 * @brief Stops the audio stream playing from the Media.
\r
1018 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
\r
1019 * the configuration information for I2S module
\r
1020 * @retval HAL status
\r
1022 HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s)
\r
1024 /* Process Locked */
\r
1027 /* Disable the I2S Tx/Rx DMA requests */
\r
1028 CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN);
\r
1029 CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN);
\r
1031 /* Abort the I2S DMA Channel tx */
\r
1032 if(hi2s->hdmatx != NULL)
\r
1034 /* Disable the I2S DMA channel */
\r
1035 __HAL_DMA_DISABLE(hi2s->hdmatx);
\r
1036 HAL_DMA_Abort(hi2s->hdmatx);
\r
1038 /* Abort the I2S DMA Channel rx */
\r
1039 if(hi2s->hdmarx != NULL)
\r
1041 /* Disable the I2S DMA channel */
\r
1042 __HAL_DMA_DISABLE(hi2s->hdmarx);
\r
1043 HAL_DMA_Abort(hi2s->hdmarx);
\r
1046 /* Disable I2S peripheral */
\r
1047 __HAL_I2S_DISABLE(hi2s);
\r
1049 hi2s->State = HAL_I2S_STATE_READY;
\r
1051 /* Process Unlocked */
\r
1052 __HAL_UNLOCK(hi2s);
\r
1058 * @brief This function handles I2S interrupt request.
\r
1059 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
\r
1060 * the configuration information for I2S module
\r
1061 * @retval HAL status
\r
1063 void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s)
\r
1065 __IO uint32_t i2ssr = hi2s->Instance->SR;
\r
1067 if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
\r
1069 /* I2S in mode Receiver ----------------------------------------------------*/
\r
1070 if(((i2ssr & I2S_FLAG_RXNE) == I2S_FLAG_RXNE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_RXNE) != RESET))
\r
1072 I2S_Receive_IT(hi2s);
\r
1075 /* I2S Overrun error interrupt occurred -------------------------------------*/
\r
1076 if(((i2ssr & I2S_FLAG_OVR) == I2S_FLAG_OVR) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET))
\r
1078 /* Disable RXNE and ERR interrupt */
\r
1079 __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
\r
1081 /* Set the I2S State ready */
\r
1082 hi2s->State = HAL_I2S_STATE_READY;
\r
1084 /* Set the error code and execute error callback*/
\r
1085 hi2s->ErrorCode |= HAL_I2S_ERROR_OVR;
\r
1086 HAL_I2S_ErrorCallback(hi2s);
\r
1089 else if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
\r
1091 /* I2S in mode Transmitter ---------------------------------------------------*/
\r
1092 if(((i2ssr & I2S_FLAG_TXE) == I2S_FLAG_TXE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_TXE) != RESET))
\r
1094 I2S_Transmit_IT(hi2s);
\r
1097 /* I2S Underrun error interrupt occurred ------------------------------------*/
\r
1098 if(((i2ssr & I2S_FLAG_UDR) == I2S_FLAG_UDR) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET))
\r
1100 /* Disable TXE and ERR interrupt */
\r
1101 __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
\r
1103 /* Set the I2S State ready */
\r
1104 hi2s->State = HAL_I2S_STATE_READY;
\r
1106 /* Set the error code and execute error callback*/
\r
1107 hi2s->ErrorCode |= HAL_I2S_ERROR_UDR;
\r
1108 HAL_I2S_ErrorCallback(hi2s);
\r
1121 /** @addtogroup I2S_Private_Functions I2S Private Functions
\r
1125 * @brief This function handles I2S Communication Timeout.
\r
1126 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
\r
1127 * the configuration information for I2S module
\r
1128 * @param Flag: Flag checked
\r
1129 * @param State: Value of the flag expected
\r
1130 * @param Timeout: Duration of the timeout
\r
1131 * @retval HAL status
\r
1133 static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag,
\r
1134 uint32_t State, uint32_t Timeout)
\r
1136 uint32_t tickstart = 0;
\r
1139 tickstart = HAL_GetTick();
\r
1141 /* Wait until flag is set */
\r
1142 if(State == RESET)
\r
1144 while(__HAL_I2S_GET_FLAG(hi2s, Flag) == RESET)
\r
1146 if(Timeout != HAL_MAX_DELAY)
\r
1148 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
\r
1150 /* Set the I2S State ready */
\r
1151 hi2s->State= HAL_I2S_STATE_READY;
\r
1153 /* Process Unlocked */
\r
1154 __HAL_UNLOCK(hi2s);
\r
1156 return HAL_TIMEOUT;
\r
1163 while(__HAL_I2S_GET_FLAG(hi2s, Flag) != RESET)
\r
1165 if(Timeout != HAL_MAX_DELAY)
\r
1167 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
\r
1169 /* Set the I2S State ready */
\r
1170 hi2s->State= HAL_I2S_STATE_READY;
\r
1172 /* Process Unlocked */
\r
1173 __HAL_UNLOCK(hi2s);
\r
1175 return HAL_TIMEOUT;
\r
1186 /** @addtogroup I2S_Exported_Functions I2S Exported Functions
\r
1190 /** @addtogroup I2S_Exported_Functions_Group2 Input and Output operation functions
\r
1194 * @brief Tx Transfer Half completed callbacks
\r
1195 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
\r
1196 * the configuration information for I2S module
\r
1199 __weak void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s)
\r
1201 /* NOTE : This function Should not be modified, when the callback is needed,
\r
1202 the HAL_I2S_TxHalfCpltCallback could be implemented in the user file
\r
1207 * @brief Tx Transfer completed callbacks
\r
1208 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
\r
1209 * the configuration information for I2S module
\r
1212 __weak void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s)
\r
1214 /* NOTE : This function Should not be modified, when the callback is needed,
\r
1215 the HAL_I2S_TxCpltCallback could be implemented in the user file
\r
1220 * @brief Rx Transfer half completed callbacks
\r
1221 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
\r
1222 * the configuration information for I2S module
\r
1225 __weak void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s)
\r
1227 /* NOTE : This function Should not be modified, when the callback is needed,
\r
1228 the HAL_I2S_RxCpltCallback could be implemented in the user file
\r
1233 * @brief Rx Transfer completed callbacks
\r
1234 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
\r
1235 * the configuration information for I2S module
\r
1238 __weak void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s)
\r
1240 /* NOTE : This function Should not be modified, when the callback is needed,
\r
1241 the HAL_I2S_RxCpltCallback could be implemented in the user file
\r
1246 * @brief I2S error callbacks
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1247 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
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1248 * the configuration information for I2S module
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1251 __weak void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s)
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1253 /* NOTE : This function Should not be modified, when the callback is needed,
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1254 the HAL_I2S_ErrorCallback could be implemented in the user file
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1262 /** @defgroup I2S_Exported_Functions_Group3 Peripheral State and Errors functions
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1263 * @brief Peripheral State functions
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1266 ===============================================================================
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1267 ##### Peripheral State and Errors functions #####
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1268 ===============================================================================
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1270 This subsection permits to get in run-time the status of the peripheral
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1271 and the data flow.
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1278 * @brief Return the I2S state
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1279 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
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1280 * the configuration information for I2S module
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1281 * @retval HAL state
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1283 HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s)
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1285 return hi2s->State;
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1289 * @brief Return the I2S error code
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1290 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
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1291 * the configuration information for I2S module
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1292 * @retval I2S Error Code
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1294 uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s)
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1296 return hi2s->ErrorCode;
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1307 * @brief Get I2S Input Clock based on I2S source clock selection
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1308 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
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1309 * the configuration information for I2S module.
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1310 * @retval I2S Clock Input
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1312 static uint32_t I2S_GetClockFreq(I2S_HandleTypeDef *hi2s)
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1314 uint32_t tmpreg = 0;
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1315 /* This variable used to store the VCO Input (value in Hz) */
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1316 uint32_t vcoinput = 0;
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1317 /* This variable used to store the I2S_CK_x (value in Hz) */
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1318 uint32_t i2sclocksource = 0;
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1320 /* Configure I2S Clock based on I2S source clock selection */
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1322 /* I2S_CLK_x : I2S Block Clock configuration for different clock sources selected */
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1323 switch(hi2s->Init.ClockSource)
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1325 case I2S_CLOCK_SYSCLK :
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1327 /* Configure the PLLI2S division factor */
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1328 /* PLLI2S_VCO Input = PLL_SOURCE/PLLI2SM */
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1329 if((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLSOURCE_HSI)
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1331 /* In Case the PLL Source is HSI (Internal Clock) */
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1332 vcoinput = (HSI_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM));
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1336 /* In Case the PLL Source is HSE (External Clock) */
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1337 vcoinput = ((HSE_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM)));
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1340 /* PLLI2S_VCO Output = PLLI2S_VCO Input * PLLI2SN */
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1341 /* I2S_CLK(first level) = PLLI2S_VCO Output/PLLI2SR */
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1342 tmpreg = (RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> 28;
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1343 i2sclocksource = (vcoinput * ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SN) >> 6))/(tmpreg);
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1347 case I2S_CLOCK_EXTERNAL :
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1349 i2sclocksource = EXTERNAL_CLOCK_VALUE;
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1358 /* the return result is the value of I2S clock */
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1359 return i2sclocksource;
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1362 /** @addtogroup I2S_Private_Functions I2S Private Functions
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1366 * @brief DMA I2S transmit process complete callback
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1367 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
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1368 * the configuration information for the specified DMA module.
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1371 static void I2S_DMATxCplt(DMA_HandleTypeDef *hdma)
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1373 I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
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1375 if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0)
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1377 hi2s->TxXferCount = 0;
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1379 /* Disable Tx DMA Request */
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1380 hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN);
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1382 if(hi2s->State == HAL_I2S_STATE_BUSY_TX_RX)
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1384 if(hi2s->RxXferCount == 0)
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1386 hi2s->State = HAL_I2S_STATE_READY;
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1391 hi2s->State = HAL_I2S_STATE_READY;
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1394 HAL_I2S_TxCpltCallback(hi2s);
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1398 * @brief DMA I2S transmit process half complete callback
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1399 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
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1400 * the configuration information for the specified DMA module.
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1403 static void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
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1405 I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
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1407 HAL_I2S_TxHalfCpltCallback(hi2s);
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1411 * @brief DMA I2S receive process complete callback
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1412 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
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1413 * the configuration information for the specified DMA module.
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1416 static void I2S_DMARxCplt(DMA_HandleTypeDef *hdma)
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1418 I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
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1420 if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0)
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1422 /* Disable Rx DMA Request */
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1423 hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN);
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1425 hi2s->RxXferCount = 0;
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1426 if(hi2s->State == HAL_I2S_STATE_BUSY_TX_RX)
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1428 if(hi2s->TxXferCount == 0)
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1430 hi2s->State = HAL_I2S_STATE_READY;
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1435 hi2s->State = HAL_I2S_STATE_READY;
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1438 HAL_I2S_RxCpltCallback(hi2s);
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1442 * @brief DMA I2S receive process half complete callback
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1443 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
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1444 * the configuration information for the specified DMA module.
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1447 static void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
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1449 I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
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1451 HAL_I2S_RxHalfCpltCallback(hi2s);
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1455 * @brief DMA I2S communication error callback
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1456 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
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1457 * the configuration information for the specified DMA module.
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1460 static void I2S_DMAError(DMA_HandleTypeDef *hdma)
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1462 I2S_HandleTypeDef* hi2s = ( I2S_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
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1464 /* Disable Rx and Tx DMA Request */
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1465 hi2s->Instance->CR2 &= (uint32_t)(~(SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN));
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1466 hi2s->TxXferCount = 0;
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1467 hi2s->RxXferCount = 0;
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1469 hi2s->State= HAL_I2S_STATE_READY;
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1471 /* Set the error code and execute error callback*/
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1472 hi2s->ErrorCode |= HAL_I2S_ERROR_DMA;
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1473 HAL_I2S_ErrorCallback(hi2s);
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1477 * @brief Transmit an amount of data in non-blocking mode with Interrupt
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1478 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
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1479 * the configuration information for I2S module
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1482 static void I2S_Transmit_IT(I2S_HandleTypeDef *hi2s)
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1484 /* Transmit data */
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1485 hi2s->Instance->DR = (*hi2s->pTxBuffPtr++);
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1486 hi2s->TxXferCount--;
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1488 if(hi2s->TxXferCount == 0)
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1490 /* Disable TXE and ERR interrupt */
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1491 __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
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1493 hi2s->State = HAL_I2S_STATE_READY;
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1494 HAL_I2S_TxCpltCallback(hi2s);
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1499 * @brief Receive an amount of data in non-blocking mode with Interrupt
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1500 * @param hi2s: I2S handle
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1503 static void I2S_Receive_IT(I2S_HandleTypeDef *hi2s)
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1505 /* Receive data */
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1506 (*hi2s->pRxBuffPtr++) = hi2s->Instance->DR;
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1507 hi2s->RxXferCount--;
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1509 if(hi2s->RxXferCount == 0)
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1511 /* Disable RXNE and ERR interrupt */
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1512 __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
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1514 hi2s->State = HAL_I2S_STATE_READY;
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1515 HAL_I2S_RxCpltCallback(hi2s);
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1522 #endif /* HAL_I2S_MODULE_ENABLED */
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1531 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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