2 * FreeRTOS Kernel V10.2.1
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3 * Copyright (C) 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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5 * Permission is hereby granted, free of charge, to any person obtaining a copy of
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6 * this software and associated documentation files (the "Software"), to deal in
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7 * the Software without restriction, including without limitation the rights to
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8 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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9 * the Software, and to permit persons to whom the Software is furnished to do so,
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10 * subject to the following conditions:
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12 * The above copyright notice and this permission notice shall be included in all
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13 * copies or substantial portions of the Software.
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15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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17 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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18 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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19 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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20 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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22 * http://www.FreeRTOS.org
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23 * http://aws.amazon.com/freertos
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25 * 1 tab == 4 spaces!
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29 BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR UART0.
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31 ***Note*** This example uses queues to send each character into an interrupt
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32 service routine and out of an interrupt service routine individually. This
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33 is done to demonstrate queues being used in an interrupt, and to deliberately
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34 load the system to test the FreeRTOS port. It is *NOT* meant to be an
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35 example of an efficient implementation. An efficient implementation should
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36 use FIFOs or DMA if available, and only use FreeRTOS API functions when
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37 enough has been received to warrant a task being unblocked to process the
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41 /* Scheduler includes. */
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42 #include "FreeRTOS.h"
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45 #include "comtest2.h"
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47 /* Library includes. */
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50 /* Demo application includes. */
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52 /*-----------------------------------------------------------*/
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54 /* Register bit definitions. */
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55 #define serRX_INT_ENABLE 0x10
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56 #define serTX_INT_ENABLE 0x08
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57 #define serRX_ENABLE 0x02
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58 #define serTX_ENABLE 0x01
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59 #define serORE_ERROR_BIT 0x08
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60 #define serFRE_ERROR_BIT 0x10
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61 #define serPE_ERROR_BIT 0x20
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62 #define serRX_INT 0x04
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63 #define serTX_INT 0x02
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66 #define serINVALID_QUEUE ( ( QueueHandle_t ) 0 )
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67 #define serNO_BLOCK ( ( TickType_t ) 0 )
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69 /*-----------------------------------------------------------*/
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71 /* The queue used to hold received characters. */
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72 static QueueHandle_t xRxedChars;
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73 static QueueHandle_t xCharsForTx;
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75 /*-----------------------------------------------------------*/
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78 * See the serial2.h header file.
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80 xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
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82 /* Create the queues used to hold Rx/Tx characters. */
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83 xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
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84 xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
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86 /* If the queues were created correctly then setup the serial port
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88 if( ( xRxedChars != serINVALID_QUEUE ) && ( xCharsForTx != serINVALID_QUEUE ) )
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90 /* Ensure interrupts don't fire during the init process. Interrupts
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91 will be enabled automatically when the first task start running. */
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92 portDISABLE_INTERRUPTS();
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94 /* Configure P21 and P22 for use by the UART. */
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95 FM3_GPIO->PFR2 |= ( 1 << 0x01 ) | ( 1 << 0x02 );
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97 /* SIN0_0 and SOT0_0. */
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98 FM3_GPIO->EPFR07 |= ( 1 << 6 );
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101 FM3_MFS0_UART->SCR = 0x80;
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103 /* Enable output in mode 0. */
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104 FM3_MFS0_UART->SMR = 0x01;
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106 /* Clear all errors that may already be present. */
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107 FM3_MFS0_UART->SSR = 0x00;
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108 FM3_MFS0_UART->ESCR = 0x00;
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110 FM3_MFS0_UART->BGR = ( configCPU_CLOCK_HZ / 2UL ) / ( ulWantedBaud - 1UL );
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112 /* Enable Rx, Tx, and the Rx interrupt. */
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113 FM3_MFS0_UART->SCR |= ( serRX_ENABLE | serTX_ENABLE | serRX_INT_ENABLE );
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115 /* Configure the NVIC for UART interrupts. */
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116 NVIC_ClearPendingIRQ( MFS0RX_IRQn );
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117 NVIC_EnableIRQ( MFS0RX_IRQn );
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119 /* The priority *MUST* be at or below
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120 configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY as FreeRTOS API functions
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121 are called in the interrupt handler. */
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122 NVIC_SetPriority( MFS0RX_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
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124 /* Do the same for the Tx interrupts. */
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125 NVIC_ClearPendingIRQ( MFS0TX_IRQn );
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126 NVIC_EnableIRQ( MFS0TX_IRQn );
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128 /* The priority *MUST* be at or below
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129 configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY as FreeRTOS API functions
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130 are called in the interrupt handler. */
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131 NVIC_SetPriority( MFS0TX_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
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134 /* This demo file only supports a single port but we have to return
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135 something to comply with the standard demo header file. */
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136 return ( xComPortHandle ) 0;
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138 /*-----------------------------------------------------------*/
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140 signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed char *pcRxedChar, TickType_t xBlockTime )
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142 /* The port handle is not required as this driver only supports one port. */
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145 /* Get the next character from the buffer. Return false if no characters
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146 are available, or arrive before xBlockTime expires. */
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147 if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
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156 /*-----------------------------------------------------------*/
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158 void vSerialPutString( xComPortHandle pxPort, const signed char * const pcString, unsigned short usStringLength )
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160 signed char *pxNext;
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162 /* A couple of parameters that this port does not use. */
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163 ( void ) usStringLength;
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166 /* NOTE: This implementation does not handle the queue being full as no
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167 block time is used! */
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169 /* The port handle is not required as this driver only supports one UART. */
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172 /* Send each character in the string, one at a time. */
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173 pxNext = ( signed char * ) pcString;
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176 xSerialPutChar( pxPort, *pxNext, serNO_BLOCK );
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180 /*-----------------------------------------------------------*/
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182 signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed char cOutChar, TickType_t xBlockTime )
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184 signed portBASE_TYPE xReturn;
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186 if( xQueueSend( xCharsForTx, &cOutChar, xBlockTime ) == pdPASS )
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190 /* Enable the UART Tx interrupt. */
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191 FM3_MFS0_UART->SCR |= serTX_INT_ENABLE;
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200 /*-----------------------------------------------------------*/
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202 void vSerialClose( xComPortHandle xPort )
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204 /* Not supported as not required by the demo application. */
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206 /*-----------------------------------------------------------*/
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208 void MFS0RX_IRQHandler( void )
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210 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
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213 if( ( FM3_MFS0_UART->SSR & ( serORE_ERROR_BIT | serFRE_ERROR_BIT | serPE_ERROR_BIT ) ) != 0 )
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215 /* A PE, ORE or FRE error occurred. Clear it. */
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216 FM3_MFS0_UART->SSR |= ( 1 << 7 );
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217 cChar = FM3_MFS0_UART->RDR;
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219 else if( FM3_MFS0_UART->SSR & serRX_INT )
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221 /* A character has been received on the USART, send it to the Rx
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223 cChar = FM3_MFS0_UART->RDR;
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224 xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
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227 /* If sending or receiving from a queue has caused a task to unblock, and
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228 the unblocked task has a priority equal to or higher than the currently
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229 running task (the task this ISR interrupted), then xHigherPriorityTaskWoken
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230 will have automatically been set to pdTRUE within the queue send or receive
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231 function. portEND_SWITCHING_ISR() will then ensure that this ISR returns
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232 directly to the higher priority unblocked task. */
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233 portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
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235 /*-----------------------------------------------------------*/
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237 void MFS0TX_IRQHandler( void )
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239 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
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242 if( FM3_MFS0_UART->SSR & serTX_INT )
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244 /* The interrupt was caused by the TX register becoming empty. Are
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245 there any more characters to transmit? */
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246 if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
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248 /* A character was retrieved from the queue so can be sent to the
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250 FM3_MFS0_UART->TDR = cChar;
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254 /* Disable the Tx interrupt. */
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255 FM3_MFS0_UART->SCR &= ~serTX_INT_ENABLE;
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259 /* If sending or receiving from a queue has caused a task to unblock, and
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260 the unblocked task has a priority equal to or higher than the currently
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261 running task (the task this ISR interrupted), then xHigherPriorityTaskWoken
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262 will have automatically been set to pdTRUE within the queue send or receive
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263 function. portEND_SWITCHING_ISR() will then ensure that this ISR returns
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264 directly to the higher priority unblocked task. */
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265 portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
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