2 FreeRTOS V9.0.0 - Copyright (C) 2015 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 This file is part of the FreeRTOS distribution.
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9 FreeRTOS is free software; you can redistribute it and/or modify it under
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10 the terms of the GNU General Public License (version 2) as published by the
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11 Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
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13 ***************************************************************************
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14 >>! NOTE: The modification to the GPL is included to allow you to !<<
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15 >>! distribute a combined work that includes FreeRTOS without being !<<
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16 >>! obliged to provide the source code for proprietary components !<<
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17 >>! outside of the FreeRTOS kernel. !<<
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18 ***************************************************************************
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20 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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21 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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22 FOR A PARTICULAR PURPOSE. Full license text is available on the following
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23 link: http://www.freertos.org/a00114.html
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25 ***************************************************************************
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27 * FreeRTOS provides completely free yet professionally developed, *
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28 * robust, strictly quality controlled, supported, and cross *
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29 * platform software that is more than just the market leader, it *
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30 * is the industry's de facto standard. *
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32 * Help yourself get started quickly while simultaneously helping *
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33 * to support the FreeRTOS project by purchasing a FreeRTOS *
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34 * tutorial book, reference manual, or both: *
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35 * http://www.FreeRTOS.org/Documentation *
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37 ***************************************************************************
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39 http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
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40 the FAQ page "My application does not run, what could be wrong?". Have you
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41 defined configASSERT()?
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43 http://www.FreeRTOS.org/support - In return for receiving this top quality
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44 embedded software for free we request you assist our global community by
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45 participating in the support forum.
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47 http://www.FreeRTOS.org/training - Investing in training allows your team to
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48 be as productive as possible as early as possible. Now you can receive
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49 FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
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50 Ltd, and the world's leading authority on the world's leading RTOS.
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52 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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53 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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54 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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56 http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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57 Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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59 http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
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60 Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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61 licenses offer ticketed support, indemnification and commercial middleware.
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63 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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64 engineered and independently SIL3 certified version for use in safety and
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65 mission critical applications that require provable dependability.
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70 /* FreeRTOS includes. */
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71 #include "FreeRTOS.h"
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75 * "Reg test" tasks - These fill the registers with known values, then check
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76 * that each register maintains its expected value for the lifetime of the
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77 * task. Each task uses a different set of values. The reg test tasks execute
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78 * with a very low priority, so get preempted very frequently. A register
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79 * containing an unexpected value is indicative of an error in the context
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80 * switching mechanism.
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83 void vRegTest1Implementation( void *pvParameters );
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84 void vRegTest2Implementation( void *pvParameters );
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85 void vRegTest3Implementation( void ) __attribute__ ((naked));
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86 void vRegTest4Implementation( void ) __attribute__ ((naked));
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89 * Used as an easy way of deleting a task from inline assembly.
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91 extern void vMainDeleteMe( void ) __attribute__((noinline));
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94 * Used by the first two reg test tasks and a software timer callback function
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95 * to send messages to the check task. The message just lets the check task
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96 * know that the tasks and timer are still functioning correctly. If a reg test
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97 * task detects an error it will delete itself, and in so doing prevent itself
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98 * from sending any more 'I'm Alive' messages to the check task.
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100 extern void vMainSendImAlive( QueueHandle_t xHandle, uint32_t ulTaskNumber );
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102 /* The queue used to send a message to the check task. */
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103 extern QueueHandle_t xGlobalScopeCheckQueue;
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105 /*-----------------------------------------------------------*/
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107 void vRegTest1Implementation( void *pvParameters )
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109 /* This task is created in privileged mode so can access the file scope
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110 queue variable. Take a stack copy of this before the task is set into user
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111 mode. Once this task is in user mode the file scope queue variable will no
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112 longer be accessible but the stack copy will. */
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113 QueueHandle_t xQueue = xGlobalScopeCheckQueue;
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115 /* Now the queue handle has been obtained the task can switch to user
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116 mode. This is just one method of passing a handle into a protected
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117 task, the other reg test task uses the task parameter instead. */
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118 portSWITCH_TO_USER_MODE();
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120 /* First check that the parameter value is as expected. */
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121 if( pvParameters != ( void * ) configREG_TEST_TASK_1_PARAMETER )
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123 /* Error detected. Delete the task so it stops communicating with
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130 /* This task tests the kernel context switch mechanism by reading and
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131 writing directly to registers - which requires the test to be written
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132 in assembly code. */
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135 " MOV R4, #104 \n" /* Set registers to a known value. R0 to R1 are done in the loop below. */
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140 " MOV R10, #110 \n"
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141 " MOV R11, #111 \n"
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143 " MOV R0, #100 \n" /* Set the scratch registers to known values - done inside the loop as they get clobbered. */
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147 " MOV R12, #112 \n"
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148 " SVC #1 \n" /* Yield just to increase test coverage. */
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149 " CMP R0, #100 \n" /* Check all the registers still contain their expected values. */
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150 " BNE vMainDeleteMe \n" /* Value was not as expected, delete the task so it stops communicating with the check task. */
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152 " BNE vMainDeleteMe \n"
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154 " BNE vMainDeleteMe \n"
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156 " BNE vMainDeleteMe \n"
\r
158 " BNE vMainDeleteMe \n"
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160 " BNE vMainDeleteMe \n"
\r
162 " BNE vMainDeleteMe \n"
\r
164 " BNE vMainDeleteMe \n"
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166 " BNE vMainDeleteMe \n"
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167 " CMP R10, #110 \n"
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168 " BNE vMainDeleteMe \n"
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169 " CMP R11, #111 \n"
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170 " BNE vMainDeleteMe \n"
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171 " CMP R12, #112 \n"
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172 " BNE vMainDeleteMe \n"
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173 :::"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r8", "r9", "r10", "r11", "r12"
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176 /* Send configREG_TEST_1_STILL_EXECUTING to the check task to indicate that this
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177 task is still functioning. */
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178 vMainSendImAlive( xQueue, configREG_TEST_1_STILL_EXECUTING );
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180 /* Go back to check all the register values again. */
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181 __asm volatile( " B reg1loop " );
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184 /*-----------------------------------------------------------*/
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186 void vRegTest2Implementation( void *pvParameters )
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188 /* The queue handle is passed in as the task parameter. This is one method of
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189 passing data into a protected task, the other reg test task uses a different
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191 QueueHandle_t xQueue = ( QueueHandle_t ) pvParameters;
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195 /* This task tests the kernel context switch mechanism by reading and
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196 writing directly to registers - which requires the test to be written
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197 in assembly code. */
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200 " MOV R4, #4 \n" /* Set registers to a known value. R0 to R1 are done in the loop below. */
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203 " MOV R8, #8 \n" /* Frame pointer is omitted as it must not be changed. */
\r
208 " MOV R0, #13 \n" /* Set the scratch registers to known values - done inside the loop as they get clobbered. */
\r
213 " CMP R0, #13 \n" /* Check all the registers still contain their expected values. */
\r
214 " BNE vMainDeleteMe \n" /* Value was not as expected, delete the task so it stops communicating with the check task */
\r
216 " BNE vMainDeleteMe \n"
\r
218 " BNE vMainDeleteMe \n"
\r
220 " BNE vMainDeleteMe \n"
\r
222 " BNE vMainDeleteMe \n"
\r
224 " BNE vMainDeleteMe \n"
\r
226 " BNE vMainDeleteMe \n"
\r
228 " BNE vMainDeleteMe \n"
\r
230 " BNE vMainDeleteMe \n"
\r
232 " BNE vMainDeleteMe \n"
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234 " BNE vMainDeleteMe \n"
\r
236 " BNE vMainDeleteMe \n"
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237 :::"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r8", "r9", "r10", "r11", "r12"
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240 /* Send configREG_TEST_2_STILL_EXECUTING to the check task to indicate that this
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241 task is still functioning. */
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242 vMainSendImAlive( xQueue, configREG_TEST_2_STILL_EXECUTING );
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244 /* Go back to check all the register values again. */
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245 __asm volatile( " B reg2loop " );
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248 /*-----------------------------------------------------------*/
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250 void vRegTest3Implementation( void )
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254 ".extern pulRegTest3LoopCounter \n"
\r
255 "/* Fill the core registers with known values. */ \n"
\r
270 "/* Fill the VFP registers with known values. */ \n"
\r
271 "vmov d0, r0, r1 \n"
\r
272 "vmov d1, r2, r3 \n"
\r
273 "vmov d2, r4, r5 \n"
\r
274 "vmov d3, r6, r7 \n"
\r
275 "vmov d4, r8, r9 \n"
\r
276 "vmov d5, r10, r11 \n"
\r
277 "vmov d6, r0, r1 \n"
\r
278 "vmov d7, r2, r3 \n"
\r
279 "vmov d8, r4, r5 \n"
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280 "vmov d9, r6, r7 \n"
\r
281 "vmov d10, r8, r9 \n"
\r
282 "vmov d11, r10, r11 \n"
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283 "vmov d12, r0, r1 \n"
\r
284 "vmov d13, r2, r3 \n"
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285 "vmov d14, r4, r5 \n"
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286 "vmov d15, r6, r7 \n"
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289 "/* Check all the VFP registers still contain the values set above. \n"
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290 "First save registers that are clobbered by the test. */ \n"
\r
291 "push { r0-r1 } \n"
\r
293 "vmov r0, r1, d0 \n"
\r
295 "bne reg1_error_loopf \n"
\r
297 "bne reg1_error_loopf \n"
\r
298 "vmov r0, r1, d1 \n"
\r
300 "bne reg1_error_loopf \n"
\r
302 "bne reg1_error_loopf \n"
\r
303 "vmov r0, r1, d2 \n"
\r
305 "bne reg1_error_loopf \n"
\r
307 "bne reg1_error_loopf \n"
\r
308 "vmov r0, r1, d3 \n"
\r
310 "bne reg1_error_loopf \n"
\r
312 "bne reg1_error_loopf \n"
\r
313 "vmov r0, r1, d4 \n"
\r
315 "bne reg1_error_loopf \n"
\r
317 "bne reg1_error_loopf \n"
\r
318 "vmov r0, r1, d5 \n"
\r
320 "bne reg1_error_loopf \n"
\r
322 "bne reg1_error_loopf \n"
\r
323 "vmov r0, r1, d6 \n"
\r
325 "bne reg1_error_loopf \n"
\r
327 "bne reg1_error_loopf \n"
\r
328 "vmov r0, r1, d7 \n"
\r
330 "bne reg1_error_loopf \n"
\r
332 "bne reg1_error_loopf \n"
\r
333 "vmov r0, r1, d8 \n"
\r
335 "bne reg1_error_loopf \n"
\r
337 "bne reg1_error_loopf \n"
\r
338 "vmov r0, r1, d9 \n"
\r
340 "bne reg1_error_loopf \n"
\r
342 "bne reg1_error_loopf \n"
\r
343 "vmov r0, r1, d10 \n"
\r
345 "bne reg1_error_loopf \n"
\r
347 "bne reg1_error_loopf \n"
\r
348 "vmov r0, r1, d11 \n"
\r
350 "bne reg1_error_loopf \n"
\r
352 "bne reg1_error_loopf \n"
\r
353 "vmov r0, r1, d12 \n"
\r
355 "bne reg1_error_loopf \n"
\r
357 "bne reg1_error_loopf \n"
\r
358 "vmov r0, r1, d13 \n"
\r
360 "bne reg1_error_loopf \n"
\r
362 "bne reg1_error_loopf \n"
\r
363 "vmov r0, r1, d14 \n"
\r
365 "bne reg1_error_loopf \n"
\r
367 "bne reg1_error_loopf \n"
\r
368 "vmov r0, r1, d15 \n"
\r
370 "bne reg1_error_loopf \n"
\r
372 "bne reg1_error_loopf \n"
\r
374 "/* Restore the registers that were clobbered by the test. */ \n"
\r
377 "/* VFP register test passed. Jump to the core register test. */ \n"
\r
378 "b reg1_loopf_pass \n"
\r
380 "reg1_error_loopf: \n"
\r
381 "/* If this line is hit then a VFP register value was found to be incorrect. */ \n"
\r
382 "b reg1_error_loopf \n"
\r
384 "reg1_loopf_pass: \n"
\r
387 "bne reg1_error_loop \n"
\r
389 "bne reg1_error_loop \n"
\r
391 "bne reg1_error_loop \n"
\r
393 "bne reg1_error_loop \n"
\r
395 "bne reg1_error_loop \n"
\r
397 "bne reg1_error_loop \n"
\r
399 "bne reg1_error_loop \n"
\r
401 "bne reg1_error_loop \n"
\r
403 "bne reg1_error_loop \n"
\r
405 "bne reg1_error_loop \n"
\r
407 "bne reg1_error_loop \n"
\r
409 "bne reg1_error_loop \n"
\r
411 "bne reg1_error_loop \n"
\r
413 "/* Everything passed, increment the loop counter. */ \n"
\r
414 "push { r0-r1 } \n"
\r
415 "ldr r0, =pulRegTest3LoopCounter \n"
\r
418 "adds r1, r1, #1 \n"
\r
422 "/* Start again. */ \n"
\r
425 "reg1_error_loop: \n"
\r
426 "/* If this line is hit then there was an error in a core register value. \n"
\r
427 "The loop ensures the loop counter stops incrementing. */ \n"
\r
428 "b reg1_error_loop \n"
\r
430 ); /* __asm volatile. */
\r
432 /*-----------------------------------------------------------*/
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434 void vRegTest4Implementation( void )
\r
438 ".extern pulRegTest4LoopCounter \n"
\r
439 "/* Set all the core registers to known values. */ \n"
\r
454 "/* Set all the VFP to known values. */ \n"
\r
455 "vmov d0, r0, r1 \n"
\r
456 "vmov d1, r2, r3 \n"
\r
457 "vmov d2, r4, r5 \n"
\r
458 "vmov d3, r6, r7 \n"
\r
459 "vmov d4, r8, r9 \n"
\r
460 "vmov d5, r10, r11 \n"
\r
461 "vmov d6, r0, r1 \n"
\r
462 "vmov d7, r2, r3 \n"
\r
463 "vmov d8, r4, r5 \n"
\r
464 "vmov d9, r6, r7 \n"
\r
465 "vmov d10, r8, r9 \n"
\r
466 "vmov d11, r10, r11 \n"
\r
467 "vmov d12, r0, r1 \n"
\r
468 "vmov d13, r2, r3 \n"
\r
469 "vmov d14, r4, r5 \n"
\r
470 "vmov d15, r6, r7 \n"
\r
474 "/* Check all the VFP registers still contain the values set above. \n"
\r
475 "First save registers that are clobbered by the test. */ \n"
\r
476 "push { r0-r1 } \n"
\r
478 "vmov r0, r1, d0 \n"
\r
480 "bne reg2_error_loopf \n"
\r
482 "bne reg2_error_loopf \n"
\r
483 "vmov r0, r1, d1 \n"
\r
485 "bne reg2_error_loopf \n"
\r
487 "bne reg2_error_loopf \n"
\r
488 "vmov r0, r1, d2 \n"
\r
490 "bne reg2_error_loopf \n"
\r
492 "bne reg2_error_loopf \n"
\r
493 "vmov r0, r1, d3 \n"
\r
495 "bne reg2_error_loopf \n"
\r
497 "bne reg2_error_loopf \n"
\r
498 "vmov r0, r1, d4 \n"
\r
500 "bne reg2_error_loopf \n"
\r
502 "bne reg2_error_loopf \n"
\r
503 "vmov r0, r1, d5 \n"
\r
505 "bne reg2_error_loopf \n"
\r
507 "bne reg2_error_loopf \n"
\r
508 "vmov r0, r1, d6 \n"
\r
510 "bne reg2_error_loopf \n"
\r
512 "bne reg2_error_loopf \n"
\r
513 "vmov r0, r1, d7 \n"
\r
515 "bne reg2_error_loopf \n"
\r
517 "bne reg2_error_loopf \n"
\r
518 "vmov r0, r1, d8 \n"
\r
520 "bne reg2_error_loopf \n"
\r
522 "bne reg2_error_loopf \n"
\r
523 "vmov r0, r1, d9 \n"
\r
525 "bne reg2_error_loopf \n"
\r
527 "bne reg2_error_loopf \n"
\r
528 "vmov r0, r1, d10 \n"
\r
530 "bne reg2_error_loopf \n"
\r
532 "bne reg2_error_loopf \n"
\r
533 "vmov r0, r1, d11 \n"
\r
535 "bne reg2_error_loopf \n"
\r
537 "bne reg2_error_loopf \n"
\r
538 "vmov r0, r1, d12 \n"
\r
540 "bne reg2_error_loopf \n"
\r
542 "bne reg2_error_loopf \n"
\r
543 "vmov r0, r1, d13 \n"
\r
545 "bne reg2_error_loopf \n"
\r
547 "bne reg2_error_loopf \n"
\r
548 "vmov r0, r1, d14 \n"
\r
550 "bne reg2_error_loopf \n"
\r
552 "bne reg2_error_loopf \n"
\r
553 "vmov r0, r1, d15 \n"
\r
555 "bne reg2_error_loopf \n"
\r
557 "bne reg2_error_loopf \n"
\r
559 "/* Restore the registers that were clobbered by the test. */ \n"
\r
562 "/* VFP register test passed. Jump to the core register test. */ \n"
\r
563 "b reg2_loopf_pass \n"
\r
565 "reg2_error_loopf: \n"
\r
566 "/* If this line is hit then a VFP register value was found to be \n"
\r
568 "b reg2_error_loopf \n"
\r
570 "reg2_loopf_pass: \n"
\r
573 "bne reg2_error_loop \n"
\r
575 "bne reg2_error_loop \n"
\r
577 "bne reg2_error_loop \n"
\r
579 "bne reg2_error_loop \n"
\r
581 "bne reg2_error_loop \n"
\r
583 "bne reg2_error_loop \n"
\r
585 "bne reg2_error_loop \n"
\r
587 "bne reg2_error_loop \n"
\r
589 "bne reg2_error_loop \n"
\r
591 "bne reg2_error_loop \n"
\r
593 "bne reg2_error_loop \n"
\r
595 "bne reg2_error_loop \n"
\r
597 "bne reg2_error_loop \n"
\r
599 "/* Increment the loop counter so the check task knows this task is \n"
\r
600 "still running. */ \n"
\r
601 "push { r0-r1 } \n"
\r
602 "ldr r0, =pulRegTest4LoopCounter \n"
\r
605 "adds r1, r1, #1 \n"
\r
609 "/* Yield to increase test coverage. */ \n"
\r
612 "/* Start again. */ \n"
\r
615 "reg2_error_loop: \n"
\r
616 "/* If this line is hit then there was an error in a core register value. \n"
\r
617 "This loop ensures the loop counter variable stops incrementing. */ \n"
\r
618 "b reg2_error_loop \n"
\r
619 ); /* __asm volatile */
\r
621 /*-----------------------------------------------------------*/
\r
623 /* Fault handlers are here for convenience as they use compiler specific syntax
\r
624 and this file is specific to the GCC compiler. */
\r
625 void hard_fault_handler( uint32_t * hardfault_args )
\r
627 volatile uint32_t stacked_r0;
\r
628 volatile uint32_t stacked_r1;
\r
629 volatile uint32_t stacked_r2;
\r
630 volatile uint32_t stacked_r3;
\r
631 volatile uint32_t stacked_r12;
\r
632 volatile uint32_t stacked_lr;
\r
633 volatile uint32_t stacked_pc;
\r
634 volatile uint32_t stacked_psr;
\r
636 stacked_r0 = ((uint32_t) hardfault_args[ 0 ]);
\r
637 stacked_r1 = ((uint32_t) hardfault_args[ 1 ]);
\r
638 stacked_r2 = ((uint32_t) hardfault_args[ 2 ]);
\r
639 stacked_r3 = ((uint32_t) hardfault_args[ 3 ]);
\r
641 stacked_r12 = ((uint32_t) hardfault_args[ 4 ]);
\r
642 stacked_lr = ((uint32_t) hardfault_args[ 5 ]);
\r
643 stacked_pc = ((uint32_t) hardfault_args[ 6 ]);
\r
644 stacked_psr = ((uint32_t) hardfault_args[ 7 ]);
\r
646 /* Inspect stacked_pc to locate the offending instruction. */
\r
649 ( void ) stacked_psr;
\r
650 ( void ) stacked_pc;
\r
651 ( void ) stacked_lr;
\r
652 ( void ) stacked_r12;
\r
653 ( void ) stacked_r0;
\r
654 ( void ) stacked_r1;
\r
655 ( void ) stacked_r2;
\r
656 ( void ) stacked_r3;
\r
658 /*-----------------------------------------------------------*/
\r
660 void HardFault_Handler( void ) __attribute__((naked));
\r
661 void HardFault_Handler( void )
\r
667 " mrseq r0, msp \n"
\r
668 " mrsne r0, psp \n"
\r
669 " ldr r1, [r0, #24] \n"
\r
670 " ldr r2, handler_address_const \n"
\r
672 " handler_address_const: .word hard_fault_handler \n"
\r
675 /*-----------------------------------------------------------*/
\r
677 void MemManage_Handler( void ) __attribute__((naked));
\r
678 void MemManage_Handler( void )
\r
684 " mrseq r0, msp \n"
\r
685 " mrsne r0, psp \n"
\r
686 " ldr r1, [r0, #24] \n"
\r
687 " ldr r2, handler2_address_const \n"
\r
689 " handler2_address_const: .word hard_fault_handler \n"
\r
691 }/*-----------------------------------------------------------*/
\r