git.sur5r.net Git - freertos/blob - FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/component/serial_manager/serial_port_uart.h

   1 /*\r
   2  * Copyright 2018 NXP\r
   3  * All rights reserved.\r
   4  *\r
   5  *\r
   6  * SPDX-License-Identifier: BSD-3-Clause\r
   7  */\r
   8 \r
   9 #ifndef __SERIAL_PORT_UART_H__\r
  10 #define __SERIAL_PORT_UART_H__\r
  11 \r
  12 /*******************************************************************************\r
  13  * Definitions\r
  14  ******************************************************************************/\r
  15 \r
  16 #if (defined(SERIAL_MANAGER_NON_BLOCKING_MODE) && (SERIAL_MANAGER_NON_BLOCKING_MODE > 0U))\r
  17 #define SERIAL_PORT_UART_HANDLE_SIZE          (166U)\r
  18 #else\r
  19 #define SERIAL_PORT_UART_HANDLE_SIZE          (4U)\r
  20 #endif\r
  21 \r
  22 typedef enum _serial_port_uart_parity_mode\r
  23 {\r
  24     kSerialManager_UartParityDisabled = 0x0U, /*!< Parity disabled */\r
  25     kSerialManager_UartParityEven = 0x1U,     /*!< Parity even enabled */\r
  26     kSerialManager_UartParityOdd = 0x2U,      /*!< Parity odd enabled */\r
  27 } serial_port_uart_parity_mode_t;\r
  28 \r
  29 typedef enum _serial_port_uart_stop_bit_count\r
  30 {\r
  31     kSerialManager_UartOneStopBit = 0U, /*!< One stop bit */\r
  32     kSerialManager_UartTwoStopBit = 1U, /*!< Two stop bits */\r
  33 } serial_port_uart_stop_bit_count_t;\r
  34 \r
  35 typedef struct _serial_port_uart_config\r
  36 {\r
  37     uint32_t clockRate;                                 /*!< clock rate  */\r
  38     uint32_t baudRate;                                  /*!< baud rate  */\r
  39     serial_port_uart_parity_mode_t parityMode;          /*!< Parity mode, disabled (default), even, odd */\r
  40     serial_port_uart_stop_bit_count_t stopBitCount;     /*!< Number of stop bits, 1 stop bit (default) or 2 stop bits  */\r
  41     uint8_t instance;                                   /*!< Instance (0 - UART0, 1 - UART1, ...), detail information\r
  42                                                              please refer to the SOC corresponding RM. */\r
  43     uint8_t enableRx;                                   /*!< Enable RX */\r
  44     uint8_t enableTx;                                   /*!< Enable TX */\r
  45 } serial_port_uart_config_t;\r
  46 \r
  47 #endif /* __SERIAL_PORT_UART_H__ */\r