2 FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.
\r
5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
\r
7 This file is part of the FreeRTOS distribution.
\r
9 FreeRTOS is free software; you can redistribute it and/or modify it under
\r
10 the terms of the GNU General Public License (version 2) as published by the
\r
11 Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
\r
13 ***************************************************************************
\r
14 >>! NOTE: The modification to the GPL is included to allow you to !<<
\r
15 >>! distribute a combined work that includes FreeRTOS without being !<<
\r
16 >>! obliged to provide the source code for proprietary components !<<
\r
17 >>! outside of the FreeRTOS kernel. !<<
\r
18 ***************************************************************************
\r
20 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
\r
21 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
\r
22 FOR A PARTICULAR PURPOSE. Full license text is available on the following
\r
23 link: http://www.freertos.org/a00114.html
\r
25 ***************************************************************************
\r
27 * FreeRTOS provides completely free yet professionally developed, *
\r
28 * robust, strictly quality controlled, supported, and cross *
\r
29 * platform software that is more than just the market leader, it *
\r
30 * is the industry's de facto standard. *
\r
32 * Help yourself get started quickly while simultaneously helping *
\r
33 * to support the FreeRTOS project by purchasing a FreeRTOS *
\r
34 * tutorial book, reference manual, or both: *
\r
35 * http://www.FreeRTOS.org/Documentation *
\r
37 ***************************************************************************
\r
39 http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
\r
40 the FAQ page "My application does not run, what could be wrong?". Have you
\r
41 defined configASSERT()?
\r
43 http://www.FreeRTOS.org/support - In return for receiving this top quality
\r
44 embedded software for free we request you assist our global community by
\r
45 participating in the support forum.
\r
47 http://www.FreeRTOS.org/training - Investing in training allows your team to
\r
48 be as productive as possible as early as possible. Now you can receive
\r
49 FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
\r
50 Ltd, and the world's leading authority on the world's leading RTOS.
\r
52 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
\r
53 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
\r
54 compatible FAT file system, and our tiny thread aware UDP/IP stack.
\r
56 http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
\r
57 Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
\r
59 http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
\r
60 Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
\r
61 licenses offer ticketed support, indemnification and commercial middleware.
\r
63 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
\r
64 engineered and independently SIL3 certified version for use in safety and
\r
65 mission critical applications that require provable dependability.
\r
71 * This file contains the non-portable and therefore RZ/T specific parts of
\r
72 * the IntQueue standard demo task - namely the configuration of the timers
\r
73 * that generate the interrupts and the interrupt entry points.
\r
76 /* Scheduler includes. */
\r
77 #include "FreeRTOS.h"
\r
80 /* Demo includes. */
\r
81 #include "IntQueueTimer.h"
\r
82 #include "IntQueue.h"
\r
84 /* Renesas includes. */
\r
85 #include "r_cg_macrodriver.h"
\r
86 #include "r_cg_cmt.h"
\r
87 #include "r_reset.h"
\r
89 #define tmrCMT_1_CHANNEL_0_HZ ( 4000UL )
\r
90 #define tmrCMT_1_CHANNEL_1_HZ ( 2011UL )
\r
93 * Handlers for the two timers used. See the documentation page
\r
94 * for this port on TBD for more information on writing
\r
95 * interrupt handlers.
\r
97 void vCMT_1_Channel_0_ISR( void );
\r
98 void vCMT_1_Channel_1_ISR( void );
\r
101 * Entry point for the handlers. These set the pxISRFunction variable to point
\r
102 * to the C handler for each timer, then branch to the FreeRTOS IRQ handler.
\r
105 static void vCMT_1_Channel_0_ISR_Entry( void ) __attribute__((naked));
\r
106 static void vCMT_1_Channel_1_ISR_Entry( void ) __attribute__((naked));
\r
107 #endif /* __GNUC__ */
\r
109 /* IAR requires the entry point to be in an assembly file. The functions
\r
110 are implemented in $PROJ_DIR$/System/IAR/Interrupt_Entry_Stubs.asm. */
\r
111 extern void vCMT_1_Channel_0_ISR_Entry( void );
\r
112 extern void vCMT_1_Channel_1_ISR_Entry( void );
\r
113 #endif /* __ICCARM__ */
\r
114 /*-----------------------------------------------------------*/
\r
116 void vInitialiseTimerForIntQueueTest( void )
\r
118 uint32_t ulCompareMatchValue;
\r
119 const uint32_t ulPeripheralClockDivider = 6UL, ulCMTClockDivider = 8UL;
\r
121 /* Disable CMI2 and CMI3 interrupts. */
\r
122 VIC.IEC0.LONG = ( 1UL << 23UL ) | ( 1UL << 24UL );
\r
124 /* Cancel CMT stop state in LPC. */
\r
125 r_rst_write_enable();
\r
127 r_rst_write_disable();
\r
129 /* Interrupt on compare match. */
\r
130 CMT2.CMCR.BIT.CMIE = 1;
\r
131 CMT3.CMCR.BIT.CMIE = 1;
\r
133 /* Calculate the compare match value. */
\r
134 ulCompareMatchValue = configCPU_CLOCK_HZ / ulPeripheralClockDivider;
\r
135 ulCompareMatchValue /= ulCMTClockDivider;
\r
136 ulCompareMatchValue /= tmrCMT_1_CHANNEL_0_HZ;
\r
137 ulCompareMatchValue -= 1UL;
\r
138 CMT2.CMCOR = ( unsigned short ) ulCompareMatchValue;
\r
140 ulCompareMatchValue = configCPU_CLOCK_HZ / ulPeripheralClockDivider;
\r
141 ulCompareMatchValue /= ulCMTClockDivider;
\r
142 ulCompareMatchValue /= tmrCMT_1_CHANNEL_1_HZ;
\r
143 ulCompareMatchValue -= 1UL;
\r
144 CMT3.CMCOR = ( unsigned short ) ulCompareMatchValue;
\r
146 /* Divide the PCLK by 8. */
\r
147 CMT2.CMCR.BIT.CKS = 0;
\r
148 CMT3.CMCR.BIT.CKS = 0;
\r
150 /* Clear count to 0. */
\r
154 /* Set CMI2 and CMI3 edge detection type. */
\r
155 VIC.PLS0.LONG |= ( 1UL << 23UL ) | ( 1UL << 24UL );
\r
157 /* Set CMI2 and CMI3 priority levels so they nest. */
\r
158 VIC.PRL23.LONG = _CMT_PRIORITY_LEVEL2;
\r
159 VIC.PRL24.LONG = _CMT_PRIORITY_LEVEL9;
\r
161 /* Set CMI2 and CMI3 interrupt address. */
\r
162 VIC.VAD23.LONG = ( uint32_t ) vCMT_1_Channel_0_ISR_Entry;
\r
163 VIC.VAD24.LONG = ( uint32_t ) vCMT_1_Channel_1_ISR_Entry;
\r
165 /* Enable CMI2 and CMI3 interrupts in ICU. */
\r
166 VIC.IEN0.LONG |= ( 1UL << 23UL ) | ( 1UL << 24UL );
\r
168 /* Start CMT1 channel 0 and 1 count. */
\r
169 CMT.CMSTR1.BIT.STR2 = 1U;
\r
170 CMT.CMSTR1.BIT.STR3 = 1U;
\r
172 /*-----------------------------------------------------------*/
\r
174 void vCMT_1_Channel_0_ISR( void )
\r
176 /* Clear the interrupt. */
\r
177 VIC.PIC0.LONG = ( 1UL << 23UL );
\r
179 /* Call the handler that is part of the common code - this is where the
\r
180 non-portable code ends and the actual test is performed. */
\r
181 portYIELD_FROM_ISR( xFirstTimerHandler() );
\r
183 /*-----------------------------------------------------------*/
\r
185 void vCMT_1_Channel_1_ISR( void )
\r
187 /* Clear the interrupt. */
\r
188 VIC.PIC0.LONG = ( 1UL << 24UL );
\r
190 /* Call the handler that is part of the common code - this is where the
\r
191 non-portable code ends and the actual test is performed. */
\r
192 portYIELD_FROM_ISR( xSecondTimerHandler() );
\r
194 /*-----------------------------------------------------------*/
\r
197 * The RZ/T vectors directly to a peripheral specific interrupt handler, rather
\r
198 * than using the Cortex-R IRQ vector. Therefore each interrupt handler
\r
199 * installed by the application must follow the examples below, which save a
\r
200 * pointer to a standard C function in the pxISRFunction variable, before
\r
201 * branching to the FreeRTOS IRQ handler. The FreeRTOS IRQ handler then manages
\r
202 * interrupt entry (including interrupt nesting), before calling the C function
\r
203 * saved in the pxISRFunction variable. NOTE: The entry points are naked
\r
204 * functions - do not add C code to these functions.
\r
207 /* The IAR equivalent is implemented in
\r
208 $PROJ_DIR$/System/IAR/Interrupt_Entry_Stubs.asm */
\r
209 static void vCMT_1_Channel_0_ISR_Entry( void )
\r
212 "PUSH {r0-r1} \t\n" \
\r
213 "LDR r0, =pxISRFunction \t\n" \
\r
214 "LDR r1, =vCMT_1_Channel_0_ISR \t\n" \
\r
215 "STR r1, [r0] \t\n" \
\r
216 "POP {r0-r1} \t\n" \
\r
217 "B FreeRTOS_IRQ_Handler "
\r
220 #endif /* __GNUC__ */
\r
221 /*-----------------------------------------------------------*/
\r
224 /* The IAR equivalent is implemented in
\r
225 $PROJ_DIR$/System/IAR/Interrupt_Entry_Stubs.asm */
\r
226 static void vCMT_1_Channel_1_ISR_Entry( void )
\r
229 "PUSH {r0-r1} \t\n" \
\r
230 "LDR r0, =pxISRFunction \t\n" \
\r
231 "LDR r1, =vCMT_1_Channel_1_ISR \t\n" \
\r
232 "STR r1, [r0] \t\n" \
\r
233 "POP {r0-r1} \t\n" \
\r
234 "B FreeRTOS_IRQ_Handler "
\r
237 #endif /* __GNUC__ */
\r