2 FreeRTOS V8.2.0 - Copyright (C) 2015 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 This file is part of the FreeRTOS distribution.
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9 FreeRTOS is free software; you can redistribute it and/or modify it under
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10 the terms of the GNU General Public License (version 2) as published by the
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11 Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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13 ***************************************************************************
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14 >>! NOTE: The modification to the GPL is included to allow you to !<<
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15 >>! distribute a combined work that includes FreeRTOS without being !<<
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16 >>! obliged to provide the source code for proprietary components !<<
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17 >>! outside of the FreeRTOS kernel. !<<
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18 ***************************************************************************
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20 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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21 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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22 FOR A PARTICULAR PURPOSE. Full license text is available on the following
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23 link: http://www.freertos.org/a00114.html
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25 ***************************************************************************
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27 * FreeRTOS provides completely free yet professionally developed, *
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28 * robust, strictly quality controlled, supported, and cross *
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29 * platform software that is more than just the market leader, it *
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30 * is the industry's de facto standard. *
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32 * Help yourself get started quickly while simultaneously helping *
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33 * to support the FreeRTOS project by purchasing a FreeRTOS *
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34 * tutorial book, reference manual, or both: *
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35 * http://www.FreeRTOS.org/Documentation *
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37 ***************************************************************************
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39 http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
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40 the FAQ page "My application does not run, what could be wrong?". Have you
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41 defined configASSERT()?
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43 http://www.FreeRTOS.org/support - In return for receiving this top quality
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44 embedded software for free we request you assist our global community by
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45 participating in the support forum.
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47 http://www.FreeRTOS.org/training - Investing in training allows your team to
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48 be as productive as possible as early as possible. Now you can receive
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49 FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
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50 Ltd, and the world's leading authority on the world's leading RTOS.
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52 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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53 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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54 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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56 http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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57 Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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59 http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
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60 Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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61 licenses offer ticketed support, indemnification and commercial middleware.
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63 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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64 engineered and independently SIL3 certified version for use in safety and
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65 mission critical applications that require provable dependability.
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76 * @brief HET Register Definition
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78 * This structure is used to access the HET module egisters.
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80 /** @typedef hetBASE_t
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81 * @brief HET Register Frame Type Definition
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83 * This type is used to access the HET Registers.
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85 typedef volatile struct hetBase
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87 unsigned GCR; /**< 0x0000: Global control register */
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88 unsigned PFR; /**< 0x0004: Prescale factor register */
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89 unsigned ADDR; /**< 0x0008: Current address register */
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90 unsigned OFF1; /**< 0x000C: Interrupt offset register 1 */
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91 unsigned OFF2; /**< 0x0010: Interrupt offset register 2 */
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92 unsigned INTENAS; /**< 0x0014: Interrupt enable set register */
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93 unsigned INTENAC; /**< 0x0018: Interrupt enable clear register */
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94 unsigned EXC1; /**< 0x001C: Exeption control register 1 */
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95 unsigned EXC2; /**< 0x0020: Exeption control register 2 */
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96 unsigned PRY; /**< 0x0024: Interrupt priority register */
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97 unsigned FLG; /**< 0x0028: Interrupt flag register */
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98 unsigned : 32U; /**< 0x002C: Reserved */
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99 unsigned : 32U; /**< 0x0030: Reserved */
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100 unsigned HRSH; /**< 0x0034: High resoltion share register */
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101 unsigned XOR; /**< 0x0038: XOR share register */
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102 unsigned REQENS; /**< 0x003C: Request enable set register */
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103 unsigned REQENC; /**< 0x0040: Request enable clear register */
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104 unsigned REQDS; /**< 0x0044: Request destination select register */
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105 unsigned : 32U; /**< 0x0048: Reserved */
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106 unsigned DIR; /**< 0x004C: Direction register */
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107 unsigned DIN; /**< 0x0050: Data input register */
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108 unsigned DOUT; /**< 0x0054: Data output register */
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109 unsigned DSET; /**< 0x0058: Data output set register */
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110 unsigned DCLR; /**< 0x005C: Data output clear register */
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111 unsigned PDR; /**< 0x0060: Open drain register */
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112 unsigned PULDIS; /**< 0x0064: Pull disable register */
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113 unsigned PSL; /**< 0x0068: Pull select register */
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114 unsigned : 32U; /**< 0x006C: Reserved */
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115 unsigned : 32U; /**< 0x0070: Reserved */
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116 unsigned PCREG; /**< 0x0074: Parity control register */
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117 unsigned PAR; /**< 0x0078: Parity address register */
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118 unsigned PPR; /**< 0x007C: Parity pin select register */
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119 unsigned SFPRLD; /**< 0x0080: Suppression filter preload register */
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120 unsigned SFENA; /**< 0x0084: Suppression filter enable register */
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121 unsigned : 32U; /**< 0x0088: Reserved */
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122 unsigned LBPSEL; /**< 0x008C: Loop back pair select register */
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123 unsigned LBPDIR; /**< 0x0090: Loop back pair direction register */
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128 * @brief HET Register Frame Pointer
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130 * This pointer is used by the HET driver to access the het module registers.
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132 #define hetREG ((hetBASE_t *)0xFFF7B800U)
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136 * @brief HET GIO Port Register Pointer
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138 * Pointer used by the GIO driver to access I/O PORT of HET
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139 * (use the GIO drivers to access the port pins).
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141 #define hetPORT ((gioPORT_t *)0xFFF7B84CU)
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