2 ; FreeRTOS V8.1.1 - Copyright (C) 2014 Real Time Engineers Ltd.
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5 ; ***************************************************************************
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7 ; * FreeRTOS tutorial books are available in pdf and paperback. *
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8 ; * Complete, revised, and edited pdf reference manuals are also *
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11 ; * Purchasing FreeRTOS documentation will not only help you, by *
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12 ; * ensuring you get running as quickly as possible and with an *
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13 ; * in-depth knowledge of how to use FreeRTOS, it will also help *
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14 ; * the FreeRTOS project to continue with its mission of providing *
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15 ; * professional grade, cross platform, de facto standard solutions *
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16 ; * for microcontrollers - completely free of charge! *
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18 ; * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
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20 ; * Thank you for using FreeRTOS, and thank you for your support! *
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22 ; ***************************************************************************
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25 ; This file is part of the FreeRTOS distribution.
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27 ; FreeRTOS is free software; you can redistribute it and/or modify it under
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28 ; the terms of the GNU General Public License (version 2) as published by the
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29 ; Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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30 ; >>>NOTE<<< The modification to the GPL is included to allow you to
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31 ; distribute a combined work that includes FreeRTOS without being obliged to
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32 ; provide the source code for proprietary components outside of the FreeRTOS
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33 ; kernel. FreeRTOS is distributed in the hope that it will be useful, but
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34 ; WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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35 ; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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36 ; more details. You should have received a copy of the GNU General Public
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37 ; License and the FreeRTOS license exception along with FreeRTOS; if not it
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38 ; can be viewed here: http://www.freertos.org/a00114.html and also obtained
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39 ; by writing to Richard Barry, contact details for whom are available on the
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40 ; FreeRTOS WEB site.
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42 ; 1 tab == 4 spaces!
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44 ; ***************************************************************************
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46 ; * Having a problem? Start by reading the FAQ "My application does *
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47 ; * not run, what could be wrong? *
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49 ; * http://www.FreeRTOS.org/FAQHelp.html *
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51 ; ***************************************************************************
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54 ; http://www.FreeRTOS.org - Documentation, training, latest information,
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55 ; license and contact details.
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57 ; http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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58 ; including FreeRTOS+Trace - an indispensable productivity tool.
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60 ; Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell
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61 ; the code with commercial support, indemnification, and middleware, under
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62 ; the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also
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63 ; provide a safety engineered and independently SIL3 certified version under
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64 ; the SafeRTOS brand: http://www.SafeRTOS.com.
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67 ;-------------------------------------------------
\r
70 .ref ulRegTest1Counter
\r
72 .if (__TI_VFP_SUPPORT__)
\r
73 .ref vPortTaskUsesFPU
\r
74 .endif ;__TI_VFP_SUPPORT__
\r
80 .if (__TI_VFP_SUPPORT__)
\r
81 ; Let the port layer know that this task needs its FPU context saving.
\r
85 ; Fill each general purpose register with a known value.
\r
101 .if (__TI_VFP_SUPPORT__)
\r
102 ; Fill each FPU register with a known value.
\r
127 .if (__TI_VFP_SUPPORT__)
\r
128 ; Check all the VFP registers still contain the values set above.
\r
129 ; First save registers that are clobbered by the test.
\r
134 bne reg1_error_loopf
\r
136 bne reg1_error_loopf
\r
139 bne reg1_error_loopf
\r
141 bne reg1_error_loopf
\r
144 bne reg1_error_loopf
\r
146 bne reg1_error_loopf
\r
149 bne reg1_error_loopf
\r
151 bne reg1_error_loopf
\r
154 bne reg1_error_loopf
\r
156 bne reg1_error_loopf
\r
159 bne reg1_error_loopf
\r
161 bne reg1_error_loopf
\r
164 bne reg1_error_loopf
\r
166 bne reg1_error_loopf
\r
169 bne reg1_error_loopf
\r
171 bne reg1_error_loopf
\r
174 bne reg1_error_loopf
\r
176 bne reg1_error_loopf
\r
179 bne reg1_error_loopf
\r
181 bne reg1_error_loopf
\r
184 bne reg1_error_loopf
\r
186 bne reg1_error_loopf
\r
189 bne reg1_error_loopf
\r
191 bne reg1_error_loopf
\r
194 bne reg1_error_loopf
\r
196 bne reg1_error_loopf
\r
199 bne reg1_error_loopf
\r
201 bne reg1_error_loopf
\r
204 bne reg1_error_loopf
\r
206 bne reg1_error_loopf
\r
209 bne reg1_error_loopf
\r
211 bne reg1_error_loopf
\r
213 ; Restore the registers that were clobbered by the test.
\r
216 ; VFP register test passed. Jump to the core register test.
\r
220 ; If this line is hit then a VFP register value was found to be
\r
226 .endif ;__TI_VFP_SUPPORT__
\r
228 ; Test each general purpose register to check that it still contains the
\r
229 ; expected known value, jumping to vRegTestError1 if any register contains
\r
230 ; an unexpected value.
\r
232 bne vRegTestError1
\r
234 bne vRegTestError1
\r
236 bne vRegTestError1
\r
238 bne vRegTestError1
\r
240 bne vRegTestError1
\r
242 bne vRegTestError1
\r
244 bne vRegTestError1
\r
246 bne vRegTestError1
\r
248 bne vRegTestError1
\r
250 bne vRegTestError1
\r
252 bne vRegTestError1
\r
254 bne vRegTestError1
\r
256 bne vRegTestError1
\r
258 bne vRegTestError1
\r
260 ; This task is still running without jumping to vRegTestError1, so increment
\r
261 ; the loop counter so the check task knows the task is running error free.
\r
262 stmfd sp!, { r0-r1 }
\r
263 ldr r0, Count1Const
\r
267 ldmfd sp!, { r0-r1 }
\r
269 ; Loop again, performing the same tests.
\r
272 Count1Const .word ulRegTest1Counter
\r
278 ;-------------------------------------------------
\r
281 .ref ulRegTest2Counter
\r
286 .if (__TI_VFP_SUPPORT__)
\r
287 ; Let the port layer know that this task needs its FPU context saving.
\r
288 BL vPortTaskUsesFPU
\r
291 ; Fill each general purpose register with a known value.
\r
292 mov r0, #0xFF000000
\r
293 mov r1, #0x11000000
\r
294 mov r2, #0x22000000
\r
295 mov r3, #0x33000000
\r
296 mov r4, #0x44000000
\r
297 mov r5, #0x55000000
\r
298 mov r6, #0x66000000
\r
299 mov r7, #0x77000000
\r
300 mov r8, #0x88000000
\r
301 mov r9, #0x99000000
\r
302 mov r10, #0xAA000000
\r
303 mov r11, #0xBB000000
\r
304 mov r12, #0xCC000000
\r
305 mov r14, #0xEE000000
\r
307 .if (__TI_VFP_SUPPORT__)
\r
309 ; Fill each FPU register with a known value.
\r
330 .if (__TI_VFP_SUPPORT__)
\r
331 ; Check all the VFP registers still contain the values set above.
\r
332 ; First save registers that are clobbered by the test.
\r
336 cmp r0, #0xFF000000
\r
337 bne reg2_error_loopf
\r
338 cmp r1, #0x11000000
\r
339 bne reg2_error_loopf
\r
341 cmp r0, #0x22000000
\r
342 bne reg2_error_loopf
\r
343 cmp r1, #0x33000000
\r
344 bne reg2_error_loopf
\r
346 cmp r0, #0x44000000
\r
347 bne reg2_error_loopf
\r
348 cmp r1, #0x55000000
\r
349 bne reg2_error_loopf
\r
351 cmp r0, #0x66000000
\r
352 bne reg2_error_loopf
\r
353 cmp r1, #0x77000000
\r
354 bne reg2_error_loopf
\r
356 cmp r0, #0x88000000
\r
357 bne reg2_error_loopf
\r
358 cmp r1, #0x99000000
\r
359 bne reg2_error_loopf
\r
361 cmp r0, #0xAA000000
\r
362 bne reg2_error_loopf
\r
363 cmp r1, #0xBB000000
\r
364 bne reg2_error_loopf
\r
366 cmp r0, #0xFF000000
\r
367 bne reg2_error_loopf
\r
368 cmp r1, #0x11000000
\r
369 bne reg2_error_loopf
\r
371 cmp r0, #0x22000000
\r
372 bne reg2_error_loopf
\r
373 cmp r1, #0x33000000
\r
374 bne reg2_error_loopf
\r
376 cmp r0, #0x44000000
\r
377 bne reg2_error_loopf
\r
378 cmp r1, #0x55000000
\r
379 bne reg2_error_loopf
\r
381 cmp r0, #0x66000000
\r
382 bne reg2_error_loopf
\r
383 cmp r1, #0x77000000
\r
384 bne reg2_error_loopf
\r
386 cmp r0, #0x88000000
\r
387 bne reg2_error_loopf
\r
388 cmp r1, #0x99000000
\r
389 bne reg2_error_loopf
\r
391 cmp r0, #0xAA000000
\r
392 bne reg2_error_loopf
\r
393 cmp r1, #0xBB000000
\r
394 bne reg2_error_loopf
\r
396 cmp r0, #0xFF000000
\r
397 bne reg2_error_loopf
\r
398 cmp r1, #0x11000000
\r
399 bne reg2_error_loopf
\r
401 cmp r0, #0x22000000
\r
402 bne reg2_error_loopf
\r
403 cmp r1, #0x33000000
\r
404 bne reg2_error_loopf
\r
406 cmp r0, #0x44000000
\r
407 bne reg2_error_loopf
\r
408 cmp r1, #0x55000000
\r
409 bne reg2_error_loopf
\r
411 cmp r0, #0x66000000
\r
412 bne reg2_error_loopf
\r
413 cmp r1, #0x77000000
\r
414 bne reg2_error_loopf
\r
416 ; Restore the registers that were clobbered by the test.
\r
419 ; VFP register test passed. Jump to the core register test.
\r
423 ; If this line is hit then a VFP register value was found to be
\r
429 .endif ;__TI_VFP_SUPPORT__
\r
431 ; Test each general purpose register to check that it still contains the
\r
432 ; expected known value, jumping to vRegTestError2 if any register contains
\r
433 ; an unexpected value.
\r
434 cmp r0, #0xFF000000
\r
435 bne vRegTestError2
\r
436 cmp r1, #0x11000000
\r
437 bne vRegTestError2
\r
438 cmp r2, #0x22000000
\r
439 bne vRegTestError2
\r
440 cmp r3, #0x33000000
\r
441 bne vRegTestError2
\r
442 cmp r4, #0x44000000
\r
443 bne vRegTestError2
\r
444 cmp r5, #0x55000000
\r
445 bne vRegTestError2
\r
446 cmp r6, #0x66000000
\r
447 bne vRegTestError2
\r
448 cmp r7, #0x77000000
\r
449 bne vRegTestError2
\r
450 cmp r8, #0x88000000
\r
451 bne vRegTestError2
\r
452 cmp r9, #0x99000000
\r
453 bne vRegTestError2
\r
454 cmp r10, #0xAA000000
\r
455 bne vRegTestError2
\r
456 cmp r11, #0xBB000000
\r
457 bne vRegTestError2
\r
458 cmp r12, #0xCC000000
\r
459 bne vRegTestError2
\r
460 cmp r14, #0xEE000000
\r
461 bne vRegTestError2
\r
463 ; This task is still running without jumping to vRegTestError2, so increment
\r
464 ; the loop counter so the check task knows the task is running error free.
\r
465 stmfd sp!, { r0-r1 }
\r
466 ldr r0, Count2Const
\r
470 ldmfd sp!, { r0-r1 }
\r
472 ; Loop again, performing the same tests.
\r
475 Count2Const .word ulRegTest2Counter
\r
480 ;-------------------------------------------------
\r