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32 /*****************************************************************************/
35 * @file xil_testcache.c
37 * Contains utility functions to test cache.
40 * MODIFICATION HISTORY:
42 * Ver Who Date Changes
43 * ----- ---- -------- -------------------------------------------------------
44 * 1.00a hbm 07/28/09 Initial release
45 * 4.1 asa 05/09/14 Ensured that the address uses for cache test is aligned
50 * This file contain functions that all operate on HAL.
52 ******************************************************************************/
54 #include "xil_cache.h"
55 #include "xil_testcache.h"
56 #include "xil_types.h"
57 #include "xpseudo_asm.h"
59 #include "xreg_cortexa53.h"
61 #include "xreg_cortexr5.h"
64 #include "xil_types.h"
66 extern void xil_printf(const char8 *ctrl1, ...);
68 #define DATA_LENGTH 128
71 static INTPTR Data[DATA_LENGTH] __attribute__ ((aligned(64)));
73 static INTPTR Data[DATA_LENGTH] __attribute__ ((aligned(32)));
77 /*****************************************************************************/
80 * @brief Perform DCache range related API test such as Xil_DCacheFlushRange
81 * and Xil_DCacheInvalidateRange. This test function writes a constant
82 * value to the Data array, flushes the range, writes a new value, then
83 * invalidates the corresponding range.
87 * - -1 is returned for a failure
88 * - 0 is returned for a pass
90 *****************************************************************************/
91 s32 Xil_TestDCacheRange(void)
98 xil_printf("-- Cache Range Test --\n\r");
100 for (Index = 0; Index < DATA_LENGTH; Index++)
101 Data[Index] = 0xA0A00505;
103 xil_printf(" initialize Data done:\r\n");
105 Xil_DCacheFlushRange((INTPTR)Data, DATA_LENGTH * sizeof(INTPTR));
107 xil_printf(" flush range done\r\n");
111 CtrlReg = mfcp(SCTLR_EL3);
112 CtrlReg &= ~(XREG_CONTROL_DCACHE_BIT);
113 mtcp(SCTLR_EL3,CtrlReg);
115 CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
116 CtrlReg &= ~(XREG_CP15_CONTROL_C_BIT);
117 mtcp(XREG_CP15_SYS_CONTROL, CtrlReg);
123 for (Index = 0; Index < DATA_LENGTH; Index++) {
125 if (Value != 0xA0A00505) {
127 xil_printf("Data[%d] = %x\r\n", Index, Value);
133 xil_printf(" Flush worked\r\n");
136 xil_printf("Error: flush dcache range not working\r\n");
140 CtrlReg = mfcp(SCTLR_EL3);
141 CtrlReg |= (XREG_CONTROL_DCACHE_BIT);
142 mtcp(SCTLR_EL3,CtrlReg);
144 CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
145 CtrlReg |= (XREG_CP15_CONTROL_C_BIT);
146 mtcp(XREG_CP15_SYS_CONTROL, CtrlReg);
149 for (Index = 0; Index < DATA_LENGTH; Index++)
150 Data[Index] = 0xA0A0C505;
154 Xil_DCacheFlushRange((INTPTR)Data, DATA_LENGTH * sizeof(INTPTR));
156 for (Index = 0; Index < DATA_LENGTH; Index++)
157 Data[Index] = Index + 3;
159 Xil_DCacheInvalidateRange((INTPTR)Data, DATA_LENGTH * sizeof(INTPTR));
161 xil_printf(" invalidate dcache range done\r\n");
164 CtrlReg = mfcp(SCTLR_EL3);
165 CtrlReg &= ~(XREG_CONTROL_DCACHE_BIT);
166 mtcp(SCTLR_EL3,CtrlReg);
168 CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
169 CtrlReg &= ~(XREG_CP15_CONTROL_C_BIT);
170 mtcp(XREG_CP15_SYS_CONTROL, CtrlReg);
173 for (Index = 0; Index < DATA_LENGTH; Index++)
174 Data[Index] = 0xA0A0A05;
177 CtrlReg = mfcp(SCTLR_EL3);
178 CtrlReg |= (XREG_CONTROL_DCACHE_BIT);
179 mtcp(SCTLR_EL3,CtrlReg);
181 CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
182 CtrlReg |= (XREG_CP15_CONTROL_C_BIT);
183 mtcp(XREG_CP15_SYS_CONTROL, CtrlReg);
189 for (Index = 0; Index < DATA_LENGTH; Index++) {
191 if (Value != 0xA0A0A05) {
193 xil_printf("Data[%d] = %x\r\n", Index, Value);
200 xil_printf(" Invalidate worked\r\n");
203 xil_printf("Error: Invalidate dcache range not working\r\n");
205 xil_printf("-- Cache Range Test Complete --\r\n");
210 /*****************************************************************************/
212 * @brief Perform DCache all related API test such as Xil_DCacheFlush and
213 * Xil_DCacheInvalidate. This test function writes a constant value
214 * to the Data array, flushes the DCache, writes a new value,
215 * then invalidates the DCache.
218 * - 0 is returned for a pass
219 * - -1 is returned for a failure
220 *****************************************************************************/
221 s32 Xil_TestDCacheAll(void)
228 xil_printf("-- Cache All Test --\n\r");
230 for (Index = 0; Index < DATA_LENGTH; Index++)
231 Data[Index] = 0x50500A0A;
232 xil_printf(" initialize Data done:\r\n");
235 xil_printf(" flush all done\r\n");
238 CtrlReg = mfcp(SCTLR_EL3);
239 CtrlReg &= ~(XREG_CONTROL_DCACHE_BIT);
240 mtcp(SCTLR_EL3,CtrlReg);
242 CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
243 CtrlReg &= ~(XREG_CP15_CONTROL_C_BIT);
244 mtcp(XREG_CP15_SYS_CONTROL, CtrlReg);
249 for (Index = 0; Index < DATA_LENGTH; Index++) {
252 if (Value != 0x50500A0A) {
254 xil_printf("Data[%d] = %x\r\n", Index, Value);
260 xil_printf(" Flush all worked\r\n");
263 xil_printf("Error: Flush dcache all not working\r\n");
267 CtrlReg = mfcp(SCTLR_EL3);
268 CtrlReg |= (XREG_CONTROL_DCACHE_BIT);
269 mtcp(SCTLR_EL3,CtrlReg);
271 CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
272 CtrlReg |= (XREG_CP15_CONTROL_C_BIT);
273 mtcp(XREG_CP15_SYS_CONTROL, CtrlReg);
276 for (Index = 0; Index < DATA_LENGTH; Index++)
277 Data[Index] = 0x505FFA0A;
282 for (Index = 0; Index < DATA_LENGTH; Index++)
283 Data[Index] = Index + 3;
285 Xil_DCacheInvalidate();
287 xil_printf(" invalidate all done\r\n");
290 CtrlReg = mfcp(SCTLR_EL3);
291 CtrlReg &= ~(XREG_CONTROL_DCACHE_BIT);
292 mtcp(SCTLR_EL3,CtrlReg);
294 CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
295 CtrlReg &= ~(XREG_CP15_CONTROL_C_BIT);
296 mtcp(XREG_CP15_SYS_CONTROL, CtrlReg);
299 for (Index = 0; Index < DATA_LENGTH; Index++)
300 Data[Index] = 0x50CFA0A;
303 CtrlReg = mfcp(SCTLR_EL3);
304 CtrlReg |= (XREG_CONTROL_DCACHE_BIT);
305 mtcp(SCTLR_EL3,CtrlReg);
307 CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
308 CtrlReg |= (XREG_CP15_CONTROL_C_BIT);
309 mtcp(XREG_CP15_SYS_CONTROL, CtrlReg);
314 for (Index = 0; Index < DATA_LENGTH; Index++) {
316 if (Value != 0x50CFA0A) {
318 xil_printf("Data[%d] = %x\r\n", Index, Value);
324 xil_printf(" Invalidate all worked\r\n");
327 xil_printf("Error: Invalidate dcache all not working\r\n");
330 xil_printf("-- DCache all Test Complete --\n\r");
335 /*****************************************************************************/
337 * @brief Perform Xil_ICacheInvalidateRange() on a few function pointers.
340 * - 0 is returned for a pass
342 * The function will hang if it fails.
343 *****************************************************************************/
344 s32 Xil_TestICacheRange(void)
347 Xil_ICacheInvalidateRange((INTPTR)Xil_TestICacheRange, 1024);
348 Xil_ICacheInvalidateRange((INTPTR)Xil_TestDCacheRange, 1024);
349 Xil_ICacheInvalidateRange((INTPTR)Xil_TestDCacheAll, 1024);
351 xil_printf("-- Invalidate icache range done --\r\n");
356 /*****************************************************************************/
358 * @brief Perform Xil_ICacheInvalidate() on a few function pointers.
361 * - 0 is returned for a pass
363 * The function will hang if it fails.
364 *****************************************************************************/
365 s32 Xil_TestICacheAll(void)
367 Xil_ICacheInvalidate();
368 xil_printf("-- Invalidate icache all done --\r\n");