2 FreeRTOS V9.0.0rc1 - Copyright (C) 2016 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 This file is part of the FreeRTOS distribution.
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9 FreeRTOS is free software; you can redistribute it and/or modify it under
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10 the terms of the GNU General Public License (version 2) as published by the
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11 Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
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13 ***************************************************************************
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14 >>! NOTE: The modification to the GPL is included to allow you to !<<
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15 >>! distribute a combined work that includes FreeRTOS without being !<<
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16 >>! obliged to provide the source code for proprietary components !<<
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17 >>! outside of the FreeRTOS kernel. !<<
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18 ***************************************************************************
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20 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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21 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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22 FOR A PARTICULAR PURPOSE. Full license text is available on the following
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23 link: http://www.freertos.org/a00114.html
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25 ***************************************************************************
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27 * FreeRTOS provides completely free yet professionally developed, *
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28 * robust, strictly quality controlled, supported, and cross *
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29 * platform software that is more than just the market leader, it *
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30 * is the industry's de facto standard. *
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32 * Help yourself get started quickly while simultaneously helping *
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33 * to support the FreeRTOS project by purchasing a FreeRTOS *
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34 * tutorial book, reference manual, or both: *
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35 * http://www.FreeRTOS.org/Documentation *
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37 ***************************************************************************
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39 http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
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40 the FAQ page "My application does not run, what could be wrong?". Have you
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41 defined configASSERT()?
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43 http://www.FreeRTOS.org/support - In return for receiving this top quality
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44 embedded software for free we request you assist our global community by
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45 participating in the support forum.
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47 http://www.FreeRTOS.org/training - Investing in training allows your team to
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48 be as productive as possible as early as possible. Now you can receive
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49 FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
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50 Ltd, and the world's leading authority on the world's leading RTOS.
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52 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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53 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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54 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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56 http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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57 Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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59 http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
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60 Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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61 licenses offer ticketed support, indemnification and commercial middleware.
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63 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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64 engineered and independently SIL3 certified version for use in safety and
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65 mission critical applications that require provable dependability.
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70 /* Standard includes. */
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73 /* FreeRTOS includes. */
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74 #include "FreeRTOS.h"
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77 /* ST library functions. */
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78 #include "stm32l1xx.h"
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81 * When configCREATE_LOW_POWER_DEMO is set to 1 then the tick interrupt
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82 * is generated by the TIM2 peripheral. The TIM2 configuration and handling
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83 * functions are defined in this file. Note the RTC is not used as there does
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84 * not appear to be a way to read back the RTC count value, and therefore the
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85 * only way of knowing exactly how long a sleep lasted is to use the very low
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86 * resolution calendar time.
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88 * When configCREATE_LOW_POWER_DEMO is set to 0 the tick interrupt is
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89 * generated by the standard FreeRTOS Cortex-M port layer, which uses the
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92 #if configCREATE_LOW_POWER_DEMO == 1
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94 /* The frequency at which TIM2 will run. */
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95 #define lpCLOCK_INPUT_FREQUENCY ( 1000UL )
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97 /* STM32 register used to ensure the TIM2 clock stops when the MCU is in debug
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99 #define DBGMCU_APB1_FZ ( * ( ( volatile unsigned long * ) 0xE0042008 ) )
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101 /*-----------------------------------------------------------*/
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104 * The tick interrupt is generated by the TIM2 timer.
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106 void TIM2_IRQHandler( void );
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108 /*-----------------------------------------------------------*/
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110 /* Calculate how many clock increments make up a single tick period. */
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111 static const uint32_t ulReloadValueForOneTick = ( ( lpCLOCK_INPUT_FREQUENCY / configTICK_RATE_HZ ) - 1 );
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113 /* Holds the maximum number of ticks that can be suppressed - which is
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114 basically how far into the future an interrupt can be generated. Set during
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116 static TickType_t xMaximumPossibleSuppressedTicks = 0;
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118 /* Flag set from the tick interrupt to allow the sleep processing to know if
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119 sleep mode was exited because of an tick interrupt or a different interrupt. */
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120 static volatile uint32_t ulTickFlag = pdFALSE;
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122 /*-----------------------------------------------------------*/
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124 /* The tick interrupt handler. This is always the same other than the part that
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125 clears the interrupt, which is specific to the clock being used to generate the
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127 void TIM2_IRQHandler( void )
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129 /* Clear the interrupt. */
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130 TIM_ClearITPendingBit( TIM2, TIM_IT_Update );
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132 /* The next block of code is from the standard FreeRTOS tick interrupt
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133 handler. The standard handler is not called directly in case future
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134 versions contain changes that make it no longer suitable for calling
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136 ( void ) portSET_INTERRUPT_MASK_FROM_ISR();
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138 if( xTaskIncrementTick() != pdFALSE )
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140 portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
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143 /* Just completely clear the interrupt mask on exit by passing 0 because
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144 it is known that this interrupt will only ever execute with the lowest
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145 possible interrupt priority. */
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147 portCLEAR_INTERRUPT_MASK_FROM_ISR( 0 );
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149 /* In case this is the first tick since the MCU left a low power mode the
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150 reload value is reset to its default. */
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151 TIM2->ARR = ( uint16_t ) ulReloadValueForOneTick;
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153 /* The CPU woke because of a tick. */
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154 ulTickFlag = pdTRUE;
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156 /*-----------------------------------------------------------*/
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158 /* Override the default definition of vPortSetupTimerInterrupt() that is weakly
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159 defined in the FreeRTOS Cortex-M3 port layer with a version that configures TIM2
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160 to generate the tick interrupt. */
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161 void vPortSetupTimerInterrupt( void )
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163 NVIC_InitTypeDef NVIC_InitStructure;
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164 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
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166 /* Enable the TIM2 clock. */
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167 RCC_APB1PeriphClockCmd( RCC_APB1Periph_TIM2, ENABLE );
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169 /* Ensure clock stops in debug mode. */
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170 DBGMCU_APB1_FZ |= DBGMCU_APB1_FZ_DBG_TIM2_STOP;
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172 /* Scale the clock so longer tickless periods can be achieved. The SysTick
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173 is not used as even when its frequency is divided by 8 the maximum tickless
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174 period with a system clock of 16MHz is only 8.3 seconds. Using a prescaled
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175 clock on the 16-bit TIM2 allows a tickless period of nearly 66 seconds,
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176 albeit at low resolution. */
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177 TIM_TimeBaseStructure.TIM_Prescaler = ( uint16_t ) ( SystemCoreClock / lpCLOCK_INPUT_FREQUENCY );
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178 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
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179 TIM_TimeBaseStructure.TIM_Period = ( uint16_t ) ( lpCLOCK_INPUT_FREQUENCY / configTICK_RATE_HZ );
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180 TIM_TimeBaseStructure.TIM_ClockDivision = 0;
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181 TIM_TimeBaseInit( TIM2, &TIM_TimeBaseStructure );
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183 /* Enable the TIM2 interrupt. This must execute at the lowest interrupt
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185 NVIC_InitStructure.NVIC_IRQChannel = TIM2_IRQn;
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186 NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = configLIBRARY_LOWEST_INTERRUPT_PRIORITY; /* Must be set to lowest priority. */
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187 NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
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188 NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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189 NVIC_Init(&NVIC_InitStructure);
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190 TIM_ITConfig( TIM2, TIM_IT_Update, ENABLE );
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191 TIM_SetCounter( TIM2, 0 );
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192 TIM_Cmd( TIM2, ENABLE );
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194 /* See the comments where xMaximumPossibleSuppressedTicks is declared. */
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195 xMaximumPossibleSuppressedTicks = ( ( unsigned long ) USHRT_MAX ) / ulReloadValueForOneTick;
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197 /*-----------------------------------------------------------*/
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199 /* Override the default definition of vPortSuppressTicksAndSleep() that is
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200 weakly defined in the FreeRTOS Cortex-M3 port layer with a version that manages
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201 the TIM2 interrupt, as the tick is generated from TIM2 compare matches events. */
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202 void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
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204 uint32_t ulCounterValue, ulCompleteTickPeriods;
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205 eSleepModeStatus eSleepAction;
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206 TickType_t xModifiableIdleTime;
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207 const TickType_t xRegulatorOffIdleTime = 30;
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209 /* THIS FUNCTION IS CALLED WITH THE SCHEDULER SUSPENDED. */
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211 /* Make sure the TIM2 reload value does not overflow the counter. */
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212 if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
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214 xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
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217 /* Calculate the reload value required to wait xExpectedIdleTime tick
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219 ulCounterValue = ulReloadValueForOneTick * xExpectedIdleTime;
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221 /* Stop TIM2 momentarily. The time TIM2 is stopped for is not accounted for
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222 in this implementation (as it is in the generic implementation) because the
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223 clock is so slow it is unlikely to be stopped for a complete count period
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225 TIM_Cmd( TIM2, DISABLE );
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227 /* Enter a critical section but don't use the taskENTER_CRITICAL() method as
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228 that will mask interrupts that should exit sleep mode. */
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229 __asm volatile ( "cpsid i" );
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230 __asm volatile ( "dsb" );
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231 __asm volatile ( "isb" );
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233 /* The tick flag is set to false before sleeping. If it is true when sleep
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234 mode is exited then sleep mode was probably exited because the tick was
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235 suppressed for the entire xExpectedIdleTime period. */
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236 ulTickFlag = pdFALSE;
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238 /* If a context switch is pending then abandon the low power entry as
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239 the context switch might have been pended by an external interrupt that
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240 requires processing. */
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241 eSleepAction = eTaskConfirmSleepModeStatus();
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242 if( eSleepAction == eAbortSleep )
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244 /* Restart tick. */
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245 TIM_Cmd( TIM2, ENABLE );
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247 /* Re-enable interrupts - see comments above the cpsid instruction()
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249 __asm volatile ( "cpsie i" );
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251 else if( eSleepAction == eNoTasksWaitingTimeout )
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253 /* A user definable macro that allows application code to be inserted
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254 here. Such application code can be used to minimise power consumption
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255 further by turning off IO, peripheral clocks, the Flash, etc. */
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256 configPRE_STOP_PROCESSING();
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258 /* There are no running state tasks and no tasks that are blocked with a
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259 time out. Assuming the application does not care if the tick time slips
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260 with respect to calendar time then enter a deep sleep that can only be
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261 woken by (in this demo case) the user button being pushed on the
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262 STM32L discovery board. If the application does require the tick time
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263 to keep better track of the calender time then the RTC peripheral can be
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264 used to make rough adjustments. */
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265 PWR_EnterSTOPMode( PWR_Regulator_LowPower, PWR_SLEEPEntry_WFI );
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267 /* A user definable macro that allows application code to be inserted
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268 here. Such application code can be used to reverse any actions taken
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269 by the configPRE_STOP_PROCESSING(). In this demo
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270 configPOST_STOP_PROCESSING() is used to re-initialise the clocks that
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271 were turned off when STOP mode was entered. */
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272 configPOST_STOP_PROCESSING();
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274 /* Restart tick. */
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275 TIM_SetCounter( TIM2, 0 );
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276 TIM_Cmd( TIM2, ENABLE );
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278 /* Re-enable interrupts - see comments above the cpsid instruction()
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280 __asm volatile ( "cpsie i" );
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281 __asm volatile ( "dsb" );
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282 __asm volatile ( "isb" );
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286 /* Trap underflow before the next calculation. */
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287 configASSERT( ulCounterValue >= TIM_GetCounter( TIM2 ) );
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289 /* Adjust the TIM2 value to take into account that the current time
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290 slice is already partially complete. */
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291 ulCounterValue -= ( uint32_t ) TIM_GetCounter( TIM2 );
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293 /* Trap overflow/underflow before the calculated value is written to
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295 configASSERT( ulCounterValue < ( uint32_t ) USHRT_MAX );
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296 configASSERT( ulCounterValue != 0 );
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298 /* Update to use the calculated overflow value. */
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299 TIM_SetAutoreload( TIM2, ( uint16_t ) ulCounterValue );
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300 TIM_SetCounter( TIM2, 0 );
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302 /* Restart the TIM2. */
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303 TIM_Cmd( TIM2, ENABLE );
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305 /* Allow the application to define some pre-sleep processing. This is
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306 the standard configPRE_SLEEP_PROCESSING() macro as described on the
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307 FreeRTOS.org website. */
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308 xModifiableIdleTime = xExpectedIdleTime;
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309 configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
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311 /* xExpectedIdleTime being set to 0 by configPRE_SLEEP_PROCESSING()
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312 means the application defined code has already executed the wait/sleep
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314 if( xModifiableIdleTime > 0 )
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316 /* The sleep mode used is dependent on the expected idle time
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317 as the deeper the sleep the longer the wake up time. See the
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318 comments at the top of main_low_power.c. Note xRegulatorOffIdleTime
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319 is set purely for convenience of demonstration and is not intended
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320 to be an optimised value. */
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321 if( xModifiableIdleTime > xRegulatorOffIdleTime )
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323 /* A slightly lower power sleep mode with a longer wake up
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325 PWR_EnterSleepMode( PWR_Regulator_LowPower, PWR_SLEEPEntry_WFI );
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329 /* A slightly higher power sleep mode with a faster wake up
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331 PWR_EnterSleepMode( PWR_Regulator_ON, PWR_SLEEPEntry_WFI );
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335 /* Allow the application to define some post sleep processing. This is
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336 the standard configPOST_SLEEP_PROCESSING() macro, as described on the
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337 FreeRTOS.org website. */
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338 configPOST_SLEEP_PROCESSING( xModifiableIdleTime );
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340 /* Stop TIM2. Again, the time the clock is stopped for in not accounted
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341 for here (as it would normally be) because the clock is so slow it is
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342 unlikely it will be stopped for a complete count period anyway. */
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343 TIM_Cmd( TIM2, DISABLE );
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345 /* Re-enable interrupts - see comments above the cpsid instruction()
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347 __asm volatile ( "cpsie i" );
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348 __asm volatile ( "dsb" );
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349 __asm volatile ( "isb" );
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351 if( ulTickFlag != pdFALSE )
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353 /* Trap overflows before the next calculation. */
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354 configASSERT( ulReloadValueForOneTick >= ( uint32_t ) TIM_GetCounter( TIM2 ) );
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356 /* The tick interrupt has already executed, although because this
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357 function is called with the scheduler suspended the actual tick
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358 processing will not occur until after this function has exited.
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359 Reset the reload value with whatever remains of this tick period. */
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360 ulCounterValue = ulReloadValueForOneTick - ( uint32_t ) TIM_GetCounter( TIM2 );
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362 /* Trap under/overflows before the calculated value is used. */
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363 configASSERT( ulCounterValue <= ( uint32_t ) USHRT_MAX );
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364 configASSERT( ulCounterValue != 0 );
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366 /* Use the calculated reload value. */
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367 TIM_SetAutoreload( TIM2, ( uint16_t ) ulCounterValue );
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368 TIM_SetCounter( TIM2, 0 );
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370 /* The tick interrupt handler will already have pended the tick
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371 processing in the kernel. As the pending tick will be processed as
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372 soon as this function exits, the tick value maintained by the tick
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373 is stepped forward by one less than the time spent sleeping. The
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374 actual stepping of the tick appears later in this function. */
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375 ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
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379 /* Something other than the tick interrupt ended the sleep. How
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380 many complete tick periods passed while the processor was
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382 ulCompleteTickPeriods = ( ( uint32_t ) TIM_GetCounter( TIM2 ) ) / ulReloadValueForOneTick;
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384 /* Check for over/under flows before the following calculation. */
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385 configASSERT( ( ( uint32_t ) TIM_GetCounter( TIM2 ) ) >= ( ulCompleteTickPeriods * ulReloadValueForOneTick ) );
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387 /* The reload value is set to whatever fraction of a single tick
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389 ulCounterValue = ( ( uint32_t ) TIM_GetCounter( TIM2 ) ) - ( ulCompleteTickPeriods * ulReloadValueForOneTick );
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390 configASSERT( ulCounterValue <= ( uint32_t ) USHRT_MAX );
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391 if( ulCounterValue == 0 )
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393 /* There is no fraction remaining. */
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394 ulCounterValue = ulReloadValueForOneTick;
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395 ulCompleteTickPeriods++;
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397 TIM_SetAutoreload( TIM2, ( uint16_t ) ulCounterValue );
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398 TIM_SetCounter( TIM2, 0 );
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401 /* Restart TIM2 so it runs up to the reload value. The reload value
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402 will get set to the value required to generate exactly one tick period
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403 the next time the TIM2 interrupt executes. */
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404 TIM_Cmd( TIM2, ENABLE );
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406 /* Wind the tick forward by the number of tick periods that the CPU
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407 remained in a low power state. */
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408 vTaskStepTick( ulCompleteTickPeriods );
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412 #endif /* configCREATE_LOW_POWER_DEMO == 1 */
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