git.sur5r.net Git - freertos/blob - FreeRTOS/Demo/ColdFire_MCF52221_CodeWarrior/sources/main.c

   1 /*\r
   2     FreeRTOS V7.5.2 - Copyright (C) 2013 Real Time Engineers Ltd.\r
   3 \r
   4     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
   5 \r
   6     ***************************************************************************\r
   7      *                                                                       *\r
   8      *    FreeRTOS provides completely free yet professionally developed,    *\r
   9      *    robust, strictly quality controlled, supported, and cross          *\r
  10      *    platform software that has become a de facto standard.             *\r
  11      *                                                                       *\r
  12      *    Help yourself get started quickly and support the FreeRTOS         *\r
  13      *    project by purchasing a FreeRTOS tutorial book, reference          *\r
  14      *    manual, or both from: http://www.FreeRTOS.org/Documentation        *\r
  15      *                                                                       *\r
  16      *    Thank you!                                                         *\r
  17      *                                                                       *\r
  18     ***************************************************************************\r
  19 \r
  20     This file is part of the FreeRTOS distribution.\r
  21 \r
  22     FreeRTOS is free software; you can redistribute it and/or modify it under\r
  23     the terms of the GNU General Public License (version 2) as published by the\r
  24     Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
  25 \r
  26     >>! NOTE: The modification to the GPL is included to allow you to distribute\r
  27     >>! a combined work that includes FreeRTOS without being obliged to provide\r
  28     >>! the source code for proprietary components outside of the FreeRTOS\r
  29     >>! kernel.\r
  30 \r
  31     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
  32     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
  33     FOR A PARTICULAR PURPOSE.  Full license text is available from the following\r
  34     link: http://www.freertos.org/a00114.html\r
  35 \r
  36     1 tab == 4 spaces!\r
  37 \r
  38     ***************************************************************************\r
  39      *                                                                       *\r
  40      *    Having a problem?  Start by reading the FAQ "My application does   *\r
  41      *    not run, what could be wrong?"                                     *\r
  42      *                                                                       *\r
  43      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
  44      *                                                                       *\r
  45     ***************************************************************************\r
  46 \r
  47     http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
  48     license and Real Time Engineers Ltd. contact details.\r
  49 \r
  50     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
  51     including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
  52     compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
  53 \r
  54     http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
  55     Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
  56     licenses offer ticketed support, indemnification and middleware.\r
  57 \r
  58     http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
  59     engineered and independently SIL3 certified version for use in safety and\r
  60     mission critical applications that require provable dependability.\r
  61 \r
  62     1 tab == 4 spaces!\r
  63 */\r
  64 \r
  65 \r
  66 /*\r
  67  * Creates all the demo application tasks, then starts the scheduler.  The WEB\r
  68  * documentation provides more details of the standard demo application tasks.\r
  69  * In addition to the standard demo tasks, the following tasks and tests are\r
  70  * defined and/or created within this file:\r
  71  *\r
  72  * "Check" task -  This only executes every five seconds but has a high priority\r
  73  * to ensure it gets processor time.  Its main function is to check that all the\r
  74  * standard demo tasks are still operational.  While no errors have been\r
  75  * discovered the check task will toggle an LED every 5 seconds - the toggle\r
  76  * rate increasing to 500ms being a visual indication that at least one task has\r
  77  * reported unexpected behaviour.\r
  78  *\r
  79  * "Reg test" tasks - These fill the registers with known values, then check\r
  80  * that each register still contains its expected value.  Each task uses\r
  81  * different values.  The tasks run with very low priority so get preempted very\r
  82  * frequently.  A register containing an unexpected value is indicative of an\r
  83  * error in the context switching mechanism.\r
  84  *\r
  85  */\r
  86 \r
  87 /* Standard includes. */\r
  88 #include <stdio.h>\r
  89 \r
  90 /* Scheduler includes. */\r
  91 #include "FreeRTOS.h"\r
  92 #include "task.h"\r
  93 #include "queue.h"\r
  94 #include "semphr.h"\r
  95 \r
  96 /* Demo app includes. */\r
  97 #include "BlockQ.h"\r
  98 #include "crflash.h"\r
  99 #include "partest.h"\r
 100 #include "semtest.h"\r
 101 #include "GenQTest.h"\r
 102 #include "QPeek.h"\r
 103 #include "comtest2.h"\r
 104 \r
 105 /*-----------------------------------------------------------*/\r
 106 \r
 107 /* The time between cycles of the 'check' functionality - as described at the\r
 108 top of this file. */\r
 109 #define mainNO_ERROR_PERIOD                                     ( ( portTickType ) 5000 / portTICK_RATE_MS )\r
 110 \r
 111 /* The rate at which the LED controlled by the 'check' task will flash should an\r
 112 error have been detected. */\r
 113 #define mainERROR_PERIOD                                        ( ( portTickType ) 500 / portTICK_RATE_MS )\r
 114 \r
 115 /* The LED controlled by the 'check' task. */\r
 116 #define mainCHECK_LED                                           ( 3 )\r
 117 \r
 118 /* ComTest constants - there is no free LED for the comtest tasks. */\r
 119 #define mainCOM_TEST_BAUD_RATE                          ( ( unsigned portLONG ) 19200 )\r
 120 #define mainCOM_TEST_LED                                        ( 5 )\r
 121 \r
 122 /* Task priorities. */\r
 123 #define mainCOM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 2 )\r
 124 #define mainCHECK_TASK_PRIORITY                         ( tskIDLE_PRIORITY + 3 )\r
 125 #define mainSEM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 1 )\r
 126 #define mainBLOCK_Q_PRIORITY                            ( tskIDLE_PRIORITY + 2 )\r
 127 #define mainGEN_QUEUE_TASK_PRIORITY                     ( tskIDLE_PRIORITY )\r
 128 \r
 129 /* Co-routines are used to flash the LEDs. */\r
 130 #define mainNUM_FLASH_CO_ROUTINES                       ( 3 )\r
 131 \r
 132 /* The baud rate used by the comtest tasks. */\r
 133 #define mainBAUD_RATE                                           ( 38400 )\r
 134 \r
 135 /* There is no spare LED for the comtest tasks, so this is set to an invalid\r
 136 number. */\r
 137 #define mainCOM_LED                                                     ( 4 )\r
 138 \r
 139 /*\r
 140  * Configure the hardware for the demo.\r
 141  */\r
 142 static void prvSetupHardware( void );\r
 143 \r
 144 /*\r
 145  * Implements the 'check' task functionality as described at the top of this\r
 146  * file.\r
 147  */\r
 148 static void prvCheckTask( void *pvParameters );\r
 149 \r
 150 /*\r
 151  * Implement the 'Reg test' functionality as described at the top of this file.\r
 152  */\r
 153 static void vRegTest1Task( void *pvParameters );\r
 154 static void vRegTest2Task( void *pvParameters );\r
 155 \r
 156 /*-----------------------------------------------------------*/\r
 157 \r
 158 /* Counters used to detect errors within the reg test tasks. */\r
 159 static volatile unsigned portLONG ulRegTest1Counter = 0x11111111, ulRegTest2Counter = 0x22222222;\r
 160 \r
 161 /*-----------------------------------------------------------*/\r
 162 \r
 163 int main( void )\r
 164 {\r
 165         /* Setup the hardware ready for this demo. */\r
 166         prvSetupHardware();\r
 167 \r
 168         /* Start the standard demo tasks. */\r
 169         vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
 170         vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );\r
 171         vStartQueuePeekTasks();\r
 172         vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
 173         vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainBAUD_RATE, mainCOM_LED );\r
 174 \r
 175         /* For demo purposes use some co-routines to flash the LEDs. */\r
 176         vStartFlashCoRoutines( mainNUM_FLASH_CO_ROUTINES );\r
 177 \r
 178         /* Create the check task. */\r
 179         xTaskCreate( prvCheckTask, ( signed portCHAR * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );\r
 180 \r
 181 \r
 182         /* Start the reg test tasks - defined in this file. */\r
 183         xTaskCreate( vRegTest1Task, ( signed portCHAR * ) "Reg1", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest1Counter, tskIDLE_PRIORITY, NULL );\r
 184         xTaskCreate( vRegTest2Task, ( signed portCHAR * ) "Reg2", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest2Counter, tskIDLE_PRIORITY, NULL );\r
 185 \r
 186         /* Start the scheduler. */\r
 187         vTaskStartScheduler();\r
 188 \r
 189     /* Will only get here if there was insufficient memory to create the idle\r
 190     task. */\r
 191         for( ;; )\r
 192         {\r
 193         }\r
 194 }\r
 195 /*-----------------------------------------------------------*/\r
 196 \r
 197 static void prvCheckTask( void *pvParameters )\r
 198 {\r
 199 unsigned portLONG ulTicksToWait = mainNO_ERROR_PERIOD, ulError = 0, ulLastRegTest1Count = 0, ulLastRegTest2Count = 0;\r
 200 portTickType xLastExecutionTime;\r
 201 volatile unsigned portBASE_TYPE uxUnusedStack;\r
 202 \r
 203         ( void ) pvParameters;\r
 204 \r
 205         /* Initialise the variable used to control our iteration rate prior to\r
 206         its first use. */\r
 207         xLastExecutionTime = xTaskGetTickCount();\r
 208 \r
 209         for( ;; )\r
 210         {\r
 211                 /* Wait until it is time to run the tests again. */\r
 212                 vTaskDelayUntil( &xLastExecutionTime, ulTicksToWait );\r
 213 \r
 214                 /* Has an error been found in any task? */\r
 215                 if( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
 216                 {\r
 217                         ulError |= 0x01UL;\r
 218                 }\r
 219 \r
 220                 if( xAreQueuePeekTasksStillRunning() != pdTRUE )\r
 221                 {\r
 222                         ulError |= 0x02UL;\r
 223                 }\r
 224 \r
 225                 if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
 226                 {\r
 227                         ulError |= 0x04UL;\r
 228                 }\r
 229 \r
 230                 if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
 231             {\r
 232                 ulError |= 0x20UL;\r
 233             }\r
 234             \r
 235             if( xAreComTestTasksStillRunning() != pdTRUE )\r
 236             {\r
 237                 ulError |= 0x40UL;\r
 238             }\r
 239 \r
 240                 if( ulLastRegTest1Count == ulRegTest1Counter )\r
 241                 {\r
 242                         ulError |= 0x1000UL;\r
 243                 }\r
 244 \r
 245                 if( ulLastRegTest2Count == ulRegTest2Counter )\r
 246                 {\r
 247                         ulError |= 0x1000UL;\r
 248                 }\r
 249 \r
 250                 ulLastRegTest1Count = ulRegTest1Counter;\r
 251                 ulLastRegTest2Count = ulRegTest2Counter;\r
 252 \r
 253                 /* If an error has been found then increase our cycle rate, and in so\r
 254                 doing increase the rate at which the check task LED toggles. */\r
 255                 if( ulError != 0 )\r
 256                 {\r
 257                 ulTicksToWait = mainERROR_PERIOD;\r
 258                 }\r
 259 \r
 260                 /* Toggle the LED each itteration. */\r
 261                 vParTestToggleLED( mainCHECK_LED );\r
 262                 \r
 263                 /* For demo only - how much unused stack does this task have? */\r
 264                 uxUnusedStack = uxTaskGetStackHighWaterMark( NULL );\r
 265         }\r
 266 }\r
 267 /*-----------------------------------------------------------*/\r
 268 \r
 269 void prvSetupHardware( void )\r
 270 {\r
 271         portDISABLE_INTERRUPTS();\r
 272 \r
 273         /* Setup the port used to toggle LEDs. */\r
 274         vParTestInitialise();\r
 275 }\r
 276 /*-----------------------------------------------------------*/\r
 277 \r
 278 void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed portCHAR *pcTaskName )\r
 279 {\r
 280         /* This will get called if a stack overflow is detected during the context\r
 281         switch.  Set configCHECK_FOR_STACK_OVERFLOWS to 2 to also check for stack\r
 282         problems within nested interrupts, but only do this for debug purposes as\r
 283         it will increase the context switch time. */\r
 284 \r
 285         ( void ) pxTask;\r
 286         ( void ) pcTaskName;\r
 287 \r
 288         for( ;; )\r
 289         {\r
 290         }\r
 291 }\r
 292 /*-----------------------------------------------------------*/\r
 293 \r
 294 void vApplicationIdleHook( void );\r
 295 void vApplicationIdleHook( void )\r
 296 {\r
 297         /* The co-routines run in the idle task. */\r
 298         vCoRoutineSchedule();\r
 299 }\r
 300 /*-----------------------------------------------------------*/\r
 301 \r
 302 void exit( int n )\r
 303 {\r
 304         /* To keep the linker happy only as the libraries have been removed from\r
 305         the build. */\r
 306         ( void ) n;\r
 307         for( ;; ) {}\r
 308 }\r
 309 /*-----------------------------------------------------------*/\r
 310 \r
 311 static void vRegTest1Task( void *pvParameters )\r
 312 {\r
 313         /* Sanity check - did we receive the parameter expected? */\r
 314         if( pvParameters != &ulRegTest1Counter )\r
 315         {\r
 316                 /* Change here so the check task can detect that an error occurred. */\r
 317                 for( ;; )\r
 318                 {\r
 319                 }\r
 320         }\r
 321 \r
 322         /* Set all the registers to known values, then check that each retains its\r
 323         expected value - as described at the top of this file.  If an error is\r
 324         found then the loop counter will no longer be incremented allowing the check\r
 325         task to recognise the error. */\r
 326         asm volatile    (       "reg_test_1_start:                                              \n\t"\r
 327                                                 "       moveq           #1, d0                                  \n\t"\r
 328                                                 "       moveq           #2, d1                                  \n\t"\r
 329                                                 "       moveq           #3, d2                                  \n\t"\r
 330                                                 "       moveq           #4, d3                                  \n\t"\r
 331                                                 "       moveq           #5, d4                                  \n\t"\r
 332                                                 "       moveq           #6, d5                                  \n\t"\r
 333                                                 "       moveq           #7, d6                                  \n\t"\r
 334                                                 "       moveq           #8, d7                                  \n\t"\r
 335                                                 "       move            #9, a0                                  \n\t"\r
 336                                                 "       move            #10, a1                                 \n\t"\r
 337                                                 "       move            #11, a2                                 \n\t"\r
 338                                                 "       move            #12, a3                                 \n\t"\r
 339                                                 "       move            #13, a4                                 \n\t"\r
 340                                                 "       move            #14, a5                                 \n\t"\r
 341                                                 "       move            #15, a6                                 \n\t"\r
 342                                                 "                                                                               \n\t"\r
 343                                                 "       cmpi.l          #1, d0                                  \n\t"\r
 344                                                 "       bne                     reg_test_1_error                \n\t"\r
 345                                                 "       cmpi.l          #2, d1                                  \n\t"\r
 346                                                 "       bne                     reg_test_1_error                \n\t"\r
 347                                                 "       cmpi.l          #3, d2                                  \n\t"\r
 348                                                 "       bne                     reg_test_1_error                \n\t"\r
 349                                                 "       cmpi.l          #4, d3                                  \n\t"\r
 350                                                 "       bne                     reg_test_1_error                \n\t"\r
 351                                                 "       cmpi.l          #5, d4                                  \n\t"\r
 352                                                 "       bne                     reg_test_1_error                \n\t"\r
 353                                                 "       cmpi.l          #6, d5                                  \n\t"\r
 354                                                 "       bne                     reg_test_1_error                \n\t"\r
 355                                                 "       cmpi.l          #7, d6                                  \n\t"\r
 356                                                 "       bne                     reg_test_1_error                \n\t"\r
 357                                                 "       cmpi.l          #8, d7                                  \n\t"\r
 358                                                 "       bne                     reg_test_1_error                \n\t"\r
 359                                                 "       move            a0, d0                                  \n\t"\r
 360                                                 "       cmpi.l          #9, d0                                  \n\t"\r
 361                                                 "       bne                     reg_test_1_error                \n\t"\r
 362                                                 "       move            a1, d0                                  \n\t"\r
 363                                                 "       cmpi.l          #10, d0                                 \n\t"\r
 364                                                 "       bne                     reg_test_1_error                \n\t"\r
 365                                                 "       move            a2, d0                                  \n\t"\r
 366                                                 "       cmpi.l          #11, d0                                 \n\t"\r
 367                                                 "       bne                     reg_test_1_error                \n\t"\r
 368                                                 "       move            a3, d0                                  \n\t"\r
 369                                                 "       cmpi.l          #12, d0                                 \n\t"\r
 370                                                 "       bne                     reg_test_1_error                \n\t"\r
 371                                                 "       move            a4, d0                                  \n\t"\r
 372                                                 "       cmpi.l          #13, d0                                 \n\t"\r
 373                                                 "       bne                     reg_test_1_error                \n\t"\r
 374                                                 "       move            a5, d0                                  \n\t"\r
 375                                                 "       cmpi.l          #14, d0                                 \n\t"\r
 376                                                 "       bne                     reg_test_1_error                \n\t"\r
 377                                                 "       move            a6, d0                                  \n\t"\r
 378                                                 "       cmpi.l          #15, d0                                 \n\t"\r
 379                                                 "       bne                     reg_test_1_error                \n\t"\r
 380                                                 "       move            ulRegTest1Counter, d0   \n\t"\r
 381                                                 "       addq            #1, d0                                  \n\t"\r
 382                                                 "       move            d0, ulRegTest1Counter   \n\t"\r
 383                                                 "       bra                     reg_test_1_start                \n\t"\r
 384                                                 "reg_test_1_error:                                              \n\t"\r
 385                                                 "       bra                     reg_test_1_error                \n\t"\r
 386                                         );\r
 387 }\r
 388 /*-----------------------------------------------------------*/\r
 389 \r
 390 static void vRegTest2Task( void *pvParameters )\r
 391 {\r
 392         /* Sanity check - did we receive the parameter expected? */\r
 393         if( pvParameters != &ulRegTest2Counter )\r
 394         {\r
 395                 /* Change here so the check task can detect that an error occurred. */\r
 396                 for( ;; )\r
 397                 {\r
 398                 }\r
 399         }\r
 400 \r
 401         /* Set all the registers to known values, then check that each retains its\r
 402         expected value - as described at the top of this file.  If an error is\r
 403         found then the loop counter will no longer be incremented allowing the check\r
 404         task to recognise the error. */\r
 405         asm volatile    (       "reg_test_2_start:                                              \n\t"\r
 406                                                 "       moveq           #10, d0                                 \n\t"\r
 407                                                 "       moveq           #20, d1                                 \n\t"\r
 408                                                 "       moveq           #30, d2                                 \n\t"\r
 409                                                 "       moveq           #40, d3                                 \n\t"\r
 410                                                 "       moveq           #50, d4                                 \n\t"\r
 411                                                 "       moveq           #60, d5                                 \n\t"\r
 412                                                 "       moveq           #70, d6                                 \n\t"\r
 413                                                 "       moveq           #80, d7                                 \n\t"\r
 414                                                 "       move            #90, a0                                 \n\t"\r
 415                                                 "       move            #100, a1                                \n\t"\r
 416                                                 "       move            #110, a2                                \n\t"\r
 417                                                 "       move            #120, a3                                \n\t"\r
 418                                                 "       move            #130, a4                                \n\t"\r
 419                                                 "       move            #140, a5                                \n\t"\r
 420                                                 "       move            #150, a6                                \n\t"\r
 421                                                 "                                                                               \n\t"\r
 422                                                 "       cmpi.l          #10, d0                                 \n\t"\r
 423                                                 "       bne                     reg_test_2_error                \n\t"\r
 424                                                 "       cmpi.l          #20, d1                                 \n\t"\r
 425                                                 "       bne                     reg_test_2_error                \n\t"\r
 426                                                 "       cmpi.l          #30, d2                                 \n\t"\r
 427                                                 "       bne                     reg_test_2_error                \n\t"\r
 428                                                 "       cmpi.l          #40, d3                                 \n\t"\r
 429                                                 "       bne                     reg_test_2_error                \n\t"\r
 430                                                 "       cmpi.l          #50, d4                                 \n\t"\r
 431                                                 "       bne                     reg_test_2_error                \n\t"\r
 432                                                 "       cmpi.l          #60, d5                                 \n\t"\r
 433                                                 "       bne                     reg_test_2_error                \n\t"\r
 434                                                 "       cmpi.l          #70, d6                                 \n\t"\r
 435                                                 "       bne                     reg_test_2_error                \n\t"\r
 436                                                 "       cmpi.l          #80, d7                                 \n\t"\r
 437                                                 "       bne                     reg_test_2_error                \n\t"\r
 438                                                 "       move            a0, d0                                  \n\t"\r
 439                                                 "       cmpi.l          #90, d0                                 \n\t"\r
 440                                                 "       bne                     reg_test_2_error                \n\t"\r
 441                                                 "       move            a1, d0                                  \n\t"\r
 442                                                 "       cmpi.l          #100, d0                                \n\t"\r
 443                                                 "       bne                     reg_test_2_error                \n\t"\r
 444                                                 "       move            a2, d0                                  \n\t"\r
 445                                                 "       cmpi.l          #110, d0                                \n\t"\r
 446                                                 "       bne                     reg_test_2_error                \n\t"\r
 447                                                 "       move            a3, d0                                  \n\t"\r
 448                                                 "       cmpi.l          #120, d0                                \n\t"\r
 449                                                 "       bne                     reg_test_2_error                \n\t"\r
 450                                                 "       move            a4, d0                                  \n\t"\r
 451                                                 "       cmpi.l          #130, d0                                \n\t"\r
 452                                                 "       bne                     reg_test_2_error                \n\t"\r
 453                                                 "       move            a5, d0                                  \n\t"\r
 454                                                 "       cmpi.l          #140, d0                                \n\t"\r
 455                                                 "       bne                     reg_test_2_error                \n\t"\r
 456                                                 "       move            a6, d0                                  \n\t"\r
 457                                                 "       cmpi.l          #150, d0                                \n\t"\r
 458                                                 "       bne                     reg_test_2_error                \n\t"\r
 459                                                 "       move            ulRegTest1Counter, d0   \n\t"\r
 460                                                 "       addq            #1, d0                                  \n\t"\r
 461                                                 "       move            d0, ulRegTest2Counter   \n\t"\r
 462                                                 "       bra                     reg_test_2_start                \n\t"\r
 463                                                 "reg_test_2_error:                                              \n\t"\r
 464                                                 "       bra                     reg_test_2_error                \n\t"\r
 465                                         );\r
 466 }\r
 467 /*-----------------------------------------------------------*/\r
 468 \r
 469 \r
 470 \r