1 /* Coldfire C Header File
\r
2 * Copyright Freescale Semiconductor Inc
\r
3 * All rights reserved.
\r
5 * 2008/04/17 Revision: 0.2
\r
7 * (c) Copyright UNIS, spol. s r.o. 1997-2008
\r
12 * http : www.processorexpert.com
\r
13 * mail : info@processorexpert.com
\r
16 #ifndef __MCF52259_ADC_H__
\r
17 #define __MCF52259_ADC_H__
\r
20 /*********************************************************************
\r
22 * Analog-to-Digital Converter (ADC)
\r
24 *********************************************************************/
\r
26 /* Register read/write macros */
\r
27 #define MCF_ADC_CTRL1 (*(vuint16*)(0x40190000))
\r
28 #define MCF_ADC_CTRL2 (*(vuint16*)(0x40190002))
\r
29 #define MCF_ADC_ADZCC (*(vuint16*)(0x40190004))
\r
30 #define MCF_ADC_ADLST1 (*(vuint16*)(0x40190006))
\r
31 #define MCF_ADC_ADLST2 (*(vuint16*)(0x40190008))
\r
32 #define MCF_ADC_ADSDIS (*(vuint16*)(0x4019000A))
\r
33 #define MCF_ADC_ADSTAT (*(vuint16*)(0x4019000C))
\r
34 #define MCF_ADC_ADLSTAT (*(vuint16*)(0x4019000E))
\r
35 #define MCF_ADC_ADZCSTAT (*(vuint16*)(0x40190010))
\r
36 #define MCF_ADC_ADRSLT0 (*(vuint16*)(0x40190012))
\r
37 #define MCF_ADC_ADRSLT1 (*(vuint16*)(0x40190014))
\r
38 #define MCF_ADC_ADRSLT2 (*(vuint16*)(0x40190016))
\r
39 #define MCF_ADC_ADRSLT3 (*(vuint16*)(0x40190018))
\r
40 #define MCF_ADC_ADRSLT4 (*(vuint16*)(0x4019001A))
\r
41 #define MCF_ADC_ADRSLT5 (*(vuint16*)(0x4019001C))
\r
42 #define MCF_ADC_ADRSLT6 (*(vuint16*)(0x4019001E))
\r
43 #define MCF_ADC_ADRSLT7 (*(vuint16*)(0x40190020))
\r
44 #define MCF_ADC_ADLLMT0 (*(vuint16*)(0x40190022))
\r
45 #define MCF_ADC_ADLLMT1 (*(vuint16*)(0x40190024))
\r
46 #define MCF_ADC_ADLLMT2 (*(vuint16*)(0x40190026))
\r
47 #define MCF_ADC_ADLLMT3 (*(vuint16*)(0x40190028))
\r
48 #define MCF_ADC_ADLLMT4 (*(vuint16*)(0x4019002A))
\r
49 #define MCF_ADC_ADLLMT5 (*(vuint16*)(0x4019002C))
\r
50 #define MCF_ADC_ADLLMT6 (*(vuint16*)(0x4019002E))
\r
51 #define MCF_ADC_ADLLMT7 (*(vuint16*)(0x40190030))
\r
52 #define MCF_ADC_ADHLMT0 (*(vuint16*)(0x40190032))
\r
53 #define MCF_ADC_ADHLMT1 (*(vuint16*)(0x40190034))
\r
54 #define MCF_ADC_ADHLMT2 (*(vuint16*)(0x40190036))
\r
55 #define MCF_ADC_ADHLMT3 (*(vuint16*)(0x40190038))
\r
56 #define MCF_ADC_ADHLMT4 (*(vuint16*)(0x4019003A))
\r
57 #define MCF_ADC_ADHLMT5 (*(vuint16*)(0x4019003C))
\r
58 #define MCF_ADC_ADHLMT6 (*(vuint16*)(0x4019003E))
\r
59 #define MCF_ADC_ADHLMT7 (*(vuint16*)(0x40190040))
\r
60 #define MCF_ADC_ADOFS0 (*(vuint16*)(0x40190042))
\r
61 #define MCF_ADC_ADOFS1 (*(vuint16*)(0x40190044))
\r
62 #define MCF_ADC_ADOFS2 (*(vuint16*)(0x40190046))
\r
63 #define MCF_ADC_ADOFS3 (*(vuint16*)(0x40190048))
\r
64 #define MCF_ADC_ADOFS4 (*(vuint16*)(0x4019004A))
\r
65 #define MCF_ADC_ADOFS5 (*(vuint16*)(0x4019004C))
\r
66 #define MCF_ADC_ADOFS6 (*(vuint16*)(0x4019004E))
\r
67 #define MCF_ADC_ADOFS7 (*(vuint16*)(0x40190050))
\r
68 #define MCF_ADC_POWER (*(vuint16*)(0x40190052))
\r
69 #define MCF_ADC_CAL (*(vuint16*)(0x40190054))
\r
70 #define MCF_ADC_ADRSLT(x) (*(vuint16*)(0x40190012 + ((x)*0x2)))
\r
71 #define MCF_ADC_ADLLMT(x) (*(vuint16*)(0x40190022 + ((x)*0x2)))
\r
72 #define MCF_ADC_ADHLMT(x) (*(vuint16*)(0x40190032 + ((x)*0x2)))
\r
73 #define MCF_ADC_ADOFS(x) (*(vuint16*)(0x40190042 + ((x)*0x2)))
\r
76 /* Bit definitions and macros for MCF_ADC_CTRL1 */
\r
77 #define MCF_ADC_CTRL1_SMODE(x) (((x)&0x7)<<0)
\r
78 #define MCF_ADC_CTRL1_CHNCFG(x) (((x)&0xF)<<0x4)
\r
79 #define MCF_ADC_CTRL1_HLMTIE (0x100)
\r
80 #define MCF_ADC_CTRL1_LLMTIE (0x200)
\r
81 #define MCF_ADC_CTRL1_ZCIE (0x400)
\r
82 #define MCF_ADC_CTRL1_EOSIE0 (0x800)
\r
83 #define MCF_ADC_CTRL1_SYNC0 (0x1000)
\r
84 #define MCF_ADC_CTRL1_START0 (0x2000)
\r
85 #define MCF_ADC_CTRL1_STOP0 (0x4000)
\r
87 /* Bit definitions and macros for MCF_ADC_CTRL2 */
\r
88 #define MCF_ADC_CTRL2_DIV(x) (((x)&0x1F)<<0)
\r
89 #define MCF_ADC_CTRL2_SIMULT (0x20)
\r
90 #define MCF_ADC_CTRL2_EOSIE1 (0x800)
\r
91 #define MCF_ADC_CTRL2_SYNC1 (0x1000)
\r
92 #define MCF_ADC_CTRL2_START1 (0x2000)
\r
93 #define MCF_ADC_CTRL2_STOP1 (0x4000)
\r
95 /* Bit definitions and macros for MCF_ADC_ADZCC */
\r
96 #define MCF_ADC_ADZCC_ZCE0(x) (((x)&0x3)<<0)
\r
97 #define MCF_ADC_ADZCC_ZCE1(x) (((x)&0x3)<<0x2)
\r
98 #define MCF_ADC_ADZCC_ZCE2(x) (((x)&0x3)<<0x4)
\r
99 #define MCF_ADC_ADZCC_ZCE3(x) (((x)&0x3)<<0x6)
\r
100 #define MCF_ADC_ADZCC_ZCE4(x) (((x)&0x3)<<0x8)
\r
101 #define MCF_ADC_ADZCC_ZCE5(x) (((x)&0x3)<<0xA)
\r
102 #define MCF_ADC_ADZCC_ZCE6(x) (((x)&0x3)<<0xC)
\r
103 #define MCF_ADC_ADZCC_ZCE7(x) (((x)&0x3)<<0xE)
\r
105 /* Bit definitions and macros for MCF_ADC_ADLST1 */
\r
106 #define MCF_ADC_ADLST1_SAMPLE0(x) (((x)&0x7)<<0)
\r
107 #define MCF_ADC_ADLST1_SAMPLE1(x) (((x)&0x7)<<0x4)
\r
108 #define MCF_ADC_ADLST1_SAMPLE2(x) (((x)&0x7)<<0x8)
\r
109 #define MCF_ADC_ADLST1_SAMPLE3(x) (((x)&0x7)<<0xC)
\r
111 /* Bit definitions and macros for MCF_ADC_ADLST2 */
\r
112 #define MCF_ADC_ADLST2_SAMPLE4(x) (((x)&0x7)<<0)
\r
113 #define MCF_ADC_ADLST2_SAMPLE5(x) (((x)&0x7)<<0x4)
\r
114 #define MCF_ADC_ADLST2_SAMPLE6(x) (((x)&0x7)<<0x8)
\r
115 #define MCF_ADC_ADLST2_SAMPLE7(x) (((x)&0x7)<<0xC)
\r
117 /* Bit definitions and macros for MCF_ADC_ADSDIS */
\r
118 #define MCF_ADC_ADSDIS_DS0 (0x1)
\r
119 #define MCF_ADC_ADSDIS_DS1 (0x2)
\r
120 #define MCF_ADC_ADSDIS_DS2 (0x4)
\r
121 #define MCF_ADC_ADSDIS_DS3 (0x8)
\r
122 #define MCF_ADC_ADSDIS_DS4 (0x10)
\r
123 #define MCF_ADC_ADSDIS_DS5 (0x20)
\r
124 #define MCF_ADC_ADSDIS_DS6 (0x40)
\r
125 #define MCF_ADC_ADSDIS_DS7 (0x80)
\r
127 /* Bit definitions and macros for MCF_ADC_ADSTAT */
\r
128 #define MCF_ADC_ADSTAT_RDY0 (0x1)
\r
129 #define MCF_ADC_ADSTAT_RDY1 (0x2)
\r
130 #define MCF_ADC_ADSTAT_RDY2 (0x4)
\r
131 #define MCF_ADC_ADSTAT_RDY3 (0x8)
\r
132 #define MCF_ADC_ADSTAT_RDY4 (0x10)
\r
133 #define MCF_ADC_ADSTAT_RDY5 (0x20)
\r
134 #define MCF_ADC_ADSTAT_RDY6 (0x40)
\r
135 #define MCF_ADC_ADSTAT_RDY7 (0x80)
\r
136 #define MCF_ADC_ADSTAT_HLMTI (0x100)
\r
137 #define MCF_ADC_ADSTAT_LLMTI (0x200)
\r
138 #define MCF_ADC_ADSTAT_ZCI (0x400)
\r
139 #define MCF_ADC_ADSTAT_EOSI0 (0x800)
\r
140 #define MCF_ADC_ADSTAT_EOSI1 (0x1000)
\r
141 #define MCF_ADC_ADSTAT_CIP1 (0x4000)
\r
142 #define MCF_ADC_ADSTAT_CIP0 (0x8000)
\r
144 /* Bit definitions and macros for MCF_ADC_ADLSTAT */
\r
145 #define MCF_ADC_ADLSTAT_LLS0 (0x1)
\r
146 #define MCF_ADC_ADLSTAT_LLS1 (0x2)
\r
147 #define MCF_ADC_ADLSTAT_LLS2 (0x4)
\r
148 #define MCF_ADC_ADLSTAT_LLS3 (0x8)
\r
149 #define MCF_ADC_ADLSTAT_LLS4 (0x10)
\r
150 #define MCF_ADC_ADLSTAT_LLS5 (0x20)
\r
151 #define MCF_ADC_ADLSTAT_LLS6 (0x40)
\r
152 #define MCF_ADC_ADLSTAT_LLS7 (0x80)
\r
153 #define MCF_ADC_ADLSTAT_HLS0 (0x100)
\r
154 #define MCF_ADC_ADLSTAT_HLS1 (0x200)
\r
155 #define MCF_ADC_ADLSTAT_HLS2 (0x400)
\r
156 #define MCF_ADC_ADLSTAT_HLS3 (0x800)
\r
157 #define MCF_ADC_ADLSTAT_HLS4 (0x1000)
\r
158 #define MCF_ADC_ADLSTAT_HLS5 (0x2000)
\r
159 #define MCF_ADC_ADLSTAT_HLS6 (0x4000)
\r
160 #define MCF_ADC_ADLSTAT_HLS7 (0x8000)
\r
162 /* Bit definitions and macros for MCF_ADC_ADZCSTAT */
\r
163 #define MCF_ADC_ADZCSTAT_ZCS0 (0x1)
\r
164 #define MCF_ADC_ADZCSTAT_ZCS1 (0x2)
\r
165 #define MCF_ADC_ADZCSTAT_ZCS2 (0x4)
\r
166 #define MCF_ADC_ADZCSTAT_ZCS3 (0x8)
\r
167 #define MCF_ADC_ADZCSTAT_ZCS4 (0x10)
\r
168 #define MCF_ADC_ADZCSTAT_ZCS5 (0x20)
\r
169 #define MCF_ADC_ADZCSTAT_ZCS6 (0x40)
\r
170 #define MCF_ADC_ADZCSTAT_ZCS7 (0x80)
\r
172 /* Bit definitions and macros for MCF_ADC_ADRSLT */
\r
173 #define MCF_ADC_ADRSLT_RSLT(x) (((x)&0xFFF)<<0x3)
\r
174 #define MCF_ADC_ADRSLT_SEXT (0x8000)
\r
176 /* Bit definitions and macros for MCF_ADC_ADLLMT */
\r
177 #define MCF_ADC_ADLLMT_LLMT(x) (((x)&0xFFF)<<0x3)
\r
179 /* Bit definitions and macros for MCF_ADC_ADHLMT */
\r
180 #define MCF_ADC_ADHLMT_HLMT(x) (((x)&0xFFF)<<0x3)
\r
182 /* Bit definitions and macros for MCF_ADC_ADOFS */
\r
183 #define MCF_ADC_ADOFS_OFFSET(x) (((x)&0xFFF)<<0x3)
\r
185 /* Bit definitions and macros for MCF_ADC_POWER */
\r
186 #define MCF_ADC_POWER_PD0 (0x1)
\r
187 #define MCF_ADC_POWER_PD1 (0x2)
\r
188 #define MCF_ADC_POWER_PD2 (0x4)
\r
189 #define MCF_ADC_POWER_APD (0x8)
\r
190 #define MCF_ADC_POWER_PUDELAY(x) (((x)&0x3F)<<0x4)
\r
191 #define MCF_ADC_POWER_PSTS0 (0x400)
\r
192 #define MCF_ADC_POWER_PSTS1 (0x800)
\r
193 #define MCF_ADC_POWER_PSTS2 (0x1000)
\r
194 #define MCF_ADC_POWER_ASB (0x8000)
\r
196 /* Bit definitions and macros for MCF_ADC_CAL */
\r
197 #define MCF_ADC_CAL_SEL_VREFL (0x4000)
\r
198 #define MCF_ADC_CAL_SEL_VREFH (0x8000)
\r
201 #endif /* __MCF52259_ADC_H__ */
\r
projects / freertos / blob