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1 /*\r
2     FreeRTOS V7.4.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
3 \r
4     FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME.  PLEASE VISIT\r
5     http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
6 \r
7     ***************************************************************************\r
8      *                                                                       *\r
9      *    FreeRTOS tutorial books are available in pdf and paperback.        *\r
10      *    Complete, revised, and edited pdf reference manuals are also       *\r
11      *    available.                                                         *\r
12      *                                                                       *\r
13      *    Purchasing FreeRTOS documentation will not only help you, by       *\r
14      *    ensuring you get running as quickly as possible and with an        *\r
15      *    in-depth knowledge of how to use FreeRTOS, it will also help       *\r
16      *    the FreeRTOS project to continue with its mission of providing     *\r
17      *    professional grade, cross platform, de facto standard solutions    *\r
18      *    for microcontrollers - completely free of charge!                  *\r
19      *                                                                       *\r
20      *    >>> See http://www.FreeRTOS.org/Documentation for details. <<<     *\r
21      *                                                                       *\r
22      *    Thank you for using FreeRTOS, and thank you for your support!      *\r
23      *                                                                       *\r
24     ***************************************************************************\r
25 \r
26 \r
27     This file is part of the FreeRTOS distribution.\r
28 \r
29     FreeRTOS is free software; you can redistribute it and/or modify it under\r
30     the terms of the GNU General Public License (version 2) as published by the\r
31     Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
32 \r
33     >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to\r
34     distribute a combined work that includes FreeRTOS without being obliged to\r
35     provide the source code for proprietary components outside of the FreeRTOS\r
36     kernel.\r
37 \r
38     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
39     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
40     FOR A PARTICULAR PURPOSE.  See the GNU General Public License for more\r
41     details. You should have received a copy of the GNU General Public License\r
42     and the FreeRTOS license exception along with FreeRTOS; if not itcan be\r
43     viewed here: http://www.freertos.org/a00114.html and also obtained by\r
44     writing to Real Time Engineers Ltd., contact details for whom are available\r
45     on the FreeRTOS WEB site.\r
46 \r
47     1 tab == 4 spaces!\r
48 \r
49     ***************************************************************************\r
50      *                                                                       *\r
51      *    Having a problem?  Start by reading the FAQ "My application does   *\r
52      *    not run, what could be wrong?"                                     *\r
53      *                                                                       *\r
54      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
55      *                                                                       *\r
56     ***************************************************************************\r
57 \r
58 \r
59     http://www.FreeRTOS.org - Documentation, books, training, latest versions, \r
60     license and Real Time Engineers Ltd. contact details.\r
61 \r
62     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
63     including FreeRTOS+Trace - an indispensable productivity tool, and our new\r
64     fully thread aware and reentrant UDP/IP stack.\r
65 \r
66     http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High \r
67     Integrity Systems, who sell the code with commercial support, \r
68     indemnification and middleware, under the OpenRTOS brand.\r
69     \r
70     http://www.SafeRTOS.com - High Integrity Systems also provide a safety \r
71     engineered and independently SIL3 certified version for use in safety and \r
72     mission critical applications that require provable dependability.\r
73 */\r
74 \r
75 \r
76 /*\r
77  * Creates all the demo application tasks, then starts the scheduler.  The WEB\r
78  * documentation provides more details of the standard demo application tasks.\r
79  * In addition to the standard demo tasks, the following tasks and tests are\r
80  * defined and/or created within this file:\r
81  *\r
82  * "Web server" - Very basic demonstration of the lwIP stack.  The WEB server\r
83  * simply generates a page that shows the current state of all the tasks within\r
84  * the system, including the high water mark of each task stack. The high water\r
85  * mark is displayed as the amount of stack that has never been used, so the\r
86  * closer the value is to zero the closer the task has come to overflowing its\r
87  * stack.  The IP address and net mask are set within FreeRTOSConfig.h.\r
88  *\r
89  * "Check" task -  This only executes every five seconds but has a high priority\r
90  * to ensure it gets processor time.  Its main function is to check that all the\r
91  * standard demo tasks are still operational.  While no errors have been\r
92  * discovered the check task will toggle an LED every 5 seconds - the toggle\r
93  * rate increasing to 500ms being a visual indication that at least one task has\r
94  * reported unexpected behaviour.\r
95  *\r
96  * "Reg test" tasks - These fill the registers with known values, then check\r
97  * that each register still contains its expected value.  Each task uses\r
98  * different values.  The tasks run with very low priority so get preempted very\r
99  * frequently.  A register containing an unexpected value is indicative of an\r
100  * error in the context switching mechanism.\r
101  *\r
102  */\r
103 \r
104 /* Standard includes. */\r
105 #include <stdio.h>\r
106 \r
107 /* Scheduler includes. */\r
108 #include "FreeRTOS.h"\r
109 #include "task.h"\r
110 #include "queue.h"\r
111 #include "semphr.h"\r
112 \r
113 /* Demo app includes. */\r
114 #include "BlockQ.h"\r
115 #include "death.h"\r
116 #include "flash.h"\r
117 #include "partest.h"\r
118 #include "semtest.h"\r
119 #include "PollQ.h"\r
120 #include "GenQTest.h"\r
121 #include "QPeek.h"\r
122 #include "recmutex.h"\r
123 \r
124 /*-----------------------------------------------------------*/\r
125 \r
126 /* The time between cycles of the 'check' functionality - as described at the\r
127 top of this file. */\r
128 #define mainNO_ERROR_PERIOD                                     ( ( portTickType ) 5000 / portTICK_RATE_MS )\r
129 \r
130 /* The rate at which the LED controlled by the 'check' task will flash should an\r
131 error have been detected. */\r
132 #define mainERROR_PERIOD                                        ( ( portTickType ) 500 / portTICK_RATE_MS )\r
133 \r
134 /* The LED controlled by the 'check' task. */\r
135 #define mainCHECK_LED                                           ( 3 )\r
136 \r
137 /* ComTest constants - there is no free LED for the comtest tasks. */\r
138 #define mainCOM_TEST_BAUD_RATE                          ( ( unsigned portLONG ) 19200 )\r
139 #define mainCOM_TEST_LED                                        ( 5 )\r
140 \r
141 /* Task priorities. */\r
142 #define mainCOM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 2 )\r
143 #define mainQUEUE_POLL_PRIORITY                         ( tskIDLE_PRIORITY + 2 )\r
144 #define mainCHECK_TASK_PRIORITY                         ( tskIDLE_PRIORITY + 3 )\r
145 #define mainSEM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 1 )\r
146 #define mainBLOCK_Q_PRIORITY                            ( tskIDLE_PRIORITY + 2 )\r
147 #define mainCREATOR_TASK_PRIORITY           ( tskIDLE_PRIORITY + 2 )\r
148 #define mainINTEGER_TASK_PRIORITY           ( tskIDLE_PRIORITY )\r
149 #define mainGEN_QUEUE_TASK_PRIORITY                     ( tskIDLE_PRIORITY )\r
150 #define mainWEB_TASK_PRIORITY                   ( tskIDLE_PRIORITY + 2 )\r
151 \r
152 /*\r
153  * Configure the hardware for the demo.\r
154  */\r
155 static void prvSetupHardware( void );\r
156 \r
157 /*\r
158  * Implements the 'check' task functionality as described at the top of this\r
159  * file.\r
160  */\r
161 static void prvCheckTask( void *pvParameters );\r
162 \r
163 /*\r
164  * Implement the 'Reg test' functionality as described at the top of this file.\r
165  */\r
166 static void vRegTest1Task( void *pvParameters );\r
167 static void vRegTest2Task( void *pvParameters );\r
168 \r
169 /*-----------------------------------------------------------*/\r
170 \r
171 /* Counters used to detect errors within the reg test tasks. */\r
172 static volatile unsigned portLONG ulRegTest1Counter = 0x11111111, ulRegTest2Counter = 0x22222222;\r
173 \r
174 /*-----------------------------------------------------------*/\r
175 \r
176 int main( void )\r
177 {\r
178 extern void vBasicWEBServer( void *pv );\r
179 \r
180         /* Setup the hardware ready for this demo. */\r
181         prvSetupHardware();\r
182         ( void )sys_thread_new("HTTPD", vBasicWEBServer, NULL, 320, mainWEB_TASK_PRIORITY );\r
183 \r
184         /* Start the standard demo tasks. */\r
185         vStartLEDFlashTasks( tskIDLE_PRIORITY );\r
186         vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
187         vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );\r
188         vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );\r
189         vStartQueuePeekTasks();\r
190         vStartRecursiveMutexTasks();\r
191         vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
192 \r
193         /* Start the reg test tasks - defined in this file. */\r
194         xTaskCreate( vRegTest1Task, ( signed portCHAR * ) "Reg1", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest1Counter, tskIDLE_PRIORITY, NULL );\r
195         xTaskCreate( vRegTest2Task, ( signed portCHAR * ) "Reg2", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest2Counter, tskIDLE_PRIORITY, NULL );\r
196 \r
197         /* Create the check task. */\r
198         xTaskCreate( prvCheckTask, ( signed portCHAR * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );\r
199 \r
200         /* The suicide tasks must be created last as they need to know how many\r
201         tasks were running prior to their creation in order to ascertain whether\r
202         or not the correct/expected number of tasks are running at any given time. */\r
203     vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY );\r
204 \r
205         /* Start the scheduler. */\r
206         vTaskStartScheduler();\r
207 \r
208     /* Will only get here if there was insufficient memory to create the idle\r
209     task. */\r
210         for( ;; )\r
211         {\r
212         }\r
213 }\r
214 /*-----------------------------------------------------------*/\r
215 \r
216 static void prvCheckTask( void *pvParameters )\r
217 {\r
218 unsigned ulTicksToWait = mainNO_ERROR_PERIOD, ulError = 0, ulLastRegTest1Count = 0, ulLastRegTest2Count = 0;\r
219 portTickType xLastExecutionTime;\r
220 \r
221         ( void ) pvParameters;\r
222 \r
223         /* Initialise the variable used to control our iteration rate prior to\r
224         its first use. */\r
225         xLastExecutionTime = xTaskGetTickCount();\r
226 \r
227         for( ;; )\r
228         {\r
229                 /* Wait until it is time to run the tests again. */\r
230                 vTaskDelayUntil( &xLastExecutionTime, ulTicksToWait );\r
231 \r
232                 /* Has an error been found in any task? */\r
233                 if( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
234                 {\r
235                         ulError |= 0x01UL;\r
236                 }\r
237 \r
238                 if( xAreQueuePeekTasksStillRunning() != pdTRUE )\r
239                 {\r
240                         ulError |= 0x02UL;\r
241                 }\r
242 \r
243                 if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
244                 {\r
245                         ulError |= 0x04UL;\r
246                 }\r
247 \r
248                 if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
249             {\r
250                 ulError |= 0x20UL;\r
251             }\r
252 \r
253                 if( xArePollingQueuesStillRunning() != pdTRUE )\r
254             {\r
255                 ulError |= 0x40UL;\r
256             }\r
257 \r
258                 if( xIsCreateTaskStillRunning() != pdTRUE )\r
259             {\r
260                 ulError |= 0x80UL;\r
261             }\r
262 \r
263                 if( xAreRecursiveMutexTasksStillRunning() != pdTRUE )\r
264             {\r
265                 ulError |= 0x200UL;\r
266             }\r
267 \r
268                 if( ulLastRegTest1Count == ulRegTest1Counter )\r
269                 {\r
270                         ulError |= 0x1000UL;\r
271                 }\r
272 \r
273                 if( ulLastRegTest2Count == ulRegTest2Counter )\r
274                 {\r
275                         ulError |= 0x1000UL;\r
276                 }\r
277 \r
278                 ulLastRegTest1Count = ulRegTest1Counter;\r
279                 ulLastRegTest2Count = ulRegTest2Counter;\r
280 \r
281                 /* If an error has been found then increase our cycle rate, and in so\r
282                 going increase the rate at which the check task LED toggles. */\r
283                 if( ulError != 0 )\r
284                 {\r
285                 ulTicksToWait = mainERROR_PERIOD;\r
286                 }\r
287 \r
288                 /* Toggle the LED each itteration. */\r
289                 vParTestToggleLED( mainCHECK_LED );\r
290         }\r
291 }\r
292 /*-----------------------------------------------------------*/\r
293 \r
294 void prvSetupHardware( void )\r
295 {\r
296         portDISABLE_INTERRUPTS();\r
297 \r
298         /* Setup the port used to toggle LEDs. */\r
299         vParTestInitialise();\r
300 }\r
301 /*-----------------------------------------------------------*/\r
302 \r
303 void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed portCHAR *pcTaskName )\r
304 {\r
305         /* This will get called if a stack overflow is detected during the context\r
306         switch.  Set configCHECK_FOR_STACK_OVERFLOWS to 2 to also check for stack\r
307         problems within nested interrupts, but only do this for debug purposes as\r
308         it will increase the context switch time. */\r
309 \r
310         ( void ) pxTask;\r
311         ( void ) pcTaskName;\r
312 \r
313         for( ;; )\r
314         {\r
315         }\r
316 }\r
317 /*-----------------------------------------------------------*/\r
318 \r
319 static void vRegTest1Task( void *pvParameters )\r
320 {\r
321         /* Sanity check - did we receive the parameter expected? */\r
322         if( pvParameters != &ulRegTest1Counter )\r
323         {\r
324                 /* Change here so the check task can detect that an error occurred. */\r
325                 for( ;; )\r
326                 {\r
327                 }\r
328         }\r
329 \r
330         /* Set all the registers to known values, then check that each retains its\r
331         expected value - as described at the top of this file.  If an error is\r
332         found then the loop counter will no longer be incremented allowing the check\r
333         task to recognise the error. */\r
334         asm volatile    (       "reg_test_1_start:                                              \n\t"\r
335                                                 "       moveq           #1, d0                                  \n\t"\r
336                                                 "       moveq           #2, d1                                  \n\t"\r
337                                                 "       moveq           #3, d2                                  \n\t"\r
338                                                 "       moveq           #4, d3                                  \n\t"\r
339                                                 "       moveq           #5, d4                                  \n\t"\r
340                                                 "       moveq           #6, d5                                  \n\t"\r
341                                                 "       moveq           #7, d6                                  \n\t"\r
342                                                 "       moveq           #8, d7                                  \n\t"\r
343                                                 "       move            #9, a0                                  \n\t"\r
344                                                 "       move            #10, a1                                 \n\t"\r
345                                                 "       move            #11, a2                                 \n\t"\r
346                                                 "       move            #12, a3                                 \n\t"\r
347                                                 "       move            #13, a4                                 \n\t"\r
348                                                 "       move            #14, a5                                 \n\t"\r
349                                                 "       move            #15, a6                                 \n\t"\r
350                                                 "                                                                               \n\t"\r
351                                                 "       cmpi.l          #1, d0                                  \n\t"\r
352                                                 "       bne                     reg_test_1_error                \n\t"\r
353                                                 "       cmpi.l          #2, d1                                  \n\t"\r
354                                                 "       bne                     reg_test_1_error                \n\t"\r
355                                                 "       cmpi.l          #3, d2                                  \n\t"\r
356                                                 "       bne                     reg_test_1_error                \n\t"\r
357                                                 "       cmpi.l          #4, d3                                  \n\t"\r
358                                                 "       bne                     reg_test_1_error                \n\t"\r
359                                                 "       cmpi.l          #5, d4                                  \n\t"\r
360                                                 "       bne                     reg_test_1_error                \n\t"\r
361                                                 "       cmpi.l          #6, d5                                  \n\t"\r
362                                                 "       bne                     reg_test_1_error                \n\t"\r
363                                                 "       cmpi.l          #7, d6                                  \n\t"\r
364                                                 "       bne                     reg_test_1_error                \n\t"\r
365                                                 "       cmpi.l          #8, d7                                  \n\t"\r
366                                                 "       bne                     reg_test_1_error                \n\t"\r
367                                                 "       move            a0, d0                                  \n\t"\r
368                                                 "       cmpi.l          #9, d0                                  \n\t"\r
369                                                 "       bne                     reg_test_1_error                \n\t"\r
370                                                 "       move            a1, d0                                  \n\t"\r
371                                                 "       cmpi.l          #10, d0                                 \n\t"\r
372                                                 "       bne                     reg_test_1_error                \n\t"\r
373                                                 "       move            a2, d0                                  \n\t"\r
374                                                 "       cmpi.l          #11, d0                                 \n\t"\r
375                                                 "       bne                     reg_test_1_error                \n\t"\r
376                                                 "       move            a3, d0                                  \n\t"\r
377                                                 "       cmpi.l          #12, d0                                 \n\t"\r
378                                                 "       bne                     reg_test_1_error                \n\t"\r
379                                                 "       move            a4, d0                                  \n\t"\r
380                                                 "       cmpi.l          #13, d0                                 \n\t"\r
381                                                 "       bne                     reg_test_1_error                \n\t"\r
382                                                 "       move            a5, d0                                  \n\t"\r
383                                                 "       cmpi.l          #14, d0                                 \n\t"\r
384                                                 "       bne                     reg_test_1_error                \n\t"\r
385                                                 "       move            a6, d0                                  \n\t"\r
386                                                 "       cmpi.l          #15, d0                                 \n\t"\r
387                                                 "       bne                     reg_test_1_error                \n\t"\r
388                                                 "       move            ulRegTest1Counter, d0   \n\t"\r
389                                                 "       addq            #1, d0                                  \n\t"\r
390                                                 "       move            d0, ulRegTest1Counter   \n\t"\r
391                                                 "       bra                     reg_test_1_start                \n\t"\r
392                                                 "reg_test_1_error:                                              \n\t"\r
393                                                 "       bra                     reg_test_1_error                \n\t"\r
394                                         );\r
395 }\r
396 /*-----------------------------------------------------------*/\r
397 \r
398 static void vRegTest2Task( void *pvParameters )\r
399 {\r
400         /* Sanity check - did we receive the parameter expected? */\r
401         if( pvParameters != &ulRegTest2Counter )\r
402         {\r
403                 /* Change here so the check task can detect that an error occurred. */\r
404                 for( ;; )\r
405                 {\r
406                 }\r
407         }\r
408 \r
409         /* Set all the registers to known values, then check that each retains its\r
410         expected value - as described at the top of this file.  If an error is\r
411         found then the loop counter will no longer be incremented allowing the check\r
412         task to recognise the error. */\r
413         asm volatile    (       "reg_test_2_start:                                              \n\t"\r
414                                                 "       moveq           #10, d0                                 \n\t"\r
415                                                 "       moveq           #20, d1                                 \n\t"\r
416                                                 "       moveq           #30, d2                                 \n\t"\r
417                                                 "       moveq           #40, d3                                 \n\t"\r
418                                                 "       moveq           #50, d4                                 \n\t"\r
419                                                 "       moveq           #60, d5                                 \n\t"\r
420                                                 "       moveq           #70, d6                                 \n\t"\r
421                                                 "       moveq           #80, d7                                 \n\t"\r
422                                                 "       move            #90, a0                                 \n\t"\r
423                                                 "       move            #100, a1                                \n\t"\r
424                                                 "       move            #110, a2                                \n\t"\r
425                                                 "       move            #120, a3                                \n\t"\r
426                                                 "       move            #130, a4                                \n\t"\r
427                                                 "       move            #140, a5                                \n\t"\r
428                                                 "       move            #150, a6                                \n\t"\r
429                                                 "                                                                               \n\t"\r
430                                                 "       cmpi.l          #10, d0                                 \n\t"\r
431                                                 "       bne                     reg_test_2_error                \n\t"\r
432                                                 "       cmpi.l          #20, d1                                 \n\t"\r
433                                                 "       bne                     reg_test_2_error                \n\t"\r
434                                                 "       cmpi.l          #30, d2                                 \n\t"\r
435                                                 "       bne                     reg_test_2_error                \n\t"\r
436                                                 "       cmpi.l          #40, d3                                 \n\t"\r
437                                                 "       bne                     reg_test_2_error                \n\t"\r
438                                                 "       cmpi.l          #50, d4                                 \n\t"\r
439                                                 "       bne                     reg_test_2_error                \n\t"\r
440                                                 "       cmpi.l          #60, d5                                 \n\t"\r
441                                                 "       bne                     reg_test_2_error                \n\t"\r
442                                                 "       cmpi.l          #70, d6                                 \n\t"\r
443                                                 "       bne                     reg_test_2_error                \n\t"\r
444                                                 "       cmpi.l          #80, d7                                 \n\t"\r
445                                                 "       bne                     reg_test_2_error                \n\t"\r
446                                                 "       move            a0, d0                                  \n\t"\r
447                                                 "       cmpi.l          #90, d0                                 \n\t"\r
448                                                 "       bne                     reg_test_2_error                \n\t"\r
449                                                 "       move            a1, d0                                  \n\t"\r
450                                                 "       cmpi.l          #100, d0                                \n\t"\r
451                                                 "       bne                     reg_test_2_error                \n\t"\r
452                                                 "       move            a2, d0                                  \n\t"\r
453                                                 "       cmpi.l          #110, d0                                \n\t"\r
454                                                 "       bne                     reg_test_2_error                \n\t"\r
455                                                 "       move            a3, d0                                  \n\t"\r
456                                                 "       cmpi.l          #120, d0                                \n\t"\r
457                                                 "       bne                     reg_test_2_error                \n\t"\r
458                                                 "       move            a4, d0                                  \n\t"\r
459                                                 "       cmpi.l          #130, d0                                \n\t"\r
460                                                 "       bne                     reg_test_2_error                \n\t"\r
461                                                 "       move            a5, d0                                  \n\t"\r
462                                                 "       cmpi.l          #140, d0                                \n\t"\r
463                                                 "       bne                     reg_test_2_error                \n\t"\r
464                                                 "       move            a6, d0                                  \n\t"\r
465                                                 "       cmpi.l          #150, d0                                \n\t"\r
466                                                 "       bne                     reg_test_2_error                \n\t"\r
467                                                 "       move            ulRegTest1Counter, d0   \n\t"\r
468                                                 "       addq            #1, d0                                  \n\t"\r
469                                                 "       move            d0, ulRegTest2Counter   \n\t"\r
470                                                 "       bra                     reg_test_2_start                \n\t"\r
471                                                 "reg_test_2_error:                                              \n\t"\r
472                                                 "       bra                     reg_test_2_error                \n\t"\r
473                                         );\r
474 }\r
475 /*-----------------------------------------------------------*/\r
476 \r
477 \r
478 \r