1 /* ----------------------------------------------------------------------------
\r
2 * ATMEL Microcontroller Software Support
\r
3 * ----------------------------------------------------------------------------
\r
4 * Copyright (c) 2008, Atmel Corporation
\r
6 * All rights reserved.
\r
8 * Redistribution and use in source and binary forms, with or without
\r
9 * modification, are permitted provided that the following conditions are met:
\r
11 * - Redistributions of source code must retain the above copyright notice,
\r
12 * this list of conditions and the disclaimer below.
\r
14 * Atmel's name may not be used to endorse or promote products derived from
\r
15 * this software without specific prior written permission.
\r
17 * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
\r
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
\r
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
\r
20 * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
\r
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
\r
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
\r
23 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
\r
24 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
\r
25 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
\r
26 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
\r
27 * ----------------------------------------------------------------------------
\r
30 #include "ISR_Support.h"
\r
33 IAR startup file for AT91SAM9XE microcontrollers.
\r
38 ;; Forward declaration of sections.
\r
39 SECTION IRQ_STACK:DATA:NOROOT(2)
\r
40 SECTION CSTACK:DATA:NOROOT(3)
\r
42 //------------------------------------------------------------------------------
\r
44 //------------------------------------------------------------------------------
\r
46 #define __ASSEMBLY__
\r
49 //------------------------------------------------------------------------------
\r
51 //------------------------------------------------------------------------------
\r
53 #define ARM_MODE_ABT 0x17
\r
54 #define ARM_MODE_FIQ 0x11
\r
55 #define ARM_MODE_IRQ 0x12
\r
56 #define ARM_MODE_SVC 0x13
\r
57 #define ARM_MODE_SYS 0x1F
\r
62 //------------------------------------------------------------------------------
\r
64 //------------------------------------------------------------------------------
\r
69 SECTION .vectors:CODE:NOROOT(2)
\r
74 EXTERN Undefined_Handler
\r
75 EXTERN vPortYieldProcessor
\r
76 EXTERN Prefetch_Handler
\r
77 EXTERN Abort_Handler
\r
82 __iar_init$$done: ; The interrupt vector is not needed
\r
83 ; until after copy initialization is done
\r
86 ; All default exception handlers (except reset) are
\r
87 ; defined as weak symbol definitions.
\r
88 ; If a handler is defined by the application it will take precedence.
\r
89 LDR pc, =resetHandler ; Reset
\r
90 LDR pc, Undefined_Addr ; Undefined instructions
\r
91 LDR pc, SWI_Addr ; Software interrupt (SWI/SVC)
\r
92 LDR pc, Prefetch_Addr ; Prefetch abort
\r
93 LDR pc, Abort_Addr ; Data abort
\r
95 LDR pc, =irqHandler ; IRQ
\r
96 LDR pc, FIQ_Addr ; FIQ
\r
98 Undefined_Addr: DCD Undefined_Handler
\r
99 SWI_Addr: DCD vPortYieldProcessor
\r
100 Prefetch_Addr: DCD Prefetch_Handler
\r
101 Abort_Addr: DCD Abort_Handler
\r
102 FIQ_Addr: DCD FIQ_Handler
\r
105 Handles incoming interrupt requests by branching to the corresponding
\r
106 handler, as defined in the AIC. Supports interrupt nesting.
\r
111 /* Write in the IVR to support Protect Mode */
\r
112 LDR lr, =AT91C_BASE_AIC
\r
113 LDR r0, [r14, #AIC_IVR]
\r
114 STR lr, [r14, #AIC_IVR]
\r
116 /* Branch to C portion of the interrupt handler */
\r
120 /* Acknowledge interrupt */
\r
121 LDR lr, =AT91C_BASE_AIC
\r
122 STR lr, [r14, #AIC_EOICR]
\r
124 portRESTORE_CONTEXT
\r
127 After a reset, execution starts here, the mode is ARM, supervisor
\r
128 with interrupts disabled.
\r
129 Initializes the chip and branches to the main() function.
\r
131 SECTION .cstartup:CODE:NOROOT(2)
\r
133 PUBLIC resetHandler
\r
134 EXTERN LowLevelInit
\r
136 REQUIRE resetVector
\r
141 /* Set pc to actual code location (i.e. not in remap zone) */
\r
144 /* Perform low-level initialization of the chip using LowLevelInit() */
\r
146 LDR r0, =LowLevelInit
\r
147 LDR r4, =SFE(CSTACK)
\r
152 /* Set up the interrupt stack pointer. */
\r
153 MSR cpsr_c, #ARM_MODE_IRQ | I_BIT | F_BIT ; Change the mode
\r
154 LDR sp, =SFE(IRQ_STACK)
\r
156 /* Set up the SVC stack pointer. */
\r
157 MSR cpsr_c, #ARM_MODE_SVC | F_BIT ; Change the mode
\r
158 LDR sp, =SFE(CSTACK)
\r
160 /* Branch to main() */
\r
165 /* Loop indefinitely when program is finished */
\r