1 /* ============================================================================ */
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2 /* Copyright (c) 2014, Texas Instruments Incorporated */
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3 /* All rights reserved. */
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5 /* Redistribution and use in source and binary forms, with or without */
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6 /* modification, are permitted provided that the following conditions */
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9 /* * Redistributions of source code must retain the above copyright */
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10 /* notice, this list of conditions and the following disclaimer. */
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12 /* * Redistributions in binary form must reproduce the above copyright */
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13 /* notice, this list of conditions and the following disclaimer in the */
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14 /* documentation and/or other materials provided with the distribution. */
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16 /* * Neither the name of Texas Instruments Incorporated nor the names of */
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17 /* its contributors may be used to endorse or promote products derived */
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18 /* from this software without specific prior written permission. */
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20 /* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */
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21 /* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */
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22 /* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */
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23 /* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */
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24 /* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */
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25 /* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */
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26 /* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */
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27 /* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */
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28 /* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */
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29 /* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
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30 /* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
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31 /* ============================================================================ */
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33 /******************************************************************************/
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34 /* lnk_msp430fr5969.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5969 PROGRAMS */
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36 /* Usage: lnk430 <obj files...> -o <out file> -m <map file> lnk.cmd */
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37 /* cl430 <src files...> -z -o <out file> -m <map file> lnk.cmd */
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39 /*----------------------------------------------------------------------------*/
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40 /* These linker options are for command line linking only. For IDE linking, */
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41 /* you should set your linker options in Project Properties */
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42 /* -c LINK USING C CONVENTIONS */
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43 /* -stack 0x0100 SOFTWARE STACK SIZE */
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44 /* -heap 0x0100 HEAP AREA SIZE */
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46 /*----------------------------------------------------------------------------*/
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47 /* Version: 1.159 */
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48 /*----------------------------------------------------------------------------*/
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50 /****************************************************************************/
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51 /* Specify the system memory map */
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52 /****************************************************************************/
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56 SFR : origin = 0x0000, length = 0x0010
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57 PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0
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58 PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100
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59 RAM : origin = 0x1C00, length = 0x0800
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60 INFOA : origin = 0x1980, length = 0x0080
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61 INFOB : origin = 0x1900, length = 0x0080
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62 INFOC : origin = 0x1880, length = 0x0080
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63 INFOD : origin = 0x1800, length = 0x0080
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64 FRAM : origin = 0x4400, length = 0xBB80
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65 FRAM2 : origin = 0x10000,length = 0x4000
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66 JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF
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67 BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF
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68 IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF
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69 INT00 : origin = 0xFF90, length = 0x0002
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70 INT01 : origin = 0xFF92, length = 0x0002
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71 INT02 : origin = 0xFF94, length = 0x0002
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72 INT03 : origin = 0xFF96, length = 0x0002
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73 INT04 : origin = 0xFF98, length = 0x0002
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74 INT05 : origin = 0xFF9A, length = 0x0002
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75 INT06 : origin = 0xFF9C, length = 0x0002
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76 INT07 : origin = 0xFF9E, length = 0x0002
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77 INT08 : origin = 0xFFA0, length = 0x0002
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78 INT09 : origin = 0xFFA2, length = 0x0002
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79 INT10 : origin = 0xFFA4, length = 0x0002
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80 INT11 : origin = 0xFFA6, length = 0x0002
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81 INT12 : origin = 0xFFA8, length = 0x0002
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82 INT13 : origin = 0xFFAA, length = 0x0002
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83 INT14 : origin = 0xFFAC, length = 0x0002
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84 INT15 : origin = 0xFFAE, length = 0x0002
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85 INT16 : origin = 0xFFB0, length = 0x0002
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86 INT17 : origin = 0xFFB2, length = 0x0002
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87 INT18 : origin = 0xFFB4, length = 0x0002
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88 INT19 : origin = 0xFFB6, length = 0x0002
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89 INT20 : origin = 0xFFB8, length = 0x0002
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90 INT21 : origin = 0xFFBA, length = 0x0002
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91 INT22 : origin = 0xFFBC, length = 0x0002
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92 INT23 : origin = 0xFFBE, length = 0x0002
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93 INT24 : origin = 0xFFC0, length = 0x0002
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94 INT25 : origin = 0xFFC2, length = 0x0002
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95 INT26 : origin = 0xFFC4, length = 0x0002
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96 INT27 : origin = 0xFFC6, length = 0x0002
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97 INT28 : origin = 0xFFC8, length = 0x0002
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98 INT29 : origin = 0xFFCA, length = 0x0002
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99 INT30 : origin = 0xFFCC, length = 0x0002
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100 INT31 : origin = 0xFFCE, length = 0x0002
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101 INT32 : origin = 0xFFD0, length = 0x0002
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102 INT33 : origin = 0xFFD2, length = 0x0002
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103 INT34 : origin = 0xFFD4, length = 0x0002
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104 INT35 : origin = 0xFFD6, length = 0x0002
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105 INT36 : origin = 0xFFD8, length = 0x0002
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106 INT37 : origin = 0xFFDA, length = 0x0002
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107 INT38 : origin = 0xFFDC, length = 0x0002
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108 INT39 : origin = 0xFFDE, length = 0x0002
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109 INT40 : origin = 0xFFE0, length = 0x0002
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110 INT41 : origin = 0xFFE2, length = 0x0002
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111 INT42 : origin = 0xFFE4, length = 0x0002
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112 INT43 : origin = 0xFFE6, length = 0x0002
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113 INT44 : origin = 0xFFE8, length = 0x0002
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114 INT45 : origin = 0xFFEA, length = 0x0002
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115 INT46 : origin = 0xFFEC, length = 0x0002
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116 INT47 : origin = 0xFFEE, length = 0x0002
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117 INT48 : origin = 0xFFF0, length = 0x0002
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118 INT49 : origin = 0xFFF2, length = 0x0002
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119 INT50 : origin = 0xFFF4, length = 0x0002
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120 INT51 : origin = 0xFFF6, length = 0x0002
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121 INT52 : origin = 0xFFF8, length = 0x0002
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122 INT53 : origin = 0xFFFA, length = 0x0002
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123 INT54 : origin = 0xFFFC, length = 0x0002
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124 RESET : origin = 0xFFFE, length = 0x0002
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127 /****************************************************************************/
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128 /* Specify the sections allocation into memory */
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129 /****************************************************************************/
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133 GROUP(READ_WRITE_MEMORY)
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135 .TI.persistent : {} /* For #pragma persistent */
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136 .cio : {} /* C I/O Buffer */
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137 .sysmem : {} /* Dynamic memory allocation area */
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138 } PALIGN(0x0400), RUN_END(fram_rx_start) > 0x4400
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140 .cinit : {} > FRAM /* Initialization tables */
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141 .pinit : {} > FRAM /* C++ Constructor tables */
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142 .init_array : {} > FRAM /* C++ Constructor tables */
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143 .mspabi.exidx : {} > FRAM /* C++ Constructor tables */
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144 .mspabi.extab : {} > FRAM /* C++ Constructor tables */
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145 #ifndef __LARGE_DATA_MODEL__
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146 .const : {} >> FRAM /* Constant data */
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148 .const : {} >> FRAM | FRAM2 /* Constant data */
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151 .text:_isr : {} > FRAM /* Code ISRs */
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152 #ifndef __LARGE_DATA_MODEL__
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153 .text : {} >> FRAM /* Code */
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155 .text : {} >> FRAM2 | FRAM /* Code */
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158 GROUP(IPENCAPSULATED_MEMORY)
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160 .ipestruct : {} /* IPE Data structure */
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161 .ipe : {} /* IPE */
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162 .ipe:_isr : {} /* IPE ISRs */
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163 } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) > FRAM
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165 .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */
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166 .bslsignature : {} > BSLSIGNATURE /* BSL Signature */
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168 GROUP(SIGNATURE_SHAREDMEMORY)
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170 .ipesignature : {} /* IPE Signature */
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171 .jtagpassword : {} /* JTAG Password */
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174 .bss : {} > RAM /* Global & static vars */
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175 .data : {} > RAM /* Global & static vars */
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176 .TI.noinit : {} > RAM /* For #pragma noinit */
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177 .stack : {} > RAM (HIGH) /* Software system stack */
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179 .infoA : {} > INFOA /* MSP430 INFO FRAM Memory segments */
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180 .infoB : {} > INFOB
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181 .infoC : {} > INFOC
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182 .infoD : {} > INFOD
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184 /* MSP430 Interrupt vectors */
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185 .int00 : {} > INT00
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186 .int01 : {} > INT01
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187 .int02 : {} > INT02
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188 .int03 : {} > INT03
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189 .int04 : {} > INT04
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190 .int05 : {} > INT05
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191 .int06 : {} > INT06
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192 .int07 : {} > INT07
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193 .int08 : {} > INT08
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194 .int09 : {} > INT09
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195 .int10 : {} > INT10
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196 .int11 : {} > INT11
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197 .int12 : {} > INT12
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198 .int13 : {} > INT13
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199 .int14 : {} > INT14
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200 .int15 : {} > INT15
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201 .int16 : {} > INT16
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202 .int17 : {} > INT17
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203 .int18 : {} > INT18
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204 .int19 : {} > INT19
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205 .int20 : {} > INT20
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206 .int21 : {} > INT21
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207 .int22 : {} > INT22
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208 .int23 : {} > INT23
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209 .int24 : {} > INT24
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210 .int25 : {} > INT25
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211 .int26 : {} > INT26
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212 .int27 : {} > INT27
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213 .int28 : {} > INT28
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214 .int29 : {} > INT29
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215 AES256 : { * ( .int30 ) } > INT30 type = VECT_INIT
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216 RTC : { * ( .int31 ) } > INT31 type = VECT_INIT
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217 PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT
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218 PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT
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219 TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT
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220 TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT
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221 PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT
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222 TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT
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223 TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT
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224 PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT
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225 TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT
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226 TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT
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227 DMA : { * ( .int42 ) } > INT42 type = VECT_INIT
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228 USCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT
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229 TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT
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230 TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT
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231 ADC12 : { * ( .int46 ) } > INT46 type = VECT_INIT
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232 USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT
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233 USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT
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234 WDT : { * ( .int49 ) } > INT49 type = VECT_INIT
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235 TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT
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236 TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT
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237 COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT
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238 UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT
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239 SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT
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240 .reset : {} > RESET /* MSP430 Reset vector */
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243 /****************************************************************************/
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244 /* MPU/IPE Specific memory segment definitons */
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245 /****************************************************************************/
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248 #define IPE_MPUIPLOCK 0x0080
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249 #define IPE_MPUIPENA 0x0040
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250 #define IPE_MPUIPPUC 0x0020
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252 // Evaluate settings for the control setting of IP Encapsulation
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253 #if defined(_IPE_ASSERTPUC1)
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254 #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08))
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255 fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK);
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256 #elif defined(_IPE_LOCK )
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257 fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK);
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258 #elif (_IPE_ASSERTPUC1 == 0x08)
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259 fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC);
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261 fram_ipe_enable_value = (IPE_MPUIPENA);
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264 #if defined(_IPE_LOCK )
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265 fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK);
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267 fram_ipe_enable_value = (IPE_MPUIPENA);
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271 // Segment definitions
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272 #ifdef _IPE_MANUAL // For custom sizes selected in the GUI
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273 fram_ipe_border1 = (_IPE_SEGB1>>4);
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274 fram_ipe_border2 = (_IPE_SEGB2>>4);
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275 #else // Automated sizes generated by the Linker
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276 fram_ipe_border2 = (fram_ipe_end + 0x400)>> 4;
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277 fram_ipe_border1 = fram_ipe_start >> 4;
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280 fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4;
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281 fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1));
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285 #define MPUPW (0xA500) /* MPU Access Password */
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286 #define MPUENA (0x0001) /* MPU Enable */
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287 #define MPULOCK (0x0002) /* MPU Lock */
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288 #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */
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291 // Segment definitions
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292 #ifdef _MPU_MANUAL // For custom sizes selected in the GUI
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293 mpu_segment_border1 = _MPU_SEGB1 >> 4;
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294 mpu_segment_border2 = _MPU_SEGB2 >> 4;
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295 mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1;
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296 #else // Automated sizes generated by Linker
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297 mpu_segment_border1 = fram_rx_start >> 4;
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298 mpu_segment_border2 = fram_rx_start >> 4;
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299 mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW
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302 #ifdef _MPU_ENABLE_NMI
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303 mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE;
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305 mpu_ctl0_value = MPUPW | MPUENA | MPULOCK;
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308 #ifdef _MPU_ENABLE_NMI
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309 mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE;
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311 mpu_ctl0_value = MPUPW | MPUENA;
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316 /****************************************************************************/
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317 /* Include peripherals memory map */
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318 /****************************************************************************/
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320 -l msp430fr5969.cmd
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