2 FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 ***************************************************************************
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9 * FreeRTOS provides completely free yet professionally developed, *
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10 * robust, strictly quality controlled, supported, and cross *
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11 * platform software that has become a de facto standard. *
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13 * Help yourself get started quickly and support the FreeRTOS *
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14 * project by purchasing a FreeRTOS tutorial book, reference *
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15 * manual, or both from: http://www.FreeRTOS.org/Documentation *
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19 ***************************************************************************
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21 This file is part of the FreeRTOS distribution.
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23 FreeRTOS is free software; you can redistribute it and/or modify it under
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24 the terms of the GNU General Public License (version 2) as published by the
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25 Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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27 >>! NOTE: The modification to the GPL is included to allow you to distribute
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28 >>! a combined work that includes FreeRTOS without being obliged to provide
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29 >>! the source code for proprietary components outside of the FreeRTOS
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32 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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33 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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34 FOR A PARTICULAR PURPOSE. Full license text is available from the following
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35 link: http://www.freertos.org/a00114.html
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39 ***************************************************************************
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41 * Having a problem? Start by reading the FAQ "My application does *
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42 * not run, what could be wrong?" *
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44 * http://www.FreeRTOS.org/FAQHelp.html *
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46 ***************************************************************************
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48 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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49 license and Real Time Engineers Ltd. contact details.
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51 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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52 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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53 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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55 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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56 Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
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57 licenses offer ticketed support, indemnification and middleware.
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59 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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60 engineered and independently SIL3 certified version for use in safety and
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61 mission critical applications that require provable dependability.
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68 BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR UART
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71 /* Scheduler includes. */
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72 #include "FreeRTOS.h"
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76 /* Demo application includes. */
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79 /* Microblaze driver includes. */
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80 #include "xuartlite_l.h"
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81 #include "xintc_l.h"
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83 /*-----------------------------------------------------------*/
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85 /* Queues used to hold received characters, and characters waiting to be
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87 static QueueHandle_t xRxedChars;
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88 static QueueHandle_t xCharsForTx;
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90 /*-----------------------------------------------------------*/
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92 xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
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94 unsigned long ulControlReg, ulMask;
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96 /* NOTE: The baud rate used by this driver is determined by the hardware
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97 parameterization of the UART Lite peripheral, and the baud value passed to
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98 this function has no effect. */
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100 /* Create the queues used to hold Rx and Tx characters. */
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101 xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
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102 xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
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104 if( ( xRxedChars ) && ( xCharsForTx ) )
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106 /* Disable the interrupt. */
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107 XUartLite_mDisableIntr( XPAR_RS232_UART_BASEADDR );
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109 /* Flush the fifos. */
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110 ulControlReg = XIo_In32( XPAR_RS232_UART_BASEADDR + XUL_STATUS_REG_OFFSET );
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111 XIo_Out32( XPAR_RS232_UART_BASEADDR + XUL_CONTROL_REG_OFFSET, ulControlReg | XUL_CR_FIFO_TX_RESET | XUL_CR_FIFO_RX_RESET );
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113 /* Enable the interrupt again. The interrupt controller has not yet been
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114 initialised so there is no chance of receiving an interrupt until the
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115 scheduler has been started. */
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116 XUartLite_mEnableIntr( XPAR_RS232_UART_BASEADDR );
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118 /* Enable the interrupt in the interrupt controller while maintaining
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119 all the other bit settings. */
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120 ulMask = XIntc_In32( ( XPAR_OPB_INTC_0_BASEADDR + XIN_IER_OFFSET ) );
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121 ulMask |= XPAR_RS232_UART_INTERRUPT_MASK;
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122 XIntc_Out32( ( XPAR_OPB_INTC_0_BASEADDR + XIN_IER_OFFSET ), ( ulMask ) );
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123 XIntc_mAckIntr( XPAR_INTC_SINGLE_BASEADDR, 2 );
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126 return ( xComPortHandle ) 0;
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128 /*-----------------------------------------------------------*/
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130 signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed char *pcRxedChar, TickType_t xBlockTime )
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132 /* The port handle is not required as this driver only supports one UART. */
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135 /* Get the next character from the buffer. Return false if no characters
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136 are available, or arrive before xBlockTime expires. */
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137 if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
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146 /*-----------------------------------------------------------*/
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148 signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed char cOutChar, TickType_t xBlockTime )
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150 portBASE_TYPE xReturn = pdTRUE;
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152 portENTER_CRITICAL();
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154 /* If the UART FIFO is full we can block posting the new data on the
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156 if( XUartLite_mIsTransmitFull( XPAR_RS232_UART_BASEADDR ) )
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158 if( xQueueSend( xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )
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163 /* Otherwise, if there is data already in the queue we should add the
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164 new data to the back of the queue to ensure the sequencing is
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166 else if( uxQueueMessagesWaiting( xCharsForTx ) )
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168 if( xQueueSend( xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )
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173 /* If the UART FIFO is not full and there is no data already in the
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174 queue we can write directly to the FIFO without disrupting the
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178 XIo_Out32( XPAR_RS232_UART_BASEADDR + XUL_TX_FIFO_OFFSET, cOutChar );
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181 portEXIT_CRITICAL();
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185 /*-----------------------------------------------------------*/
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187 void vSerialClose( xComPortHandle xPort )
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189 /* Not supported as not required by the demo application. */
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192 /*-----------------------------------------------------------*/
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194 void vSerialISR( void *pvBaseAddress )
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196 unsigned long ulISRStatus;
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197 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
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200 /* Determine the cause of the interrupt. */
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201 ulISRStatus = XIo_In32( XPAR_RS232_UART_BASEADDR + XUL_STATUS_REG_OFFSET );
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203 if( ( ulISRStatus & ( XUL_SR_RX_FIFO_FULL | XUL_SR_RX_FIFO_VALID_DATA ) ) != 0 )
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205 /* A character is available - place it in the queue of received
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206 characters. This might wake a task that was blocked waiting for
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208 cChar = ( char )XIo_In32( XPAR_RS232_UART_BASEADDR + XUL_RX_FIFO_OFFSET );
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209 xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
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212 if( ( ulISRStatus & XUL_SR_TX_FIFO_EMPTY ) != 0 )
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214 /* There is space in the FIFO - if there are any characters queue for
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215 transmission they can be send to the UART now. This might unblock a
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216 task that was waiting for space to become available on the Tx queue. */
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217 if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
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219 XIo_Out32( XPAR_RS232_UART_BASEADDR + XUL_TX_FIFO_OFFSET, cChar );
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223 /* If we woke any tasks we may require a context switch. */
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224 if( xHigherPriorityTaskWoken )
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226 portYIELD_FROM_ISR();
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