git.sur5r.net Git - freertos/blob - FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/BSP/microblaze_0/libsrc/tmrctr_v3_0/src/xtmrctr_intr.c

   1 /******************************************************************************
   2 *
   3 * Copyright (C) 2002 - 2014 Xilinx, Inc.  All rights reserved.
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   5 * Permission is hereby granted, free of charge, to any person obtaining a copy
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   9 * copies of the Software, and to permit persons to whom the Software is
  10 * furnished to do so, subject to the following conditions:
  11 *
  12 * The above copyright notice and this permission notice shall be included in
  13 * all copies or substantial portions of the Software.
  14 *
  15 * Use of the Software is limited solely to applications:
  16 * (a) running on a Xilinx device, or
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  18 *
  19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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  24 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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  29 * this Software without prior written authorization from Xilinx.
  30 *
  31 ******************************************************************************/
  32 /*****************************************************************************/
  33 /**
  34 *
  35 * @file xtmrctr_intr.c
  36 *
  37 * Contains interrupt-related functions for the XTmrCtr component.
  38 *
  39 * <pre>
  40 * MODIFICATION HISTORY:
  41 *
  42 * Ver   Who  Date     Changes
  43 * ----- ---- -------- -----------------------------------------------
  44 * 1.00b jhl  02/06/02 First release
  45 * 1.10b mta  03/21/07 Updated to new coding style
  46 * 2.00a ktn  10/30/09 Updated to use HAL API's. _m is removed from all the macro
  47 *                     definitions.
  48 * 2.03a rvo  11/30/10 Added check to see if interrupt is enabled before further
  49 *                     processing for CR 584557.
  50 * </pre>
  51 *
  52 ******************************************************************************/
  53
  54 /***************************** Include Files *********************************/
  55
  56 #include "xtmrctr.h"
  57
  58
  59 /************************** Constant Definitions *****************************/
  60
  61
  62 /**************************** Type Definitions *******************************/
  63
  64
  65 /***************** Macros (Inline Functions) Definitions *********************/
  66
  67
  68 /************************** Function Prototypes ******************************/
  69
  70
  71 /************************** Variable Definitions *****************************/
  72
  73
  74 /*****************************************************************************/
  75 /**
  76 *
  77 * Sets the timer callback function, which the driver calls when the specified
  78 * timer times out.
  79 *
  80 * @param        InstancePtr is a pointer to the XTmrCtr instance .
  81 * @param        CallBackRef is the upper layer callback reference passed back
  82 *               when the callback function is invoked.
  83 * @param        FuncPtr is the pointer to the callback function.
  84 *
  85 * @return       None.
  86 *
  87 * @note
  88 *
  89 * The handler is called within interrupt context so the function that is
  90 * called should either be short or pass the more extensive processing off
  91 * to another task to allow the interrupt to return and normal processing
  92 * to continue.
  93 *
  94 ******************************************************************************/
  95 void XTmrCtr_SetHandler(XTmrCtr * InstancePtr, XTmrCtr_Handler FuncPtr,
  96                         void *CallBackRef)
  97 {
  98         Xil_AssertVoid(InstancePtr != NULL);
  99         Xil_AssertVoid(FuncPtr != NULL);
 100         Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
 101
 102         InstancePtr->Handler = FuncPtr;
 103         InstancePtr->CallBackRef = CallBackRef;
 104 }
 105
 106 /*****************************************************************************/
 107 /**
 108 *
 109 * Interrupt Service Routine (ISR) for the driver.  This function only performs
 110 * processing for the device and does not save and restore the interrupt context.
 111 *
 112 * @param        InstancePtr contains a pointer to the timer/counter instance for
 113 *               the interrupt.
 114 *
 115 * @return       None.
 116 *
 117 * @note         None.
 118 *
 119 ******************************************************************************/
 120 void XTmrCtr_InterruptHandler(void *InstancePtr)
 121 {
 122         XTmrCtr *TmrCtrPtr = NULL;
 123         u8 TmrCtrNumber;
 124         u32 ControlStatusReg;
 125
 126         /*
 127          * Verify that each of the inputs are valid.
 128          */
 129         Xil_AssertVoid(InstancePtr != NULL);
 130
 131         /*
 132          * Convert the non-typed pointer to an timer/counter instance pointer
 133          * such that there is access to the timer/counter
 134          */
 135         TmrCtrPtr = (XTmrCtr *) InstancePtr;
 136
 137         /*
 138          * Loop thru each timer counter in the device and call the callback
 139          * function for each timer which has caused an interrupt
 140          */
 141         for (TmrCtrNumber = 0;
 142                 TmrCtrNumber < XTC_DEVICE_TIMER_COUNT; TmrCtrNumber++) {
 143
 144                 ControlStatusReg = XTmrCtr_ReadReg(TmrCtrPtr->BaseAddress,
 145                                                    TmrCtrNumber,
 146                                                    XTC_TCSR_OFFSET);
 147                 /*
 148                  * Check if interrupt is enabled
 149                  */
 150                 if (ControlStatusReg & XTC_CSR_ENABLE_INT_MASK) {
 151
 152                         /*
 153                          * Check if timer expired and interrupt occured
 154                          */
 155                         if (ControlStatusReg & XTC_CSR_INT_OCCURED_MASK) {
 156                                 /*
 157                                  * Increment statistics for the number of
 158                                  * interrupts and call the callback to handle
 159                                  * any application specific processing
 160                                  */
 161                                 TmrCtrPtr->Stats.Interrupts++;
 162                                 TmrCtrPtr->Handler(TmrCtrPtr->CallBackRef,
 163                                                    TmrCtrNumber);
 164                                 /*
 165                                  * Read the new Control/Status Register content.
 166                                  */
 167                                 ControlStatusReg =
 168                                         XTmrCtr_ReadReg(TmrCtrPtr->BaseAddress,
 169                                                                 TmrCtrNumber,
 170                                                                 XTC_TCSR_OFFSET);
 171                                 /*
 172                                  * If in compare mode and a single shot rather
 173                                  * than auto reload mode then disable the timer
 174                                  * and reset it such so that the interrupt can
 175                                  * be acknowledged, this should be only temporary
 176                                  * till the hardware is fixed
 177                                  */
 178                                 if (((ControlStatusReg &
 179                                         XTC_CSR_AUTO_RELOAD_MASK) == 0) &&
 180                                         ((ControlStatusReg &
 181                                           XTC_CSR_CAPTURE_MODE_MASK)== 0)) {
 182                                                 /*
 183                                                  * Disable the timer counter and
 184                                                  * reset it such that the timer
 185                                                  * counter is loaded with the
 186                                                  * reset value allowing the
 187                                                  * interrupt to be acknowledged
 188                                                  */
 189                                                 ControlStatusReg &=
 190                                                         ~XTC_CSR_ENABLE_TMR_MASK;
 191
 192                                                 XTmrCtr_WriteReg(
 193                                                         TmrCtrPtr->BaseAddress,
 194                                                         TmrCtrNumber,
 195                                                         XTC_TCSR_OFFSET,
 196                                                         ControlStatusReg |
 197                                                         XTC_CSR_LOAD_MASK);
 198
 199                                                 /*
 200                                                  * Clear the reset condition,
 201                                                  * the reset bit must be
 202                                                  * manually cleared by a 2nd write
 203                                                  * to the register
 204                                                  */
 205                                                 XTmrCtr_WriteReg(
 206                                                         TmrCtrPtr->BaseAddress,
 207                                                         TmrCtrNumber,
 208                                                         XTC_TCSR_OFFSET,
 209                                                         ControlStatusReg);
 210                                 }
 211
 212                                 /*
 213                                  * Acknowledge the interrupt by clearing the
 214                                  * interrupt bit in the timer control status
 215                                  * register, this is done after calling the
 216                                  * handler so the application could call
 217                                  * IsExpired, the interrupt is cleared by
 218                                  * writing a 1 to the interrupt bit of the
 219                                  * register without changing any of the other
 220                                  * bits
 221                                  */
 222                                 XTmrCtr_WriteReg(TmrCtrPtr->BaseAddress,
 223                                                  TmrCtrNumber,
 224                                                  XTC_TCSR_OFFSET,
 225                                                  ControlStatusReg |
 226                                                  XTC_CSR_INT_OCCURED_MASK);
 227                         }
 228                 }
 229         }
 230 }