2 # ##############################################################################
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3 # Created by Base System Builder Wizard for Xilinx EDK 13.1 Build EDK_O.40d
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4 # Mon May 30 21:43:34 2011
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5 # Target Board: xilinx.com sp605 Rev C
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10 # ##############################################################################
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11 PARAMETER VERSION = 2.1.0
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14 PORT RESET = RESET, DIR = I, SIGIS = RST, RST_POLARITY = 1
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15 PORT CLK_P = CLK, DIR = I, DIFFERENTIAL_POLARITY = P, SIGIS = CLK, CLK_FREQ = 200000000
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16 PORT CLK_N = CLK, DIR = I, DIFFERENTIAL_POLARITY = N, SIGIS = CLK, CLK_FREQ = 200000000
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17 PORT RS232_Uart_1_sout = RS232_Uart_1_sout, DIR = O
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18 PORT RS232_Uart_1_sin = RS232_Uart_1_sin, DIR = I
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19 PORT LEDs_4Bits_TRI_O = LEDs_4Bits_TRI_O, DIR = O, VEC = [0:3]
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20 PORT Push_Buttons_4Bits_TRI_I = Push_Buttons_4Bits_TRI_I, DIR = I, VEC = [3:0]
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21 PORT mcbx_dram_clk = mcbx_dram_clk, DIR = O
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22 PORT mcbx_dram_clk_n = mcbx_dram_clk_n, DIR = O
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23 PORT mcbx_dram_cke = mcbx_dram_cke, DIR = O
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24 PORT mcbx_dram_odt = mcbx_dram_odt, DIR = O
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25 PORT mcbx_dram_ras_n = mcbx_dram_ras_n, DIR = O
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26 PORT mcbx_dram_cas_n = mcbx_dram_cas_n, DIR = O
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27 PORT mcbx_dram_we_n = mcbx_dram_we_n, DIR = O
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28 PORT mcbx_dram_udm = mcbx_dram_udm, DIR = O
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29 PORT mcbx_dram_ldm = mcbx_dram_ldm, DIR = O
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30 PORT mcbx_dram_ba = mcbx_dram_ba, DIR = O, VEC = [2:0]
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31 PORT mcbx_dram_addr = mcbx_dram_addr, DIR = O, VEC = [12:0]
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32 PORT mcbx_dram_ddr3_rst = mcbx_dram_ddr3_rst, DIR = O
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33 PORT mcbx_dram_dq = mcbx_dram_dq, DIR = IO, VEC = [15:0]
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34 PORT mcbx_dram_dqs = mcbx_dram_dqs, DIR = IO
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35 PORT mcbx_dram_dqs_n = mcbx_dram_dqs_n, DIR = IO
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36 PORT mcbx_dram_udqs = mcbx_dram_udqs, DIR = IO
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37 PORT mcbx_dram_udqs_n = mcbx_dram_udqs_n, DIR = IO
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38 PORT rzq = rzq, DIR = IO
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39 PORT zio = zio, DIR = IO
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40 PORT Ethernet_Lite_MDIO = Ethernet_Lite_MDIO, DIR = IO
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41 PORT Ethernet_Lite_MDC = Ethernet_Lite_MDC, DIR = O
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42 PORT Ethernet_Lite_TXD = Ethernet_Lite_TXD, DIR = O, VEC = [3:0]
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43 PORT Ethernet_Lite_TX_EN = Ethernet_Lite_TX_EN, DIR = O
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44 PORT Ethernet_Lite_TX_CLK = Ethernet_Lite_TX_CLK, DIR = I
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45 PORT Ethernet_Lite_COL = Ethernet_Lite_COL, DIR = I
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46 PORT Ethernet_Lite_RXD = Ethernet_Lite_RXD, DIR = I, VEC = [3:0]
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47 PORT Ethernet_Lite_RX_ER = Ethernet_Lite_RX_ER, DIR = I
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48 PORT Ethernet_Lite_RX_CLK = Ethernet_Lite_RX_CLK, DIR = I
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49 PORT Ethernet_Lite_CRS = Ethernet_Lite_CRS, DIR = I
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50 PORT Ethernet_Lite_RX_DV = Ethernet_Lite_RX_DV, DIR = I
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51 PORT Ethernet_Lite_PHY_RST_N = Ethernet_Lite_PHY_RST_N, DIR = O
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54 BEGIN axi_interconnect
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55 PARAMETER INSTANCE = axi4_0
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56 PARAMETER HW_VER = 1.02.a
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57 PORT interconnect_aclk = clk_100_0000MHzPLL0
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58 PORT INTERCONNECT_ARESETN = proc_sys_reset_0_Interconnect_aresetn
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61 BEGIN axi_interconnect
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62 PARAMETER INSTANCE = axi4lite_0
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63 PARAMETER HW_VER = 1.02.a
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64 PARAMETER C_INTERCONNECT_CONNECTIVITY_MODE = 0
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65 PORT INTERCONNECT_ARESETN = proc_sys_reset_0_Interconnect_aresetn
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66 PORT INTERCONNECT_ACLK = clk_50_0000MHzPLL0
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70 PARAMETER INSTANCE = microblaze_0
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71 PARAMETER HW_VER = 8.10.a
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72 PARAMETER C_INTERCONNECT = 2
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73 PARAMETER C_USE_BARREL = 1
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74 PARAMETER C_USE_FPU = 1
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75 PARAMETER C_DEBUG_ENABLED = 1
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76 PARAMETER C_ICACHE_BASEADDR = 0xc0000000
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77 PARAMETER C_ICACHE_HIGHADDR = 0xc7ffffff
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78 PARAMETER C_USE_ICACHE = 1
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79 PARAMETER C_ICACHE_ALWAYS_USED = 1
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80 PARAMETER C_DCACHE_BASEADDR = 0xc0000000
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81 PARAMETER C_DCACHE_HIGHADDR = 0xc7ffffff
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82 PARAMETER C_USE_DCACHE = 1
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83 PARAMETER C_DCACHE_ALWAYS_USED = 1
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84 PARAMETER C_INTERCONNECT_M_AXI_DC_AW_REGISTER = 1
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85 PARAMETER C_INTERCONNECT_M_AXI_DC_W_REGISTER = 1
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86 PARAMETER C_INTERCONNECT_M_AXI_DP_AW_REGISTER = 1
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87 PARAMETER C_INTERCONNECT_M_AXI_DP_AR_REGISTER = 1
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88 PARAMETER C_INTERCONNECT_M_AXI_DP_W_REGISTER = 1
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89 PARAMETER C_INTERCONNECT_M_AXI_DP_R_REGISTER = 1
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90 PARAMETER C_INTERCONNECT_M_AXI_DP_B_REGISTER = 1
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91 PARAMETER C_INTERCONNECT_M_AXI_DC_AR_REGISTER = 1
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92 PARAMETER C_INTERCONNECT_M_AXI_DC_R_REGISTER = 1
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93 PARAMETER C_INTERCONNECT_M_AXI_DC_B_REGISTER = 1
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94 PARAMETER C_INTERCONNECT_M_AXI_IC_AW_REGISTER = 1
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95 PARAMETER C_INTERCONNECT_M_AXI_IC_AR_REGISTER = 1
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96 PARAMETER C_INTERCONNECT_M_AXI_IC_W_REGISTER = 1
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97 PARAMETER C_INTERCONNECT_M_AXI_IC_R_REGISTER = 1
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98 PARAMETER C_INTERCONNECT_M_AXI_IC_B_REGISTER = 1
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99 PARAMETER C_NUMBER_OF_PC_BRK = 7
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100 PARAMETER C_NUMBER_OF_WR_ADDR_BRK = 2
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101 PARAMETER C_NUMBER_OF_RD_ADDR_BRK = 2
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102 PARAMETER C_CACHE_BYTE_SIZE = 16384
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103 PARAMETER C_DCACHE_BYTE_SIZE = 16384
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104 PARAMETER C_FPU_EXCEPTION = 1
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105 PARAMETER C_DIV_ZERO_EXCEPTION = 1
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106 PARAMETER C_M_AXI_I_BUS_EXCEPTION = 1
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107 PARAMETER C_M_AXI_D_BUS_EXCEPTION = 1
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108 PARAMETER C_ILL_OPCODE_EXCEPTION = 1
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109 PARAMETER C_OPCODE_0x0_ILLEGAL = 1
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110 PARAMETER C_UNALIGNED_EXCEPTIONS = 1
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111 PARAMETER C_USE_DIV = 1
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112 BUS_INTERFACE M_AXI_DP = axi4lite_0
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113 BUS_INTERFACE M_AXI_DC = axi4_0
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114 BUS_INTERFACE M_AXI_IC = axi4_0
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115 BUS_INTERFACE DEBUG = microblaze_0_debug
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116 BUS_INTERFACE DLMB = microblaze_0_dlmb
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117 BUS_INTERFACE ILMB = microblaze_0_ilmb
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118 PORT MB_RESET = proc_sys_reset_0_MB_Reset
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119 PORT CLK = clk_100_0000MHzPLL0
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120 PORT INTERRUPT = microblaze_0_interrupt
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124 PARAMETER INSTANCE = microblaze_0_ilmb
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125 PARAMETER HW_VER = 2.00.a
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126 PORT SYS_RST = proc_sys_reset_0_BUS_STRUCT_RESET
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127 PORT LMB_CLK = clk_100_0000MHzPLL0
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131 PARAMETER INSTANCE = microblaze_0_dlmb
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132 PARAMETER HW_VER = 2.00.a
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133 PORT SYS_RST = proc_sys_reset_0_BUS_STRUCT_RESET
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134 PORT LMB_CLK = clk_100_0000MHzPLL0
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137 BEGIN lmb_bram_if_cntlr
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138 PARAMETER INSTANCE = microblaze_0_i_bram_ctrl
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139 PARAMETER HW_VER = 3.00.a
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140 PARAMETER C_BASEADDR = 0x00000000
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141 PARAMETER C_HIGHADDR = 0x00001fff
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142 BUS_INTERFACE SLMB = microblaze_0_ilmb
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143 BUS_INTERFACE BRAM_PORT = microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block
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146 BEGIN lmb_bram_if_cntlr
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147 PARAMETER INSTANCE = microblaze_0_d_bram_ctrl
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148 PARAMETER HW_VER = 3.00.a
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149 PARAMETER C_BASEADDR = 0x00000000
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150 PARAMETER C_HIGHADDR = 0x00001fff
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151 BUS_INTERFACE SLMB = microblaze_0_dlmb
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152 BUS_INTERFACE BRAM_PORT = microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block
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156 PARAMETER INSTANCE = microblaze_0_bram_block
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157 PARAMETER HW_VER = 1.00.a
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158 BUS_INTERFACE PORTA = microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block
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159 BUS_INTERFACE PORTB = microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block
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162 BEGIN proc_sys_reset
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163 PARAMETER INSTANCE = proc_sys_reset_0
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164 PARAMETER HW_VER = 3.00.a
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165 PARAMETER C_EXT_RESET_HIGH = 1
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166 PORT Ext_Reset_In = RESET
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167 PORT MB_Reset = proc_sys_reset_0_MB_Reset
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168 PORT Slowest_sync_clk = clk_50_0000MHzPLL0
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169 PORT Interconnect_aresetn = proc_sys_reset_0_Interconnect_aresetn
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170 PORT Dcm_locked = proc_sys_reset_0_Dcm_locked
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171 PORT MB_Debug_Sys_Rst = proc_sys_reset_0_MB_Debug_Sys_Rst
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172 PORT BUS_STRUCT_RESET = proc_sys_reset_0_BUS_STRUCT_RESET
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175 BEGIN clock_generator
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176 PARAMETER INSTANCE = clock_generator_0
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177 PARAMETER HW_VER = 4.01.a
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178 PARAMETER C_CLKIN_FREQ = 200000000
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179 PARAMETER C_CLKOUT0_FREQ = 600000000
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180 PARAMETER C_CLKOUT0_GROUP = PLL0
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181 PARAMETER C_CLKOUT0_BUF = FALSE
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182 PARAMETER C_CLKOUT1_FREQ = 600000000
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183 PARAMETER C_CLKOUT1_PHASE = 180
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184 PARAMETER C_CLKOUT1_GROUP = PLL0
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185 PARAMETER C_CLKOUT1_BUF = FALSE
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186 PARAMETER C_CLKOUT2_FREQ = 100000000
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187 PARAMETER C_CLKOUT2_GROUP = PLL0
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188 PARAMETER C_CLKOUT3_FREQ = 50000000
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189 PARAMETER C_CLKOUT3_GROUP = PLL0
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192 PORT CLKOUT2 = clk_100_0000MHzPLL0
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193 PORT CLKOUT3 = clk_50_0000MHzPLL0
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194 PORT CLKOUT0 = clk_600_0000MHzPLL0_nobuf
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195 PORT CLKOUT1 = clk_600_0000MHz180PLL0_nobuf
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196 PORT LOCKED = proc_sys_reset_0_Dcm_locked
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200 PARAMETER INSTANCE = debug_module
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201 PARAMETER HW_VER = 2.00.b
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202 PARAMETER C_INTERCONNECT = 2
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203 PARAMETER C_USE_UART = 1
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204 PARAMETER C_INTERCONNECT_S_AXI_AW_REGISTER = 1
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205 PARAMETER C_INTERCONNECT_S_AXI_AR_REGISTER = 1
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206 PARAMETER C_INTERCONNECT_S_AXI_W_REGISTER = 1
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207 PARAMETER C_INTERCONNECT_S_AXI_R_REGISTER = 1
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208 PARAMETER C_INTERCONNECT_S_AXI_B_REGISTER = 1
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209 PARAMETER C_BASEADDR = 0x74800000
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210 PARAMETER C_HIGHADDR = 0x7480ffff
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211 BUS_INTERFACE S_AXI = axi4lite_0
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212 BUS_INTERFACE MBDEBUG_0 = microblaze_0_debug
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213 PORT S_AXI_ACLK = clk_50_0000MHzPLL0
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214 PORT Debug_SYS_Rst = proc_sys_reset_0_MB_Debug_Sys_Rst
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218 PARAMETER INSTANCE = RS232_Uart_1
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219 PARAMETER HW_VER = 1.01.a
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220 PARAMETER C_BAUDRATE = 115200
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221 PARAMETER C_DATA_BITS = 8
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222 PARAMETER C_USE_PARITY = 0
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223 PARAMETER C_ODD_PARITY = 1
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224 PARAMETER C_INTERCONNECT_S_AXI_AW_REGISTER = 1
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225 PARAMETER C_INTERCONNECT_S_AXI_AR_REGISTER = 1
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226 PARAMETER C_INTERCONNECT_S_AXI_W_REGISTER = 1
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227 PARAMETER C_INTERCONNECT_S_AXI_R_REGISTER = 1
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228 PARAMETER C_INTERCONNECT_S_AXI_B_REGISTER = 1
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229 PARAMETER C_BASEADDR = 0x40600000
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230 PARAMETER C_HIGHADDR = 0x4060ffff
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231 BUS_INTERFACE S_AXI = axi4lite_0
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232 PORT TX = RS232_Uart_1_sout
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233 PORT RX = RS232_Uart_1_sin
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234 PORT S_AXI_ACLK = clk_50_0000MHzPLL0
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235 PORT Interrupt = RS232_Uart_1_Interrupt
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239 PARAMETER INSTANCE = LEDs_4Bits
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240 PARAMETER HW_VER = 1.01.a
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241 PARAMETER C_GPIO_WIDTH = 4
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242 PARAMETER C_ALL_INPUTS = 0
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243 PARAMETER C_INTERRUPT_PRESENT = 0
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244 PARAMETER C_IS_DUAL = 0
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245 PARAMETER C_INTERCONNECT_S_AXI_AW_REGISTER = 1
\r
246 PARAMETER C_INTERCONNECT_S_AXI_AR_REGISTER = 1
\r
247 PARAMETER C_INTERCONNECT_S_AXI_W_REGISTER = 1
\r
248 PARAMETER C_INTERCONNECT_S_AXI_R_REGISTER = 1
\r
249 PARAMETER C_INTERCONNECT_S_AXI_B_REGISTER = 1
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250 PARAMETER C_BASEADDR = 0x40020000
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251 PARAMETER C_HIGHADDR = 0x4002ffff
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252 BUS_INTERFACE S_AXI = axi4lite_0
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253 PORT GPIO_IO_O = LEDs_4Bits_TRI_O
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254 PORT S_AXI_ACLK = clk_50_0000MHzPLL0
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258 PARAMETER INSTANCE = Push_Buttons_4Bits
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259 PARAMETER HW_VER = 1.01.a
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260 PARAMETER C_GPIO_WIDTH = 4
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261 PARAMETER C_ALL_INPUTS = 1
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262 PARAMETER C_INTERRUPT_PRESENT = 1
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263 PARAMETER C_IS_DUAL = 0
\r
264 PARAMETER C_INTERCONNECT_S_AXI_AW_REGISTER = 1
\r
265 PARAMETER C_INTERCONNECT_S_AXI_AR_REGISTER = 1
\r
266 PARAMETER C_INTERCONNECT_S_AXI_W_REGISTER = 1
\r
267 PARAMETER C_INTERCONNECT_S_AXI_R_REGISTER = 1
\r
268 PARAMETER C_INTERCONNECT_S_AXI_B_REGISTER = 1
\r
269 PARAMETER C_BASEADDR = 0x40000000
\r
270 PARAMETER C_HIGHADDR = 0x4000ffff
\r
271 BUS_INTERFACE S_AXI = axi4lite_0
\r
272 PORT GPIO_IO_I = Push_Buttons_4Bits_TRI_I
\r
273 PORT S_AXI_ACLK = clk_50_0000MHzPLL0
\r
274 PORT IP2INTC_Irpt = Push_Buttons_4Bits_IP2INTC_Irpt
\r
278 PARAMETER INSTANCE = MCB_DDR3
\r
279 PARAMETER HW_VER = 1.02.a
\r
280 PARAMETER C_MCB_RZQ_LOC = K7
\r
281 PARAMETER C_MCB_ZIO_LOC = R7
\r
282 PARAMETER C_MEM_TYPE = DDR3
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283 PARAMETER C_MEM_PARTNO = MT41J64M16XX-187E
\r
284 PARAMETER C_MEM_BANKADDR_WIDTH = 3
\r
285 PARAMETER C_MEM_NUM_COL_BITS = 10
\r
286 PARAMETER C_SKIP_IN_TERM_CAL = 0
\r
287 PARAMETER C_S0_AXI_ENABLE = 1
\r
288 PARAMETER C_INTERCONNECT_S0_AXI_MASTERS = microblaze_0.M_AXI_DC & microblaze_0.M_AXI_IC
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289 PARAMETER C_INTERCONNECT_S0_AXI_AW_REGISTER = 1
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290 PARAMETER C_INTERCONNECT_S0_AXI_AR_REGISTER = 1
\r
291 PARAMETER C_INTERCONNECT_S0_AXI_W_REGISTER = 1
\r
292 PARAMETER C_INTERCONNECT_S0_AXI_R_REGISTER = 1
\r
293 PARAMETER C_INTERCONNECT_S0_AXI_B_REGISTER = 1
\r
294 PARAMETER C_S0_AXI_BASEADDR = 0xc0000000
\r
295 PARAMETER C_S0_AXI_HIGHADDR = 0xc7ffffff
\r
296 BUS_INTERFACE S0_AXI = axi4_0
\r
297 PORT mcbx_dram_clk = mcbx_dram_clk
\r
298 PORT mcbx_dram_clk_n = mcbx_dram_clk_n
\r
299 PORT mcbx_dram_cke = mcbx_dram_cke
\r
300 PORT mcbx_dram_odt = mcbx_dram_odt
\r
301 PORT mcbx_dram_ras_n = mcbx_dram_ras_n
\r
302 PORT mcbx_dram_cas_n = mcbx_dram_cas_n
\r
303 PORT mcbx_dram_we_n = mcbx_dram_we_n
\r
304 PORT mcbx_dram_udm = mcbx_dram_udm
\r
305 PORT mcbx_dram_ldm = mcbx_dram_ldm
\r
306 PORT mcbx_dram_ba = mcbx_dram_ba
\r
307 PORT mcbx_dram_addr = mcbx_dram_addr
\r
308 PORT mcbx_dram_ddr3_rst = mcbx_dram_ddr3_rst
\r
309 PORT mcbx_dram_dq = mcbx_dram_dq
\r
310 PORT mcbx_dram_dqs = mcbx_dram_dqs
\r
311 PORT mcbx_dram_dqs_n = mcbx_dram_dqs_n
\r
312 PORT mcbx_dram_udqs = mcbx_dram_udqs
\r
313 PORT mcbx_dram_udqs_n = mcbx_dram_udqs_n
\r
316 PORT s0_axi_aclk = clk_100_0000MHzPLL0
\r
317 PORT ui_clk = clk_100_0000MHzPLL0
\r
318 PORT sysclk_2x = clk_600_0000MHzPLL0_nobuf
\r
319 PORT sysclk_2x_180 = clk_600_0000MHz180PLL0_nobuf
\r
320 PORT SYS_RST = proc_sys_reset_0_BUS_STRUCT_RESET
\r
321 PORT PLL_LOCK = proc_sys_reset_0_Dcm_locked
\r
324 BEGIN axi_ethernetlite
\r
325 PARAMETER INSTANCE = Ethernet_Lite
\r
326 PARAMETER HW_VER = 1.00.a
\r
327 PARAMETER C_INTERCONNECT_S_AXI_AW_REGISTER = 1
\r
328 PARAMETER C_INTERCONNECT_S_AXI_AR_REGISTER = 1
\r
329 PARAMETER C_INTERCONNECT_S_AXI_W_REGISTER = 1
\r
330 PARAMETER C_INTERCONNECT_S_AXI_R_REGISTER = 1
\r
331 PARAMETER C_INTERCONNECT_S_AXI_B_REGISTER = 1
\r
332 PARAMETER C_BASEADDR = 0x40e00000
\r
333 PARAMETER C_HIGHADDR = 0x40e0ffff
\r
334 PARAMETER C_S_AXI_PROTOCOL = AXI4LITE
\r
335 PARAMETER C_RX_PING_PONG = 1
\r
336 PARAMETER C_TX_PING_PONG = 1
\r
337 PARAMETER C_S_AXI_ID_WIDTH = 1
\r
338 BUS_INTERFACE S_AXI = axi4lite_0
\r
339 PORT PHY_MDIO = Ethernet_Lite_MDIO
\r
340 PORT PHY_MDC = Ethernet_Lite_MDC
\r
341 PORT PHY_tx_data = Ethernet_Lite_TXD
\r
342 PORT PHY_tx_en = Ethernet_Lite_TX_EN
\r
343 PORT PHY_tx_clk = Ethernet_Lite_TX_CLK
\r
344 PORT PHY_col = Ethernet_Lite_COL
\r
345 PORT PHY_rx_data = Ethernet_Lite_RXD
\r
346 PORT PHY_rx_er = Ethernet_Lite_RX_ER
\r
347 PORT PHY_rx_clk = Ethernet_Lite_RX_CLK
\r
348 PORT PHY_crs = Ethernet_Lite_CRS
\r
349 PORT PHY_dv = Ethernet_Lite_RX_DV
\r
350 PORT PHY_rst_n = Ethernet_Lite_PHY_RST_N
\r
351 PORT S_AXI_ACLK = clk_50_0000MHzPLL0
\r
352 PORT IP2INTC_Irpt = Ethernet_Lite_IP2INTC_Irpt
\r
356 PARAMETER INSTANCE = axi_timer_0
\r
357 PARAMETER HW_VER = 1.01.a
\r
358 PARAMETER C_COUNT_WIDTH = 32
\r
359 PARAMETER C_ONE_TIMER_ONLY = 0
\r
360 PARAMETER C_INTERCONNECT_S_AXI_AW_REGISTER = 1
\r
361 PARAMETER C_INTERCONNECT_S_AXI_AR_REGISTER = 1
\r
362 PARAMETER C_INTERCONNECT_S_AXI_W_REGISTER = 1
\r
363 PARAMETER C_INTERCONNECT_S_AXI_R_REGISTER = 1
\r
364 PARAMETER C_INTERCONNECT_S_AXI_B_REGISTER = 1
\r
365 PARAMETER C_BASEADDR = 0x41c00000
\r
366 PARAMETER C_HIGHADDR = 0x41c0ffff
\r
367 BUS_INTERFACE S_AXI = axi4lite_0
\r
368 PORT S_AXI_ACLK = clk_50_0000MHzPLL0
\r
369 PORT Interrupt = axi_timer_0_Interrupt
\r
373 PARAMETER INSTANCE = microblaze_0_intc
\r
374 PARAMETER HW_VER = 1.01.a
\r
375 PARAMETER C_INTERCONNECT_S_AXI_AW_REGISTER = 1
\r
376 PARAMETER C_INTERCONNECT_S_AXI_AR_REGISTER = 1
\r
377 PARAMETER C_INTERCONNECT_S_AXI_W_REGISTER = 1
\r
378 PARAMETER C_INTERCONNECT_S_AXI_R_REGISTER = 1
\r
379 PARAMETER C_INTERCONNECT_S_AXI_B_REGISTER = 1
\r
380 PARAMETER C_BASEADDR = 0x41200000
\r
381 PARAMETER C_HIGHADDR = 0x4120ffff
\r
382 BUS_INTERFACE S_AXI = axi4lite_0
\r
383 PORT IRQ = microblaze_0_interrupt
\r
384 PORT S_AXI_ACLK = clk_50_0000MHzPLL0
\r
385 PORT INTR = Push_Buttons_4Bits_IP2INTC_Irpt & Ethernet_Lite_IP2INTC_Irpt & axi_timer_0_Interrupt & RS232_Uart_1_Interrupt
\r
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