git.sur5r.net Git - freertos/blob - FreeRTOS/Demo/MicroBlaze_Spartan-6_EthernetLite/PlatformStudioProject/system_incl.make

   1 #################################################################\r
   2 # Makefile generated by Xilinx Platform Studio \r
   3 # Project:C:\E\Dev\FreeRTOS\WorkingCopy\Demo\MicroBlaze_Spartan-6_EthernetLite\PlatformStudioProject\system.xmp\r
   4 #\r
   5 # WARNING : This file will be re-generated every time a command\r
   6 # to run a make target is invoked. So, any changes made to this  \r
   7 # file manually, will be lost when make is invoked next. \r
   8 #################################################################\r
   9 \r
  10 SHELL = CMD\r
  11 \r
  12 XILINX_EDK_DIR = C:/devtools/Xilinx/13.1/ISE_DS/EDK\r
  13 \r
  14 SYSTEM = system\r
  15 \r
  16 MHSFILE = system.mhs\r
  17 \r
  18 FPGA_ARCH = spartan6\r
  19 \r
  20 DEVICE = xc6slx45tfgg484-3\r
  21 \r
  22 LANGUAGE = vhdl\r
  23 GLOBAL_SEARCHPATHOPT = \r
  24 PROJECT_SEARCHPATHOPT = \r
  25 \r
  26 SEARCHPATHOPT = $(PROJECT_SEARCHPATHOPT) $(GLOBAL_SEARCHPATHOPT)\r
  27 \r
  28 SUBMODULE_OPT = \r
  29 \r
  30 PLATGEN_OPTIONS = -p $(DEVICE) -lang $(LANGUAGE) $(SEARCHPATHOPT) $(SUBMODULE_OPT) -msg __xps/ise/xmsgprops.lst\r
  31 \r
  32 OBSERVE_PAR_OPTIONS = -error yes\r
  33 \r
  34 MICROBLAZE_BOOTLOOP = $(XILINX_EDK_DIR)/sw/lib/microblaze/mb_bootloop.elf\r
  35 MICROBLAZE_BOOTLOOP_LE = $(XILINX_EDK_DIR)/sw/lib/microblaze/mb_bootloop_le.elf\r
  36 PPC405_BOOTLOOP = $(XILINX_EDK_DIR)/sw/lib/ppc405/ppc_bootloop.elf\r
  37 PPC440_BOOTLOOP = $(XILINX_EDK_DIR)/sw/lib/ppc440/ppc440_bootloop.elf\r
  38 BOOTLOOP_DIR = bootloops\r
  39 \r
  40 MICROBLAZE_0_BOOTLOOP = $(BOOTLOOP_DIR)/microblaze_0.elf\r
  41 \r
  42 BRAMINIT_ELF_IMP_FILES = $(MICROBLAZE_0_BOOTLOOP)\r
  43 BRAMINIT_ELF_IMP_FILE_ARGS = -pe microblaze_0 $(MICROBLAZE_0_BOOTLOOP)\r
  44 \r
  45 BRAMINIT_ELF_SIM_FILES = $(MICROBLAZE_0_BOOTLOOP)\r
  46 BRAMINIT_ELF_SIM_FILE_ARGS = -pe microblaze_0 $(MICROBLAZE_0_BOOTLOOP)\r
  47 \r
  48 SIM_CMD = isim_system\r
  49 \r
  50 BEHAVIORAL_SIM_SCRIPT = simulation/behavioral/$(SYSTEM)_setup.tcl\r
  51 \r
  52 STRUCTURAL_SIM_SCRIPT = simulation/structural/$(SYSTEM)_setup.tcl\r
  53 \r
  54 TIMING_SIM_SCRIPT = simulation/timing/$(SYSTEM)_setup.tcl\r
  55 \r
  56 DEFAULT_SIM_SCRIPT = $(BEHAVIORAL_SIM_SCRIPT)\r
  57 \r
  58 MIX_LANG_SIM_OPT = -mixed yes\r
  59 \r
  60 SIMGEN_OPTIONS = -p $(DEVICE) -lang $(LANGUAGE) $(SEARCHPATHOPT) $(BRAMINIT_ELF_SIM_FILE_ARGS) $(MIX_LANG_SIM_OPT) -msg __xps/ise/xmsgprops.lst -s isim\r
  61 \r
  62 \r
  63 CORE_STATE_DEVELOPMENT_FILES = \r
  64 \r
  65 WRAPPER_NGC_FILES = implementation/axi4_0_wrapper.ngc \
  66 implementation/axi4lite_0_wrapper.ngc \
  67 implementation/microblaze_0_wrapper.ngc \
  68 implementation/microblaze_0_ilmb_wrapper.ngc \
  69 implementation/microblaze_0_dlmb_wrapper.ngc \
  70 implementation/microblaze_0_i_bram_ctrl_wrapper.ngc \
  71 implementation/microblaze_0_d_bram_ctrl_wrapper.ngc \
  72 implementation/microblaze_0_bram_block_wrapper.ngc \
  73 implementation/proc_sys_reset_0_wrapper.ngc \
  74 implementation/clock_generator_0_wrapper.ngc \
  75 implementation/debug_module_wrapper.ngc \
  76 implementation/rs232_uart_1_wrapper.ngc \
  77 implementation/leds_4bits_wrapper.ngc \
  78 implementation/push_buttons_4bits_wrapper.ngc \
  79 implementation/mcb_ddr3_wrapper.ngc \
  80 implementation/ethernet_lite_wrapper.ngc \
  81 implementation/axi_timer_0_wrapper.ngc \
  82 implementation/microblaze_0_intc_wrapper.ngc\r
  83 \r
  84 POSTSYN_NETLIST = implementation/$(SYSTEM).ngc\r
  85 \r
  86 SYSTEM_BIT = implementation/$(SYSTEM).bit\r
  87 \r
  88 DOWNLOAD_BIT = implementation/download.bit\r
  89 \r
  90 SYSTEM_ACE = implementation/$(SYSTEM).ace\r
  91 \r
  92 UCF_FILE = data/system.ucf\r
  93 \r
  94 BMM_FILE = implementation/$(SYSTEM).bmm\r
  95 \r
  96 BITGEN_UT_FILE = etc/bitgen.ut\r
  97 \r
  98 XFLOW_OPT_FILE = etc/fast_runtime.opt\r
  99 XFLOW_DEPENDENCY = __xps/xpsxflow.opt $(XFLOW_OPT_FILE)\r
 100 \r
 101 XPLORER_DEPENDENCY = __xps/xplorer.opt\r
 102 XPLORER_OPTIONS = -p $(DEVICE) -uc $(SYSTEM).ucf -bm $(SYSTEM).bmm -max_runs 7\r
 103 \r
 104 FPGA_IMP_DEPENDENCY = $(BMM_FILE) $(POSTSYN_NETLIST) $(UCF_FILE) $(XFLOW_DEPENDENCY)\r
 105 \r
 106 SDK_EXPORT_DIR = SDK\SDK_Export\hw\r
 107 SYSTEM_HW_HANDOFF = $(SDK_EXPORT_DIR)/$(SYSTEM).xml\r
 108 SYSTEM_HW_HANDOFF_BIT = $(SDK_EXPORT_DIR)/$(SYSTEM).bit\r
 109 SYSTEM_HW_HANDOFF_BMM = $(SDK_EXPORT_DIR)/$(SYSTEM)_bd.bmm\r
 110 SYSTEM_HW_HANDOFF_DEP = $(SYSTEM_HW_HANDOFF) $(SYSTEM_HW_HANDOFF_BIT) $(SYSTEM_HW_HANDOFF_BMM)\r