2 FreeRTOS V7.2.0 - Copyright (C) 2012 Real Time Engineers Ltd.
\r
5 ***************************************************************************
\r
7 * FreeRTOS tutorial books are available in pdf and paperback. *
\r
8 * Complete, revised, and edited pdf reference manuals are also *
\r
11 * Purchasing FreeRTOS documentation will not only help you, by *
\r
12 * ensuring you get running as quickly as possible and with an *
\r
13 * in-depth knowledge of how to use FreeRTOS, it will also help *
\r
14 * the FreeRTOS project to continue with its mission of providing *
\r
15 * professional grade, cross platform, de facto standard solutions *
\r
16 * for microcontrollers - completely free of charge! *
\r
18 * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
\r
20 * Thank you for using FreeRTOS, and thank you for your support! *
\r
22 ***************************************************************************
\r
25 This file is part of the FreeRTOS distribution.
\r
27 FreeRTOS is free software; you can redistribute it and/or modify it under
\r
28 the terms of the GNU General Public License (version 2) as published by the
\r
29 Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
\r
30 >>>NOTE<<< The modification to the GPL is included to allow you to
\r
31 distribute a combined work that includes FreeRTOS without being obliged to
\r
32 provide the source code for proprietary components outside of the FreeRTOS
\r
33 kernel. FreeRTOS is distributed in the hope that it will be useful, but
\r
34 WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
\r
35 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
\r
36 more details. You should have received a copy of the GNU General Public
\r
37 License and the FreeRTOS license exception along with FreeRTOS; if not it
\r
38 can be viewed here: http://www.freertos.org/a00114.html and also obtained
\r
39 by writing to Richard Barry, contact details for whom are available on the
\r
44 ***************************************************************************
\r
46 * Having a problem? Start by reading the FAQ "My application does *
\r
47 * not run, what could be wrong? *
\r
49 * http://www.FreeRTOS.org/FAQHelp.html *
\r
51 ***************************************************************************
\r
54 http://www.FreeRTOS.org - Documentation, training, latest information,
\r
55 license and contact details.
\r
57 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
\r
58 including FreeRTOS+Trace - an indispensable productivity tool.
\r
60 Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell
\r
61 the code with commercial support, indemnification, and middleware, under
\r
62 the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also
\r
63 provide a safety engineered and independently SIL3 certified version under
\r
64 the SafeRTOS brand: http://www.SafeRTOS.com.
\r
67 /* Scheduler includes. */
\r
68 #include "FreeRTOS.h"
\r
72 * The register test task as described in the comments at the top of main-full.c.
\r
74 void vRegisterTest1( void *pvParameters );
\r
75 void vRegisterTest2( void *pvParameters );
\r
77 /* Variables that are incremented on each iteration of the reg test tasks -
\r
78 provided the tasks have not reported any errors. The check timer inspects these
\r
79 variables to ensure they are still incrementing as expected. If a variable
\r
80 stops incrementing then it is likely that its associate task has stalled or
\r
81 detected an error. */
\r
82 volatile unsigned long ulRegTest1CycleCount = 0UL, ulRegTest2CycleCount = 0UL;
\r
84 /*-----------------------------------------------------------*/
\r
86 void vRegisterTest1( void *pvParameters )
\r
88 /* This task uses an infinite loop that is implemented in the assembly
\r
91 First fill the relevant registers with known values. */
\r
92 asm volatile ( " addi r3, r0, 3 \n\t" \
\r
93 " addi r4, r0, 4 \n\t" \
\r
94 " addi r6, r0, 6 \n\t" \
\r
95 " addi r7, r0, 7 \n\t" \
\r
96 " addi r8, r0, 8 \n\t" \
\r
97 " addi r9, r0, 9 \n\t" \
\r
98 " addi r10, r0, 10 \n\t" \
\r
99 " addi r11, r0, 11 \n\t" \
\r
100 " addi r12, r0, 12 \n\t" \
\r
101 " addi r16, r0, 16 \n\t" \
\r
102 " addi r19, r0, 19 \n\t" \
\r
103 " addi r20, r0, 20 \n\t" \
\r
104 " addi r21, r0, 21 \n\t" \
\r
105 " addi r22, r0, 22 \n\t" \
\r
106 " addi r23, r0, 23 \n\t" \
\r
107 " addi r24, r0, 24 \n\t" \
\r
108 " addi r25, r0, 25 \n\t" \
\r
109 " addi r26, r0, 26 \n\t" \
\r
110 " addi r27, r0, 27 \n\t" \
\r
111 " addi r28, r0, 28 \n\t" \
\r
112 " addi r29, r0, 29 \n\t" \
\r
113 " addi r30, r0, 30 \n\t" \
\r
114 " addi r31, r0, 31 \n\t"
\r
117 /* Now test the register values to ensure they contain the same value that
\r
118 was written to them above. This task will get preempted frequently so
\r
119 other tasks are likely to have executed since the register values were
\r
120 written. If any register contains an unexpected value then the task will
\r
121 branch to Error_Loop_1, which in turn prevents it from incrementing its
\r
122 loop counter, enabling the check timer to determine that all is not as it
\r
125 asm volatile ( "Loop_Start_1: \n\t" \
\r
126 " xori r18, r3, 3 \n\t" \
\r
127 " bnei r18, Error_Loop_1 \n\t" \
\r
128 " xori r18, r4, 4 \n\t" \
\r
129 " bnei r18, Error_Loop_1 \n\t" \
\r
130 " xori r18, r6, 6 \n\t" \
\r
131 " bnei r18, Error_Loop_1 \n\t" \
\r
132 " xori r18, r7, 7 \n\t" \
\r
133 " bnei r18, Error_Loop_1 \n\t" \
\r
134 " xori r18, r8, 8 \n\t" \
\r
135 " bnei r18, Error_Loop_1 \n\t" \
\r
136 " xori r18, r9, 9 \n\t" \
\r
137 " bnei r18, Error_Loop_1 \n\t" \
\r
138 " xori r18, r10, 10 \n\t" \
\r
139 " bnei r18, Error_Loop_1 \n\t" \
\r
140 " xori r18, r11, 11 \n\t" \
\r
141 " bnei r18, Error_Loop_1 \n\t" \
\r
142 " xori r18, r12, 12 \n\t" \
\r
143 " bnei r18, Error_Loop_1 \n\t" \
\r
144 " xori r18, r16, 16 \n\t" \
\r
145 " bnei r18, Error_Loop_1 \n\t" \
\r
146 " xori r18, r19, 19 \n\t" \
\r
147 " bnei r18, Error_Loop_1 \n\t" \
\r
148 " xori r18, r20, 20 \n\t" \
\r
149 " bnei r18, Error_Loop_1 \n\t" \
\r
150 " xori r18, r21, 21 \n\t" \
\r
151 " bnei r18, Error_Loop_1 \n\t" \
\r
152 " xori r18, r22, 22 \n\t" \
\r
153 " bnei r18, Error_Loop_1 \n\t" \
\r
154 " xori r18, r23, 23 \n\t" \
\r
155 " bnei r18, Error_Loop_1 \n\t" \
\r
156 " xori r18, r24, 24 \n\t" \
\r
157 " bnei r18, Error_Loop_1 \n\t" \
\r
158 " xori r18, r25, 25 \n\t" \
\r
159 " bnei r18, Error_Loop_1 \n\t" \
\r
160 " xori r18, r26, 26 \n\t" \
\r
161 " bnei r18, Error_Loop_1 \n\t" \
\r
162 " xori r18, r27, 27 \n\t" \
\r
163 " bnei r18, Error_Loop_1 \n\t" \
\r
164 " xori r18, r28, 28 \n\t" \
\r
165 " bnei r18, Error_Loop_1 \n\t" \
\r
166 " xori r18, r29, 29 \n\t" \
\r
167 " bnei r18, Error_Loop_1 \n\t" \
\r
168 " xori r18, r30, 30 \n\t" \
\r
169 " bnei r18, Error_Loop_1 \n\t" \
\r
170 " xori r18, r31, 31 \n\t" \
\r
171 " bnei r18, Error_Loop_1 \n\t"
\r
174 /* If this task has not branched to the error loop, then everything is ok,
\r
175 and the check variable can be incremented to indicate that this task
\r
176 is still running. Then, brach back to the top to check the register
\r
178 asm volatile ( " lwi r18, r0, ulRegTest1CycleCount \n\t" \
\r
179 " addik r18, r18, 1 \n\t" \
\r
180 " swi r18, r0, ulRegTest1CycleCount \n\t" \
\r
182 " bri Loop_Start_1 "
\r
185 /* The test function will branch here if it discovers an error. This part
\r
186 of the code just sits in a NULL loop, which prevents the check variable
\r
187 incrementing any further to allow the check timer to recognize that this
\r
188 test has failed. */
\r
189 asm volatile ( "Error_Loop_1: \n\t" \
\r
194 ( void ) pvParameters;
\r
196 /*-----------------------------------------------------------*/
\r
198 void vRegisterTest2( void *pvParameters )
\r
200 /* This task uses an infinite loop that is implemented in the assembly
\r
203 First fill the registers with known values. */
\r
204 asm volatile ( " addi r16, r0, 1016 \n\t" \
\r
205 " addi r19, r0, 1019 \n\t" \
\r
206 " addi r20, r0, 1020 \n\t" \
\r
207 " addi r21, r0, 1021 \n\t" \
\r
208 " addi r22, r0, 1022 \n\t" \
\r
209 " addi r23, r0, 1023 \n\t" \
\r
210 " addi r24, r0, 1024 \n\t" \
\r
211 " addi r25, r0, 1025 \n\t" \
\r
212 " addi r26, r0, 1026 \n\t" \
\r
213 " addi r27, r0, 1027 \n\t" \
\r
214 " addi r28, r0, 1028 \n\t" \
\r
215 " addi r29, r0, 1029 \n\t" \
\r
216 " addi r30, r0, 1030 \n\t" \
\r
217 " addi r31, r0, 1031 \n\t" \
\r
222 /* Unlike vRegisterTest1, vRegisterTest2 performs a yield. This increases
\r
223 the test coverage, but does mean volatile registers need re-loading with
\r
224 their exepcted values. */
\r
227 /* taskYIELD() could have changed temporaries - set them back to those
\r
228 expected by the reg test task. */
\r
229 asm volatile ( " addi r3, r0, 103 \n\t" \
\r
230 " addi r4, r0, 104 \n\t" \
\r
231 " addi r6, r0, 106 \n\t" \
\r
232 " addi r7, r0, 107 \n\t" \
\r
233 " addi r8, r0, 108 \n\t" \
\r
234 " addi r9, r0, 109 \n\t" \
\r
235 " addi r10, r0, 1010 \n\t" \
\r
236 " addi r11, r0, 1011 \n\t" \
\r
237 " addi r12, r0, 1012 \n\t" \
\r
241 /* Now test the register values to ensure they contain the same value that
\r
242 was written to them above. This task will get preempted frequently so
\r
243 other tasks are likely to have executed since the register values were
\r
245 asm volatile ( " xori r18, r3, 103 \n\t" \
\r
246 " bnei r18, Error_Loop_2 \n\t" \
\r
247 " xori r18, r4, 104 \n\t" \
\r
248 " bnei r18, Error_Loop_2 \n\t" \
\r
249 " xori r18, r6, 106 \n\t" \
\r
250 " bnei r18, Error_Loop_2 \n\t" \
\r
251 " xori r18, r7, 107 \n\t" \
\r
252 " bnei r18, Error_Loop_2 \n\t" \
\r
253 " xori r18, r8, 108 \n\t" \
\r
254 " bnei r18, Error_Loop_2 \n\t" \
\r
255 " xori r18, r9, 109 \n\t" \
\r
256 " bnei r18, Error_Loop_2 \n\t" \
\r
257 " xori r18, r10, 1010 \n\t" \
\r
258 " bnei r18, Error_Loop_2 \n\t" \
\r
259 " xori r18, r11, 1011 \n\t" \
\r
260 " bnei r18, Error_Loop_2 \n\t" \
\r
261 " xori r18, r12, 1012 \n\t" \
\r
262 " bnei r18, Error_Loop_2 \n\t" \
\r
263 " xori r18, r16, 1016 \n\t" \
\r
264 " bnei r18, Error_Loop_2 \n\t" \
\r
265 " xori r18, r19, 1019 \n\t" \
\r
266 " bnei r18, Error_Loop_2 \n\t" \
\r
267 " xori r18, r20, 1020 \n\t" \
\r
268 " bnei r18, Error_Loop_2 \n\t" \
\r
269 " xori r18, r21, 1021 \n\t" \
\r
270 " bnei r18, Error_Loop_2 \n\t" \
\r
271 " xori r18, r22, 1022 \n\t" \
\r
272 " bnei r18, Error_Loop_2 \n\t" \
\r
273 " xori r18, r23, 1023 \n\t" \
\r
274 " bnei r18, Error_Loop_2 \n\t" \
\r
275 " xori r18, r24, 1024 \n\t" \
\r
276 " bnei r18, Error_Loop_2 \n\t" \
\r
277 " xori r18, r25, 1025 \n\t" \
\r
278 " bnei r18, Error_Loop_2 \n\t" \
\r
279 " xori r18, r26, 1026 \n\t" \
\r
280 " bnei r18, Error_Loop_2 \n\t" \
\r
281 " xori r18, r27, 1027 \n\t" \
\r
282 " bnei r18, Error_Loop_2 \n\t" \
\r
283 " xori r18, r28, 1028 \n\t" \
\r
284 " bnei r18, Error_Loop_2 \n\t" \
\r
285 " xori r18, r29, 1029 \n\t" \
\r
286 " bnei r18, Error_Loop_2 \n\t" \
\r
287 " xori r18, r30, 1030 \n\t" \
\r
288 " bnei r18, Error_Loop_2 \n\t" \
\r
289 " xori r18, r31, 1031 \n\t" \
\r
290 " bnei r18, Error_Loop_2 \n\t"
\r
293 /* If this task has not branched to the error loop, then everything is ok,
\r
294 and the check variable should be incremented to indicate that this task
\r
295 is still running. Then, brach back to the top to check the registers
\r
297 asm volatile ( " lwi r18, r0, ulRegTest2CycleCount \n\t" \
\r
298 " addik r18, r18, 1 \n\t" \
\r
299 " swi r18, r0, ulRegTest2CycleCount \n\t" \
\r
301 " bri Loop_Start_2 "
\r
304 /* The test function will branch here if it discovers an error. This part
\r
305 of the code just sits in a NULL loop, which prevents the check variable
\r
306 incrementing any further to allow the check timer to recognize that this
\r
307 test has failed. */
\r
308 asm volatile ( "Error_Loop_2: \n\t" \
\r
313 ( void ) pvParameters;
\r