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[freertos] / FreeRTOS / Demo / PC / serial / serial.c
1 /*\r
2         This serial port driver is borrowed heavily from DZComm.  I have\r
3         simplified it by removing a lot of the functionality (hardware \r
4         flow control, etc.).  For more details and the full version see\r
5         http://dzcomm.sourceforge.net\r
6 */\r
7 \r
8 /*\r
9     FreeRTOS V7.3.0 - Copyright (C) 2012 Real Time Engineers Ltd.\r
10 \r
11     FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME.  PLEASE VISIT \r
12     http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
13 \r
14     ***************************************************************************\r
15      *                                                                       *\r
16      *    FreeRTOS tutorial books are available in pdf and paperback.        *\r
17      *    Complete, revised, and edited pdf reference manuals are also       *\r
18      *    available.                                                         *\r
19      *                                                                       *\r
20      *    Purchasing FreeRTOS documentation will not only help you, by       *\r
21      *    ensuring you get running as quickly as possible and with an        *\r
22      *    in-depth knowledge of how to use FreeRTOS, it will also help       *\r
23      *    the FreeRTOS project to continue with its mission of providing     *\r
24      *    professional grade, cross platform, de facto standard solutions    *\r
25      *    for microcontrollers - completely free of charge!                  *\r
26      *                                                                       *\r
27      *    >>> See http://www.FreeRTOS.org/Documentation for details. <<<     *\r
28      *                                                                       *\r
29      *    Thank you for using FreeRTOS, and thank you for your support!      *\r
30      *                                                                       *\r
31     ***************************************************************************\r
32 \r
33 \r
34     This file is part of the FreeRTOS distribution.\r
35 \r
36     FreeRTOS is free software; you can redistribute it and/or modify it under\r
37     the terms of the GNU General Public License (version 2) as published by the\r
38     Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
39     >>>NOTE<<< The modification to the GPL is included to allow you to\r
40     distribute a combined work that includes FreeRTOS without being obliged to\r
41     provide the source code for proprietary components outside of the FreeRTOS\r
42     kernel.  FreeRTOS is distributed in the hope that it will be useful, but\r
43     WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
44     or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for\r
45     more details. You should have received a copy of the GNU General Public\r
46     License and the FreeRTOS license exception along with FreeRTOS; if not it\r
47     can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
48     by writing to Richard Barry, contact details for whom are available on the\r
49     FreeRTOS WEB site.\r
50 \r
51     1 tab == 4 spaces!\r
52     \r
53     ***************************************************************************\r
54      *                                                                       *\r
55      *    Having a problem?  Start by reading the FAQ "My application does   *\r
56      *    not run, what could be wrong?"                                     *\r
57      *                                                                       *\r
58      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
59      *                                                                       *\r
60     ***************************************************************************\r
61 \r
62     \r
63     http://www.FreeRTOS.org - Documentation, training, latest versions, license \r
64     and contact details.  \r
65     \r
66     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
67     including FreeRTOS+Trace - an indispensable productivity tool.\r
68 \r
69     Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell \r
70     the code with commercial support, indemnification, and middleware, under \r
71     the OpenRTOS brand: http://www.OpenRTOS.com.  High Integrity Systems also\r
72     provide a safety engineered and independently SIL3 certified version under \r
73     the SafeRTOS brand: http://www.SafeRTOS.com.\r
74 */\r
75 \r
76 \r
77 \r
78 #include <stdlib.h>\r
79 #include <dos.h>\r
80 #include "FreeRTOS.h"\r
81 #include "queue.h"\r
82 #include "task.h"\r
83 #include "semphr.h"\r
84 #include "portasm.h"\r
85 \r
86 #define serMAX_IRQs                                             ( 16 )\r
87 #define serTRANSMIT_HOLD_EMPTY_INT              ( 0x02 )\r
88 #define serCOM1_STANDARD_IRQ                    ( ( unsigned char ) 4 )\r
89 #define serCOM2_STANDARD_IRQ                    ( ( unsigned char ) 3 )\r
90 \r
91 \r
92 #define serIMR_8259_0                                   ( ( unsigned char ) 0x21 )\r
93 #define serIMR_8259_1                                   ( ( unsigned char ) 0xa1 )\r
94 #define serISR_8259_0                                   ( ( unsigned char ) 0x20 )\r
95 #define serISR_8259_1                                   ( ( unsigned char ) 0xa0 )\r
96 #define serALL_COMS_INTERRUPTS                  ( ( unsigned char ) 0x0f )\r
97 #define serALL_MODEM_CTRL_INTERRUPTS    ( ( unsigned char ) 0x0f )\r
98 \r
99 #define serTRANSMIT_HOLD_OFFSET                                 ( 0 )\r
100 #define serRECEIVE_DATA_OFFSET                                  ( 0 )\r
101 #define serBAUD_RATE_DIVISOR_LOW_OFFSET                 ( 0 )\r
102 #define serBAUD_RATE_DIVISOR_HIGH_OFFSET                ( 1 )\r
103 #define serINTERRUPT_ENABLE_OFFSET                              ( 1 )\r
104 #define serINTERRUPT_ID_OFFSET                                  ( 2 )\r
105 #define serFIFO_CTRL_OFFSET                                             ( 2 )\r
106 #define serLINE_CTRL_OFFSET                                             ( 3 )\r
107 #define serMODEM_CTRL_OFFSET                                    ( 4 )\r
108 #define serLINE_STATUS_OFFSET                                   ( 5 )\r
109 #define serMODEM_STATUS_OFFSET                                  ( 6 )\r
110 #define serSCR_OFFSET                                                   ( 7 )\r
111 \r
112 #define serMAX_BAUD                     ( ( unsigned long ) 115200UL )\r
113 \r
114 #define serNO_INTERRUPTS        ( 0x00 )\r
115 \r
116 #define vInterruptOn( pxPort, ucInterrupt )                                                                             \\r
117 {                                                                                                                                                               \\r
118         unsigned char ucIn = portINPUT_BYTE( pxPort->usInterruptEnableReg );    \\r
119         if( !( ucIn & ucInterrupt ) )                                                                                           \\r
120         {                                                                                                                                                       \\r
121                 portOUTPUT_BYTE( pxPort->usInterruptEnableReg, ucIn | ucInterrupt );    \\r
122         }                                                                                                                                                       \\r
123 }                                                                                                                                                               \r
124 /*-----------------------------------------------------------*/\r
125 \r
126 #define vInterruptOff( pxPort, ucInterrupt )                                                                    \\r
127 {                                                                                                                                                               \\r
128         unsigned char ucIn = portINPUT_BYTE( pxPort->usInterruptEnableReg );    \\r
129         if( ucIn & ucInterrupt )                                                                                                        \\r
130         {                                                                                                                                                       \\r
131                 portOUTPUT_BYTE( pxPort->usInterruptEnableReg, ucIn & ~ucInterrupt);    \\r
132         }                                                                                                                                                       \\r
133 }\r
134 /*-----------------------------------------------------------*/\r
135 \r
136 typedef enum\r
137\r
138         serCOM1, \r
139         serCOM2, \r
140         serCOM3, \r
141         serCOM4, \r
142         serCOM5, \r
143         serCOM6, \r
144         serCOM7, \r
145         serCOM8 \r
146 } eCOMPort;\r
147 \r
148 typedef enum \r
149\r
150         serNO_PARITY, \r
151         serODD_PARITY, \r
152         serEVEN_PARITY, \r
153         serMARK_PARITY, \r
154         serSPACE_PARITY \r
155 } eParity;\r
156 \r
157 typedef enum \r
158\r
159         serSTOP_1, \r
160         serSTOP_2 \r
161 } eStopBits;\r
162 \r
163 typedef enum \r
164\r
165         serBITS_5, \r
166         serBITS_6, \r
167         serBITS_7, \r
168         serBITS_8 \r
169 } eDataBits;\r
170 \r
171 typedef enum \r
172\r
173         ser50,          \r
174         ser75,          \r
175         ser110,         \r
176         ser134,         \r
177         ser150,    \r
178         ser200,\r
179         ser300,         \r
180         ser600,         \r
181         ser1200,        \r
182         ser1800,        \r
183         ser2400,   \r
184         ser4800,\r
185         ser9600,                \r
186         ser19200,       \r
187         ser38400,       \r
188         ser57600,       \r
189         ser115200\r
190 } eBaud;\r
191 \r
192 /* This *MUST* match the order in the eBaud definition. */\r
193 unsigned long ulBaudFromEnum[] = \r
194\r
195         ( unsigned long ) 50, \r
196         ( unsigned long ) 75, \r
197         ( unsigned long ) 110, \r
198         ( unsigned long ) 134, \r
199         ( unsigned long ) 150,  \r
200         ( unsigned long ) 200, \r
201         ( unsigned long ) 300, \r
202         ( unsigned long ) 600, \r
203         ( unsigned long ) 1200, \r
204         ( unsigned long ) 1800, \r
205         ( unsigned long ) 2400,   \r
206         ( unsigned long ) 4800,   \r
207         ( unsigned long ) 9600,  \r
208         ( unsigned long ) 19200,  \r
209         ( unsigned long ) 38400UL,\r
210         ( unsigned long ) 57600UL,\r
211         ( unsigned long ) 115200UL\r
212 };\r
213 \r
214 typedef struct xCOM_PORT\r
215\r
216         unsigned short sPort;   /* comm port address eg. 0x3f8    */\r
217         unsigned char ucIRQ;    /* comm IRQ eg. 3                 */\r
218 \r
219         /* Next two fields used for setting up the IRQ routine and\r
220         * (un)masking the interrupt in certain circumstances.\r
221         */\r
222         unsigned short usIRQVector;\r
223         unsigned char ucInterruptEnableMast;\r
224 \r
225         /* Read/Write buffers. */\r
226         xQueueHandle xRxedChars; \r
227         xQueueHandle xCharsForTx;\r
228 \r
229         /* This lot are set up to minimise CPU time where accessing the comm\r
230         * port's registers.\r
231         */\r
232         unsigned short usTransmitHoldReg; \r
233         unsigned short usReceiveDataRegister;\r
234         unsigned short usBaudRateDivisorLow; \r
235         unsigned short usBaudRateDivisorHigh;\r
236         unsigned short usInterruptEnableReg;\r
237         unsigned short usInterruptIDReg;\r
238         unsigned short usFIFOCtrlReg;\r
239         unsigned short usLineCtrlReg;\r
240         unsigned short usModemCtrlReg;\r
241         unsigned short usLineStatusReg;\r
242         unsigned short usModemStatusReg;\r
243         unsigned short usSCRReg;\r
244         unsigned short us8259InterruptServiceReg;\r
245         unsigned short us8259InterruptMaskReg;\r
246 \r
247         /* This semaphore does nothing useful except test a feature of the\r
248         scheduler. */\r
249         xSemaphoreHandle xTestSem;\r
250 \r
251 } xComPort;\r
252 \r
253 typedef xComPort *xComPortHandle;\r
254 \r
255 /* A xComPort structure can be associated with each IRQ.  Initially none\r
256 are create/installed. */\r
257 xComPort *xPortStatus[ serMAX_IRQs ] = { NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL };\r
258 \r
259 /*-----------------------------------------------------------*/\r
260 \r
261 /* These prototypes are repeated here so we don't have to include the serial header.  This allows\r
262 the xComPortHandle structure details to be private to this file. */\r
263 xComPortHandle xSerialPortInit( eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits, unsigned portBASE_TYPE uxBufferLength );\r
264 portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, char *pcRxedChar, portTickType xBlockTime );\r
265 portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, char cOutChar, portTickType xBlockTime );\r
266 portBASE_TYPE xSerialWaitForSemaphore( xComPortHandle xPort );\r
267 \r
268 static void prvSetupPortHardware( xComPort *pxPort, eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits );\r
269 static short sComPortISR( const xComPort * const pxPort );\r
270 \r
271 /*-----------------------------------------------------------*/\r
272 \r
273 /* Define an interrupt handler for each slot in the xPortStatus array. */\r
274 \r
275 #define COM_IRQ_WRAPPER(N)                                                                              \\r
276         static void __interrupt COM_IRQ##N##_WRAPPER( void )            \\r
277         {                                                                                                                       \\r
278                 portDISABLE_INTERRUPTS();                                                               \\r
279                 if( sComPortISR( xPortStatus[##N##] ) )                                 \\r
280                 {                                                                                                               \\r
281                         portSWITCH_CONTEXT();                                                           \\r
282                 }                                                                                                               \\r
283         } \r
284 \r
285 COM_IRQ_WRAPPER( 0 )\r
286 COM_IRQ_WRAPPER( 1 )\r
287 COM_IRQ_WRAPPER( 2 )\r
288 COM_IRQ_WRAPPER( 3 )\r
289 COM_IRQ_WRAPPER( 4 )\r
290 COM_IRQ_WRAPPER( 5 )\r
291 COM_IRQ_WRAPPER( 6 )\r
292 COM_IRQ_WRAPPER( 7 )\r
293 COM_IRQ_WRAPPER( 8 )\r
294 COM_IRQ_WRAPPER( 9 )\r
295 COM_IRQ_WRAPPER( 10 )\r
296 COM_IRQ_WRAPPER( 11 )\r
297 COM_IRQ_WRAPPER( 12 )\r
298 COM_IRQ_WRAPPER( 13 )\r
299 COM_IRQ_WRAPPER( 14 )\r
300 COM_IRQ_WRAPPER( 15 )\r
301 \r
302 static pxISR xISRs[ serMAX_IRQs ] = \r
303 {\r
304         COM_IRQ0_WRAPPER, \r
305         COM_IRQ1_WRAPPER, \r
306         COM_IRQ2_WRAPPER, \r
307         COM_IRQ3_WRAPPER, \r
308         COM_IRQ4_WRAPPER, \r
309         COM_IRQ5_WRAPPER, \r
310         COM_IRQ6_WRAPPER, \r
311         COM_IRQ7_WRAPPER, \r
312         COM_IRQ8_WRAPPER, \r
313         COM_IRQ9_WRAPPER, \r
314         COM_IRQ10_WRAPPER, \r
315         COM_IRQ11_WRAPPER, \r
316         COM_IRQ12_WRAPPER, \r
317         COM_IRQ13_WRAPPER, \r
318         COM_IRQ14_WRAPPER,\r
319         COM_IRQ15_WRAPPER\r
320 };\r
321 \r
322 static pxISR xOldISRs[ serMAX_IRQs ] = { NULL };\r
323 \r
324 /*-----------------------------------------------------------*/\r
325 \r
326 \r
327 xComPortHandle xSerialPortInit( eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits, unsigned portBASE_TYPE uxBufferLength )\r
328 {\r
329 xComPort *pxPort;\r
330 \r
331         /* Create a structure to handle this port. */\r
332         pxPort = ( xComPort * ) pvPortMalloc( sizeof( xComPort ) );\r
333         \r
334         if( pxPort != NULL )\r
335         {\r
336                 /* Create the queues used by the comtest task. */\r
337                 pxPort->xRxedChars = xQueueCreate( uxBufferLength, ( unsigned portBASE_TYPE ) sizeof( char ) );\r
338                 pxPort->xCharsForTx = xQueueCreate( uxBufferLength, ( unsigned portBASE_TYPE ) sizeof( char ) );\r
339 \r
340                 /* Create the test semaphore.  This does nothing useful except test a feature of the scheduler. */\r
341                 vSemaphoreCreateBinary( pxPort->xTestSem );\r
342 \r
343                 prvSetupPortHardware( pxPort, ePort, eWantedBaud, eWantedParity, eWantedDataBits, eWantedStopBits );\r
344 \r
345                 return pxPort;\r
346         }\r
347 \r
348         return NULL;\r
349 }\r
350 /*-----------------------------------------------------------*/\r
351 \r
352 static void prvSetupPortHardware( xComPort *pxPort, eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits )\r
353 {\r
354 short sIn;\r
355 unsigned long ulDivisor;\r
356 unsigned char ucDivisorLow;\r
357 unsigned char ucDivisorHigh;\r
358 unsigned char ucCommParam;\r
359 \r
360         /* IRQ numbers - standard */\r
361         if( ( ePort == serCOM1 ) || ( ePort == serCOM3 ) || ( ePort == serCOM5 ) || ( ePort == serCOM7 ) )\r
362         {\r
363                 pxPort->ucIRQ = serCOM1_STANDARD_IRQ;\r
364                 pxPort->sPort = 0x3f8;\r
365         }\r
366         else\r
367         {\r
368                 pxPort->ucIRQ = serCOM2_STANDARD_IRQ;\r
369                 pxPort->sPort = 0x2f8;\r
370         }\r
371 \r
372         /* Set up variables in port making it easy to see which sIn/o address is which */\r
373         pxPort->usTransmitHoldReg = pxPort->sPort + serTRANSMIT_HOLD_OFFSET;\r
374         pxPort->usReceiveDataRegister = pxPort->sPort + serRECEIVE_DATA_OFFSET;\r
375         pxPort->usBaudRateDivisorLow = pxPort->sPort + serBAUD_RATE_DIVISOR_LOW_OFFSET;\r
376         pxPort->usBaudRateDivisorHigh = pxPort->sPort + serBAUD_RATE_DIVISOR_HIGH_OFFSET;\r
377         pxPort->usInterruptEnableReg = pxPort->sPort + serINTERRUPT_ENABLE_OFFSET;\r
378         pxPort->usInterruptIDReg = pxPort->sPort + serINTERRUPT_ID_OFFSET;\r
379         pxPort->usFIFOCtrlReg = pxPort->sPort + serFIFO_CTRL_OFFSET;\r
380         pxPort->usLineCtrlReg = pxPort->sPort + serLINE_CTRL_OFFSET;\r
381         pxPort->usModemCtrlReg = pxPort->sPort + serMODEM_CTRL_OFFSET;\r
382         pxPort->usLineStatusReg = pxPort->sPort + serLINE_STATUS_OFFSET;\r
383         pxPort->usModemStatusReg = pxPort->sPort + serMODEM_STATUS_OFFSET;\r
384         pxPort->usSCRReg = pxPort->sPort + serSCR_OFFSET;\r
385 \r
386         /* Set communication parameters. */\r
387         ulDivisor = serMAX_BAUD / ulBaudFromEnum[ eWantedBaud ];\r
388         ucDivisorLow = ( unsigned char ) ulDivisor & ( unsigned char ) 0xff;\r
389         ucDivisorHigh = ( unsigned char ) ( ( ( unsigned short ) ulDivisor >> 8 ) & 0xff );\r
390         \r
391         switch( eWantedParity )\r
392         {       \r
393                 case serNO_PARITY:              ucCommParam = 0x00;\r
394                                                                 break;\r
395                 case serODD_PARITY:             ucCommParam = 0x08;\r
396                                                                 break;\r
397                 case serEVEN_PARITY:    ucCommParam = 0x18;\r
398                                                                 break;\r
399                 case serMARK_PARITY:    ucCommParam = 0x28;\r
400                                                                 break;\r
401                 case serSPACE_PARITY:   ucCommParam = 0x38;\r
402                                                                 break;\r
403                 default:                                ucCommParam = 0x00;\r
404                                                                 break;\r
405         }\r
406 \r
407         switch ( eWantedDataBits )\r
408         {\r
409                 case serBITS_5: ucCommParam |= 0x00;\r
410                                                 break;\r
411                 case serBITS_6: ucCommParam |= 0x01;\r
412                                                 break;\r
413                 case serBITS_7: ucCommParam |= 0x02;\r
414                                                 break;\r
415                 case serBITS_8: ucCommParam |= 0x03;\r
416                                                 break;\r
417                 default:                ucCommParam |= 0x03;\r
418                                                 break;\r
419         }\r
420 \r
421         if( eWantedStopBits == serSTOP_2 ) \r
422         {\r
423                 ucCommParam |= 0x04;\r
424         }\r
425 \r
426         /* Reset UART into known state - Thanks to Bradley Town */\r
427         portOUTPUT_BYTE( pxPort->usLineCtrlReg, 0x00 );                 /* Access usTransmitHoldReg/RBR/usInterruptEnableReg */\r
428         portOUTPUT_BYTE( pxPort->usInterruptEnableReg, 0x00 );  /* Disable interrupts from UART */\r
429         portOUTPUT_BYTE( pxPort->usModemCtrlReg, 0x04 );                /* Enable some multi-port cards */\r
430 \r
431         /* Code based on stuff from SVAsync lib. Clear UART Status and data registers\r
432         setting up FIFO if possible */\r
433         sIn = portINPUT_BYTE( pxPort->usSCRReg );\r
434         portOUTPUT_BYTE( pxPort->usSCRReg, 0x55 );\r
435 \r
436         if( portINPUT_BYTE( pxPort->usSCRReg ) == 0x55 )\r
437         {\r
438                 /* The chip is better than an 8250 */\r
439                 portOUTPUT_BYTE( pxPort->usSCRReg, sIn );       /* Set usSCRReg back to what it was before */\r
440                 portINPUT_BYTE( pxPort->usSCRReg);                      /* Give slow motherboards a chance */\r
441 \r
442                 /* Try and start the FIFO. It appears that some chips need a two call \r
443                 protocol, but those that don't seem to work even if you do start it twice. \r
444                 The first call is simply to start it, the second starts it and sets an 8 \r
445                 byte FIFO trigger level. */\r
446                 portOUTPUT_BYTE( pxPort->usFIFOCtrlReg, 0x01 );\r
447                 portINPUT_BYTE( pxPort->usFIFOCtrlReg );                        /* Give slow motherboards a chance to catch up */\r
448                 portOUTPUT_BYTE( pxPort->usFIFOCtrlReg, 0x87 );\r
449 \r
450                 /* Check that the FIFO initialised */\r
451                 if( ( portINPUT_BYTE( pxPort->usInterruptIDReg ) & 0xc0 ) != 0xc0 )\r
452                 {\r
453                         /* It didn't so we assume it isn't there but disable it to be on the \r
454                         safe side. */\r
455                         portOUTPUT_BYTE( pxPort->usInterruptIDReg, 0xfe );\r
456                 }\r
457         }\r
458 \r
459         /* End of (modified) SVAsync code.  \r
460         Set interrupt parameters calculating mask for 8259 controller's \r
461         IMR and number of interrupt handler for given irq level  */\r
462         if (pxPort->ucIRQ <= 7)\r
463         {       \r
464                 /* if 0<=irq<=7 first IMR address used */\r
465                 pxPort->ucInterruptEnableMast = ~(0x01 << pxPort->ucIRQ);\r
466                 pxPort->usIRQVector = pxPort->ucIRQ + 8;\r
467                 pxPort->us8259InterruptMaskReg = serIMR_8259_0;\r
468                 pxPort->us8259InterruptServiceReg = serISR_8259_0;\r
469         }\r
470         else\r
471         {\r
472                 pxPort->ucInterruptEnableMast = ~( 0x01 << ( pxPort->ucIRQ % 8 ) );\r
473                 pxPort->usIRQVector = 0x70 + ( pxPort->ucIRQ - 8) ;\r
474                 pxPort->us8259InterruptMaskReg = serIMR_8259_1;\r
475                 pxPort->us8259InterruptServiceReg = serISR_8259_1;\r
476         }\r
477 \r
478         /* Set Port Toggle to usBaudRateDivisorLow/usBaudRateDivisorHigh registers \r
479         to set baud rate */\r
480         portOUTPUT_BYTE( pxPort->usLineCtrlReg, ucCommParam | 0x80 );\r
481         portOUTPUT_BYTE( pxPort->usBaudRateDivisorLow, ucDivisorLow );\r
482         portOUTPUT_BYTE( pxPort->usBaudRateDivisorHigh, ucDivisorHigh );\r
483 \r
484         /* reset usLineCtrlReg and Port Toggleout */\r
485         portOUTPUT_BYTE( pxPort->usLineCtrlReg, ucCommParam & 0x7F );\r
486 \r
487         portENTER_CRITICAL();\r
488 \r
489         if( xPortStatus[ pxPort->ucIRQ ] == NULL )\r
490         {       \r
491                 xPortStatus[ pxPort->ucIRQ ] = pxPort;\r
492         }\r
493         \r
494         xOldISRs[ pxPort->ucIRQ ] = _dos_getvect( pxPort->usIRQVector );\r
495         _dos_setvect( pxPort->usIRQVector, xISRs[ pxPort->ucIRQ ] );\r
496 \r
497         /* enable interrupt pxPort->ucIRQ level */\r
498         portOUTPUT_BYTE( pxPort->us8259InterruptMaskReg, portINPUT_BYTE( pxPort->us8259InterruptMaskReg ) & pxPort->ucInterruptEnableMast );\r
499 \r
500         /* And allow interrupts again now the hairy bit's done */\r
501         portEXIT_CRITICAL();            \r
502 \r
503         /* This version does not allow flow control. */\r
504         portOUTPUT_BYTE( pxPort->usModemCtrlReg, serALL_MODEM_CTRL_INTERRUPTS );\r
505 \r
506         /* enable all communication's interrupts */\r
507         portOUTPUT_BYTE( pxPort->usInterruptEnableReg, serALL_COMS_INTERRUPTS );\r
508 }\r
509 /*-----------------------------------------------------------*/\r
510 \r
511 static short sComPortISR( const xComPort * const pxPort )\r
512 {\r
513 short sInterruptID;\r
514 char cIn, cOut;\r
515 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;\r
516 extern void vComTestUnsuspendTask( void );\r
517 \r
518         portOUTPUT_BYTE( pxPort->us8259InterruptMaskReg, ( portINPUT_BYTE( pxPort->us8259InterruptMaskReg) | ~pxPort->ucInterruptEnableMast ) );\r
519 \r
520         /* Decide which UART has issued the interrupt */\r
521         sInterruptID = portINPUT_BYTE( pxPort->usInterruptIDReg );\r
522 \r
523         /* service whatever requests the calling UART may have. The top 4 bits are\r
524         either unused or indicate the presence of a functioning FIFO, which we don't\r
525         need to know. So trim them off to simplify the switch statement below. */\r
526         sInterruptID &= 0x0f;\r
527         do\r
528         {\r
529                 switch( sInterruptID )\r
530                 {\r
531                         case 0x0c:      /* Timeout\r
532                                                 Called when FIFO not up to trigger level but no activity for \r
533                                                 a while. Handled exactly as RDAINT, see below for \r
534                                                 description. */\r
535                                                 do\r
536                                                 {\r
537                                                         cIn = ( char ) portINPUT_BYTE( pxPort->usReceiveDataRegister );                                         \r
538                                                         xQueueSendFromISR( pxPort->xRxedChars, &cIn, &xHigherPriorityTaskWoken );\r
539 \r
540                                                         /* Also release the semaphore - this does nothing interesting and is just a test.\r
541                                                         We first attempt to unsuspend the task to check the scheduler correctely detects\r
542                                                         this as an invalid call, then give the semaphore for real. */\r
543                                                         vComTestUnsuspendTask();\r
544                                                         xSemaphoreGiveFromISR( pxPort->xTestSem, &xHigherPriorityTaskWoken );\r
545 \r
546                                                 } while( portINPUT_BYTE( pxPort->usLineStatusReg ) & 0x01 );\r
547                                                 break;\r
548 \r
549                         case 0x06:      /* LSINT */\r
550                                                 portINPUT_BYTE( pxPort->usLineStatusReg );\r
551                                                 break;\r
552 \r
553                         case 0x04:      /* RDAINT */\r
554                                                 /* The usInterruptIDReg flag tested above stops when the \r
555                                                 FIFO is below the trigger level rather than empty, whereas \r
556                                                 this flag allows one to empty it: (do loop because there \r
557                                                 must be at least one to read by virtue of having got here.) */\r
558                                                 do\r
559                                                 {\r
560                                                         cIn = ( char ) portINPUT_BYTE( pxPort->usReceiveDataRegister );                                         \r
561                                                         xQueueSendFromISR( pxPort->xRxedChars, &cIn, &xHigherPriorityTaskWoken );\r
562 \r
563                                                         /* Also release the semaphore - this does nothing interesting and is just a test.\r
564                                                         We first attempt to unsuspend the task to check the scheduler correctely detects\r
565                                                         this as an invalid call, then give the semaphore for real. */\r
566                                                         vComTestUnsuspendTask();\r
567                                                         xSemaphoreGiveFromISR( pxPort->xTestSem, &xHigherPriorityTaskWoken );\r
568 \r
569                                                 } while( portINPUT_BYTE( pxPort->usLineStatusReg ) & 0x01 );\r
570                                                 break;\r
571 \r
572                         case 0x02:      /* serTRANSMIT_HOLD_EMPTY_INT */\r
573                                                 if( xQueueReceiveFromISR( pxPort->xCharsForTx, &cOut, &xHigherPriorityTaskWoken ) != pdTRUE )                                           \r
574                                                 {                                                                                                                                                                               \r
575                                                         /* Queue empty, nothing to send */                                                                                                      \r
576                                                         vInterruptOff( pxPort, serTRANSMIT_HOLD_EMPTY_INT);                                                                     \r
577                                                 }                                                                                                                                                                               \r
578                                                 else                                                                                                                                                                    \r
579                                                 {                                                                                                                                                                               \r
580                                                         portOUTPUT_BYTE( pxPort->usTransmitHoldReg, ( short ) cOut );                                   \r
581                                                 }\r
582                                                 break;\r
583 \r
584                         case 0x00:      /* MSINT */\r
585                                                 portINPUT_BYTE( pxPort->usModemStatusReg );\r
586                                                 break;\r
587                 }               \r
588 \r
589                 /* Get the next instruction, trimming as above */\r
590                 sInterruptID = portINPUT_BYTE( pxPort->usInterruptIDReg ) & 0x0f;\r
591 \r
592         } while( !( sInterruptID & 0x01 ) );\r
593 \r
594         if( pxPort->ucIRQ > 7 )\r
595         {\r
596                 portOUTPUT_BYTE( 0xA0, 0x60 + ( pxPort->ucIRQ & 0x07 ) );\r
597                 portOUTPUT_BYTE( 0x20, 0x62);\r
598         }\r
599         else\r
600         {\r
601                 portOUTPUT_BYTE( 0x20, 0x60 + pxPort->ucIRQ );\r
602         }\r
603 \r
604         portOUTPUT_BYTE( pxPort->us8259InterruptMaskReg, portINPUT_BYTE( pxPort->us8259InterruptMaskReg ) & pxPort->ucInterruptEnableMast );\r
605 \r
606         /* If posting any of the characters to a queue woke a task that was blocked on\r
607         the queue we may want to return to the task just woken (depending on its \r
608         priority relative to the task this ISR interrupted. */\r
609         return xHigherPriorityTaskWoken;\r
610 }\r
611 /*-----------------------------------------------------------*/\r
612 \r
613 portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, char *pcRxedChar, portTickType xBlockTime )\r
614 {\r
615         /* Get the next character from the buffer, note that this routine is only \r
616         called having checked that the is (at least) one to get */\r
617         if( xQueueReceive( pxPort->xRxedChars, pcRxedChar, xBlockTime ) )\r
618         {\r
619                 return pdTRUE;\r
620         }\r
621         else\r
622         {\r
623                 return pdFALSE;\r
624         }\r
625 }\r
626 /*-----------------------------------------------------------*/\r
627 \r
628 portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, char cOutChar, portTickType xBlockTime )\r
629 {\r
630         if( xQueueSend( pxPort->xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )\r
631         {\r
632                 return pdFAIL;\r
633         }\r
634 \r
635         vInterruptOn( pxPort, serTRANSMIT_HOLD_EMPTY_INT );\r
636 \r
637         return pdPASS;\r
638 }\r
639 /*-----------------------------------------------------------*/\r
640 \r
641 void vSerialPutString( xComPortHandle pxPort, const char * const pcString, unsigned short usStringLength )\r
642 {\r
643 char * pcNextChar;\r
644 const portTickType xNoBlock = ( portTickType ) 0;\r
645 \r
646         /* Stop warnings. */\r
647         ( void ) usStringLength;\r
648 \r
649         pcNextChar = ( char * ) pcString;\r
650         while( *pcNextChar )\r
651         {\r
652                 xSerialPutChar( pxPort, *pcNextChar, xNoBlock );\r
653                 pcNextChar++;\r
654         }\r
655 }\r
656 /*-----------------------------------------------------------*/\r
657 \r
658 portBASE_TYPE xSerialWaitForSemaphore( xComPortHandle xPort )\r
659 {\r
660 const portTickType xBlockTime = ( portTickType ) 0xffff;\r
661 \r
662         /* This function does nothing interesting, but test the \r
663         semaphore from ISR mechanism. */\r
664         return xSemaphoreTake( xPort->xTestSem, xBlockTime );   \r
665 }\r
666 /*-----------------------------------------------------------*/\r
667 \r
668 void vSerialClose( xComPortHandle xPort )\r
669 {\r
670         portENTER_CRITICAL();\r
671 \r
672         /* Turn off the interrupts. */\r
673         portOUTPUT_BYTE( xPort->usModemCtrlReg, serNO_INTERRUPTS );\r
674         portOUTPUT_BYTE( xPort->usInterruptEnableReg, serNO_INTERRUPTS );\r
675 \r
676         /* Put back the original ISR. */\r
677         _dos_setvect( xPort->usIRQVector, xOldISRs[ xPort->ucIRQ ] );\r
678 \r
679         /* Remove the reference in the array of xComPort structures. */\r
680         xPortStatus[ xPort->ucIRQ ] = NULL;\r
681 \r
682         /* Delete the queues. */\r
683         vQueueDelete( xPort->xRxedChars );\r
684         vQueueDelete( xPort->xCharsForTx );\r
685 \r
686         vPortFree( ( void * ) xPort );\r
687 \r
688         portEXIT_CRITICAL();\r
689 }\r
690 \r