1 ## FreeRTOS port for Mi-V Soft Processor
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3 ### HW Platform and FPGA design:
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4 This project is tested on following hardware platforms:
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7 - [RISC-V Creative board Mi-V Sample Design](https://github.com/RISCV-on-Microsemi-FPGA/RISC-V-Creative-Board/tree/master/Programming_The_Target_Device/PROC_SUBSYSTEM_MIV_RV32IMA_BaseDesign)
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10 - [PolarFire Eval Kit RISC-V Sample Design](https://github.com/RISCV-on-Microsemi-FPGA/PolarFire-Eval-Kit/tree/master/Programming_The_Target_Device/MIV_RV32IMA_L1_AHB_BaseDesign)
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12 SmartFusion2-Advanced-Dev-Kit
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13 - [SmartFusion2 Advanced Development Kit RISC-V Sample Design](https://github.com/RISCV-on-Microsemi-FPGA/SmartFusion2-Advanced-Dev-Kit/tree/master/Programming_The_Target_Device/PROC_SUBSYSTEM_BaseDesign)
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15 ### How to run the FreeRTOS RISC-V port:
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16 To know how to use the SoftConsole workspace, please refer the [Readme.md](https://github.com/RISCV-on-Microsemi-FPGA/SoftConsole/blob/master/README.md)
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18 The miv-rv32im-freertos-port-test is a self contained project. This project demonstrates
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19 the FreeRTOS running with Microsemi RISC-V processor. This project creates two
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20 tasks and runs them at regular intervals.
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22 This example project requires USB-UART interface to be connected to a host PC.
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23 The host PC must connect to the serial port using a terminal emulator such as
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24 TeraTerm or PuTTY configured as follows:
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32 The ./hw_platform.h file contains the design related information that is required
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33 for this project. If you update the design, the hw_platform.h must be updated
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36 ### FreeRTOS Configurations
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37 You must configure the FreeRTOS as per your applications need. Please read and modify FreeRTOSConfig.h.
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38 E.g. You must set configCPU_CLOCK_HZ parameter in FreeRTOSConfig.h according to the hardware platform
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39 design that you are using.
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41 The RISC-V creative board design uses 66Mhz processor clock. The PolarFire Eval Kit design uses 50Mhz processor clock. The SmartFusion2 Adv. Development kit design uses 83Mhz processor clock.
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43 ### Microsemi SoftConsole Toolchain
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44 To know more please refer: [SoftConsole](https://github.com/RISCV-on-Microsemi-FPGA/SoftConsole)
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46 ### Documentation for Microsemi RISC-V processor, SoftConsole toochain, Debug Tools, FPGA design etc.
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47 To know more please refer: [Documentation](https://github.com/RISCV-on-Microsemi-FPGA/Documentation)
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