2 * FreeRTOS Kernel V10.2.1
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3 * Copyright (C) 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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5 * Permission is hereby granted, free of charge, to any person obtaining a copy of
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6 * this software and associated documentation files (the "Software"), to deal in
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7 * the Software without restriction, including without limitation the rights to
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8 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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9 * the Software, and to permit persons to whom the Software is furnished to do so,
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10 * subject to the following conditions:
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12 * The above copyright notice and this permission notice shall be included in all
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13 * copies or substantial portions of the Software.
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15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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17 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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18 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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19 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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20 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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22 * http://www.FreeRTOS.org
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23 * http://aws.amazon.com/freertos
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25 * 1 tab == 4 spaces!
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28 .extern ulRegTest1LoopCounter
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29 .extern ulRegTest2LoopCounter
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31 .global vRegTest1Implementation
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32 .global vRegTest2Implementation
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34 /*-----------------------------------------------------------*/
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36 /* Constants to define the additional registers found on the Pulpino RI5KY. */
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37 #define lpstart0 0x7b0
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38 #define lpend0 0x7b1
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39 #define lpcount0 0x7b2
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40 #define lpstart1 0x7b4
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41 #define lpend1 0x7b5
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42 #define lpcount1 0x7b6
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44 /*-----------------------------------------------------------*/
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47 * The register check tasks are described in the comments at the top of
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52 vRegTest1Implementation:
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54 /* Fill the additional registers with known values. */
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68 /* Fill the core registers with known values. */
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98 /* Check each register still contains the expected known value.
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99 vRegTest1Implementation uses x31 as the temporary, vRegTest2Implementation
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100 uses x5 as the temporary. */
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102 bne x31, x5, reg1_error_loop
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104 bne x31, x6, reg1_error_loop
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106 bne x31, x7, reg1_error_loop
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108 bne x31, x8, reg1_error_loop
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110 bne x31, x9, reg1_error_loop
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112 bne x31, x10, reg1_error_loop
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114 bne x31, x11, reg1_error_loop
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116 bne x31, x12, reg1_error_loop
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118 bne x31, x13, reg1_error_loop
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120 bne x31, x14, reg1_error_loop
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122 bne x31, x15, reg1_error_loop
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124 bne x31, x16, reg1_error_loop
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126 bne x31, x17, reg1_error_loop
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128 bne x31, x18, reg1_error_loop
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130 bne x31, x19, reg1_error_loop
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132 bne x31, x20, reg1_error_loop
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134 bne x31, x21, reg1_error_loop
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136 bne x31, x22, reg1_error_loop
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138 bne x31, x23, reg1_error_loop
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140 bne x31, x24, reg1_error_loop
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142 bne x31, x25, reg1_error_loop
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144 bne x31, x26, reg1_error_loop
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146 bne x31, x27, reg1_error_loop
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148 bne x31, x28, reg1_error_loop
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150 bne x31, x29, reg1_error_loop
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152 bne x31, x30, reg1_error_loop
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154 /* Check additional chip specific registers still contain the expected
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158 bne x30, x31, reg1_error_loop
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161 bne x30, x31, reg1_error_loop
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164 bne x30, x31, reg1_error_loop
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167 bne x30, x31, reg1_error_loop
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170 bne x30, x31, reg1_error_loop
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173 bne x30, x31, reg1_error_loop
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175 /* Everything passed, increment the loop counter. */
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176 lw x31, ulRegTest1LoopCounterConst
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181 /* Restore clobbered register reading for next loop. */
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184 /* Yield to increase code coverage. */
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191 /* Jump here if a register contains an uxpected value. This stops the loop
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192 counter being incremented so the check task knows an error was found. */
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194 jal reg1_error_loop
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197 ulRegTest1LoopCounterConst: .word ulRegTest1LoopCounter
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199 /*-----------------------------------------------------------*/
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202 vRegTest2Implementation:
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204 /* Fill the additional registers with known values. */
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218 /* Fill the core registers with known values. */
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248 /* Check each register still contains the expected known value.
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249 vRegTest2Implementation uses x5 as the temporary, vRegTest1Implementation
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250 uses x31 as the temporary. */
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252 bne x5, x6, reg2_error_loop
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254 bne x5, x7, reg2_error_loop
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256 bne x5, x8, reg2_error_loop
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258 bne x5, x9, reg2_error_loop
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260 bne x5, x10, reg2_error_loop
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262 bne x5, x11, reg2_error_loop
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264 bne x5, x12, reg2_error_loop
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266 bne x5, x13, reg2_error_loop
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268 bne x5, x14, reg2_error_loop
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270 bne x5, x15, reg2_error_loop
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272 bne x5, x16, reg2_error_loop
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274 bne x5, x17, reg2_error_loop
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276 bne x5, x18, reg2_error_loop
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278 bne x5, x19, reg2_error_loop
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280 bne x5, x20, reg2_error_loop
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282 bne x5, x21, reg2_error_loop
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284 bne x5, x22, reg2_error_loop
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286 bne x5, x23, reg2_error_loop
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288 bne x5, x24, reg2_error_loop
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290 bne x5, x25, reg2_error_loop
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292 bne x5, x26, reg2_error_loop
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294 bne x5, x27, reg2_error_loop
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296 bne x5, x28, reg2_error_loop
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298 bne x5, x29, reg2_error_loop
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300 bne x5, x30, reg2_error_loop
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302 bne x5, x31, reg2_error_loop
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304 /* Check additional chip specific registers still contain the expected
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308 bne x5, x6, reg2_error_loop
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311 bne x5, x6, reg2_error_loop
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314 bne x5, x6, reg2_error_loop
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317 bne x5, x6, reg2_error_loop
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320 bne x5, x6, reg2_error_loop
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323 bne x5, x6, reg2_error_loop
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325 /* Everything passed, increment the loop counter. */
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326 lw x5, ulRegTest2LoopCounterConst
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331 /* Restore clobbered register reading for next loop. */
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338 /* Jump here if a register contains an uxpected value. This stops the loop
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339 counter being incremented so the check task knows an error was found. */
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341 jal reg2_error_loop
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344 ulRegTest2LoopCounterConst: .word ulRegTest2LoopCounter
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