1 /***********************************************************************/
3 /* PROJECT NAME : RL78L13 */
4 /* FILE : iodefine.h */
5 /* DESCRIPTION : Definition of I/O Registers */
6 /* CPU SERIES : RL78 - L13 */
7 /* CPU TYPE : R5F10WMG */
9 /* This file is generated by e2studio. */
11 /***********************************************************************/
\r
13 /************************************************************************/
\r
14 /* Header file generated from device file: */
\r
16 /* Copyright(C) 2012 Renesas */
\r
17 /* Version E1.00d */
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18 /************************************************************************/
\r
20 #ifndef __IOREG_BIT_STRUCTURES
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21 #define __IOREG_BIT_STRUCTURES
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23 unsigned char no0 :1;
\r
24 unsigned char no1 :1;
\r
25 unsigned char no2 :1;
\r
26 unsigned char no3 :1;
\r
27 unsigned char no4 :1;
\r
28 unsigned char no5 :1;
\r
29 unsigned char no6 :1;
\r
30 unsigned char no7 :1;
\r
34 unsigned short no0 :1;
\r
35 unsigned short no1 :1;
\r
36 unsigned short no2 :1;
\r
37 unsigned short no3 :1;
\r
38 unsigned short no4 :1;
\r
39 unsigned short no5 :1;
\r
40 unsigned short no6 :1;
\r
41 unsigned short no7 :1;
\r
42 unsigned short no8 :1;
\r
43 unsigned short no9 :1;
\r
44 unsigned short no10 :1;
\r
45 unsigned short no11 :1;
\r
46 unsigned short no12 :1;
\r
47 unsigned short no13 :1;
\r
48 unsigned short no14 :1;
\r
49 unsigned short no15 :1;
\r
133 unsigned char pm12;
\r
137 unsigned char pm13;
\r
141 unsigned char adm0;
\r
149 unsigned char adm1;
\r
153 unsigned char krctl;
\r
157 unsigned char krm0;
\r
161 unsigned char egp0;
\r
165 unsigned char egn0;
\r
169 unsigned char lcdm1;
\r
173 unsigned char mlcd;
\r
177 unsigned char iics0;
\r
181 unsigned char iicf0;
\r
185 unsigned char flars;
\r
189 unsigned char fssq;
\r
193 unsigned char flrst;
\r
197 unsigned char fsastl;
\r
201 unsigned char fsasth;
\r
205 unsigned char rtcc0;
\r
209 unsigned char rtcc1;
\r
217 unsigned char ostc;
\r
225 unsigned char cks0;
\r
229 unsigned char cks1;
\r
233 unsigned char lvim;
\r
237 unsigned char lvis;
\r
241 unsigned char monsta0;
\r
245 unsigned char asim;
\r
249 unsigned char dmc0;
\r
253 unsigned char dmc1;
\r
257 unsigned char drc0;
\r
261 unsigned char drc1;
\r
265 unsigned short if2;
\r
269 unsigned char if2l;
\r
273 unsigned char if2h;
\r
277 unsigned short if3;
\r
281 unsigned char if3l;
\r
285 unsigned short mk2;
\r
289 unsigned char mk2l;
\r
293 unsigned char mk2h;
\r
297 unsigned short mk3;
\r
301 unsigned char mk3l;
\r
305 unsigned short pr02;
\r
309 unsigned char pr02l;
\r
313 unsigned char pr02h;
\r
317 unsigned short pr03;
\r
321 unsigned char pr03l;
\r
325 unsigned short pr12;
\r
329 unsigned char pr12l;
\r
333 unsigned char pr12h;
\r
337 unsigned short pr13;
\r
341 unsigned char pr13l;
\r
345 unsigned short if0;
\r
349 unsigned char if0l;
\r
353 unsigned char if0h;
\r
357 unsigned short if1;
\r
361 unsigned char if1l;
\r
365 unsigned char if1h;
\r
369 unsigned short mk0;
\r
373 unsigned char mk0l;
\r
377 unsigned char mk0h;
\r
381 unsigned short mk1;
\r
385 unsigned char mk1l;
\r
389 unsigned char mk1h;
\r
393 unsigned short pr00;
\r
397 unsigned char pr00l;
\r
401 unsigned char pr00h;
\r
405 unsigned short pr01;
\r
409 unsigned char pr01l;
\r
413 unsigned char pr01h;
\r
417 unsigned short pr10;
\r
421 unsigned char pr10l;
\r
425 unsigned char pr10h;
\r
429 unsigned short pr11;
\r
433 unsigned char pr11l;
\r
437 unsigned char pr11h;
\r
445 #define P0 (*(volatile union un_p0 *)0xFFF00).p0
\r
446 #define P0_bit (*(volatile union un_p0 *)0xFFF00).BIT
\r
447 #define P1 (*(volatile union un_p1 *)0xFFF01).p1
\r
448 #define P1_bit (*(volatile union un_p1 *)0xFFF01).BIT
\r
449 #define P2 (*(volatile union un_p2 *)0xFFF02).p2
\r
450 #define P2_bit (*(volatile union un_p2 *)0xFFF02).BIT
\r
451 #define P3 (*(volatile union un_p3 *)0xFFF03).p3
\r
452 #define P3_bit (*(volatile union un_p3 *)0xFFF03).BIT
\r
453 #define P4 (*(volatile union un_p4 *)0xFFF04).p4
\r
454 #define P4_bit (*(volatile union un_p4 *)0xFFF04).BIT
\r
455 #define P5 (*(volatile union un_p5 *)0xFFF05).p5
\r
456 #define P5_bit (*(volatile union un_p5 *)0xFFF05).BIT
\r
457 #define P6 (*(volatile union un_p6 *)0xFFF06).p6
\r
458 #define P6_bit (*(volatile union un_p6 *)0xFFF06).BIT
\r
459 #define P7 (*(volatile union un_p7 *)0xFFF07).p7
\r
460 #define P7_bit (*(volatile union un_p7 *)0xFFF07).BIT
\r
461 #define P12 (*(volatile union un_p12 *)0xFFF0C).p12
\r
462 #define P12_bit (*(volatile union un_p12 *)0xFFF0C).BIT
\r
463 #define P13 (*(volatile union un_p13 *)0xFFF0D).p13
\r
464 #define P13_bit (*(volatile union un_p13 *)0xFFF0D).BIT
\r
465 #define SDR00 (*(volatile unsigned short *)0xFFF10)
\r
466 #define SIO00 (*(volatile unsigned char *)0xFFF10)
\r
467 #define TXD0 (*(volatile unsigned char *)0xFFF10)
\r
468 #define SDR01 (*(volatile unsigned short *)0xFFF12)
\r
469 #define RXD0 (*(volatile unsigned char *)0xFFF12)
\r
470 #define SDR12 (*(volatile unsigned short *)0xFFF14)
\r
471 #define TXD3 (*(volatile unsigned char *)0xFFF14)
\r
472 #define SDR13 (*(volatile unsigned short *)0xFFF16)
\r
473 #define RXD3 (*(volatile unsigned char *)0xFFF16)
\r
474 #define TDR00 (*(volatile unsigned short *)0xFFF18)
\r
475 #define TDR01 (*(volatile unsigned short *)0xFFF1A)
\r
476 #define TDR01L (*(volatile unsigned char *)0xFFF1A)
\r
477 #define TDR01H (*(volatile unsigned char *)0xFFF1B)
\r
478 #define ADCR (*(volatile unsigned short *)0xFFF1E)
\r
479 #define ADCRH (*(volatile unsigned char *)0xFFF1F)
\r
480 #define PM0 (*(volatile union un_pm0 *)0xFFF20).pm0
\r
481 #define PM0_bit (*(volatile union un_pm0 *)0xFFF20).BIT
\r
482 #define PM1 (*(volatile union un_pm1 *)0xFFF21).pm1
\r
483 #define PM1_bit (*(volatile union un_pm1 *)0xFFF21).BIT
\r
484 #define PM2 (*(volatile union un_pm2 *)0xFFF22).pm2
\r
485 #define PM2_bit (*(volatile union un_pm2 *)0xFFF22).BIT
\r
486 #define PM3 (*(volatile union un_pm3 *)0xFFF23).pm3
\r
487 #define PM3_bit (*(volatile union un_pm3 *)0xFFF23).BIT
\r
488 #define PM4 (*(volatile union un_pm4 *)0xFFF24).pm4
\r
489 #define PM4_bit (*(volatile union un_pm4 *)0xFFF24).BIT
\r
490 #define PM5 (*(volatile union un_pm5 *)0xFFF25).pm5
\r
491 #define PM5_bit (*(volatile union un_pm5 *)0xFFF25).BIT
\r
492 #define PM6 (*(volatile union un_pm6 *)0xFFF26).pm6
\r
493 #define PM6_bit (*(volatile union un_pm6 *)0xFFF26).BIT
\r
494 #define PM7 (*(volatile union un_pm7 *)0xFFF27).pm7
\r
495 #define PM7_bit (*(volatile union un_pm7 *)0xFFF27).BIT
\r
496 #define PM12 (*(volatile union un_pm12 *)0xFFF2C).pm12
\r
497 #define PM12_bit (*(volatile union un_pm12 *)0xFFF2C).BIT
\r
498 #define PM13 (*(volatile union un_pm13 *)0xFFF2D).pm13
\r
499 #define PM13_bit (*(volatile union un_pm13 *)0xFFF2D).BIT
\r
500 #define ADM0 (*(volatile union un_adm0 *)0xFFF30).adm0
\r
501 #define ADM0_bit (*(volatile union un_adm0 *)0xFFF30).BIT
\r
502 #define ADS (*(volatile union un_ads *)0xFFF31).ads
\r
503 #define ADS_bit (*(volatile union un_ads *)0xFFF31).BIT
\r
504 #define ADM1 (*(volatile union un_adm1 *)0xFFF32).adm1
\r
505 #define ADM1_bit (*(volatile union un_adm1 *)0xFFF32).BIT
\r
506 #define KRCTL (*(volatile union un_krctl *)0xFFF34).krctl
\r
507 #define KRCTL_bit (*(volatile union un_krctl *)0xFFF34).BIT
\r
508 #define KRF (*(volatile unsigned char *)0xFFF35)
\r
509 #define KRM0 (*(volatile union un_krm0 *)0xFFF37).krm0
\r
510 #define KRM0_bit (*(volatile union un_krm0 *)0xFFF37).BIT
\r
511 #define EGP0 (*(volatile union un_egp0 *)0xFFF38).egp0
\r
512 #define EGP0_bit (*(volatile union un_egp0 *)0xFFF38).BIT
\r
513 #define EGN0 (*(volatile union un_egn0 *)0xFFF39).egn0
\r
514 #define EGN0_bit (*(volatile union un_egn0 *)0xFFF39).BIT
\r
515 #define LCDM0 (*(volatile unsigned char *)0xFFF40)
\r
516 #define LCDM1 (*(volatile union un_lcdm1 *)0xFFF41).lcdm1
\r
517 #define LCDM1_bit (*(volatile union un_lcdm1 *)0xFFF41).BIT
\r
518 #define LCDC0 (*(volatile unsigned char *)0xFFF42)
\r
519 #define VLCD (*(volatile unsigned char *)0xFFF43)
\r
520 #define SDR02 (*(volatile unsigned short *)0xFFF44)
\r
521 #define SIO10 (*(volatile unsigned char *)0xFFF44)
\r
522 #define TXD1 (*(volatile unsigned char *)0xFFF44)
\r
523 #define SDR03 (*(volatile unsigned short *)0xFFF46)
\r
524 #define RXD1 (*(volatile unsigned char *)0xFFF46)
\r
525 #define SDR10 (*(volatile unsigned short *)0xFFF48)
\r
526 #define TXD2 (*(volatile unsigned char *)0xFFF48)
\r
527 #define SDR11 (*(volatile unsigned short *)0xFFF4A)
\r
528 #define RXD2 (*(volatile unsigned char *)0xFFF4A)
\r
529 #define MLCD (*(volatile union un_mlcd *)0xFFF4C).mlcd
\r
530 #define MLCD_bit (*(volatile union un_mlcd *)0xFFF4C).BIT
\r
531 #define IICA0 (*(volatile unsigned char *)0xFFF50)
\r
532 #define IICS0 (*(volatile union un_iics0 *)0xFFF51).iics0
\r
533 #define IICS0_bit (*(volatile union un_iics0 *)0xFFF51).BIT
\r
534 #define IICF0 (*(volatile union un_iicf0 *)0xFFF52).iicf0
\r
535 #define IICF0_bit (*(volatile union un_iicf0 *)0xFFF52).BIT
\r
536 #define TDR02 (*(volatile unsigned short *)0xFFF64)
\r
537 #define TDR03 (*(volatile unsigned short *)0xFFF66)
\r
538 #define TDR03L (*(volatile unsigned char *)0xFFF66)
\r
539 #define TDR03H (*(volatile unsigned char *)0xFFF67)
\r
540 #define TDR04 (*(volatile unsigned short *)0xFFF68)
\r
541 #define TDR05 (*(volatile unsigned short *)0xFFF6A)
\r
542 #define TDR06 (*(volatile unsigned short *)0xFFF6C)
\r
543 #define TDR07 (*(volatile unsigned short *)0xFFF6E)
\r
544 #define FLPMC (*(volatile unsigned char *)0xFFF80)
\r
545 #define FLARS (*(volatile union un_flars *)0xFFF81).flars
\r
546 #define FLARS_bit (*(volatile union un_flars *)0xFFF81).BIT
\r
547 #define FLAPL (*(volatile unsigned short *)0xFFF82)
\r
548 #define FLAPH (*(volatile unsigned char *)0xFFF84)
\r
549 #define FSSQ (*(volatile union un_fssq *)0xFFF85).fssq
\r
550 #define FSSQ_bit (*(volatile union un_fssq *)0xFFF85).BIT
\r
551 #define FLSEDL (*(volatile unsigned short *)0xFFF86)
\r
552 #define FLSEDH (*(volatile unsigned char *)0xFFF88)
\r
553 #define FLRST (*(volatile union un_flrst *)0xFFF89).flrst
\r
554 #define FLRST_bit (*(volatile union un_flrst *)0xFFF89).BIT
\r
555 #define FSASTL (*(volatile union un_fsastl *)0xFFF8A).fsastl
\r
556 #define FSASTL_bit (*(volatile union un_fsastl *)0xFFF8A).BIT
\r
557 #define FSASTH (*(volatile union un_fsasth *)0xFFF8B).fsasth
\r
558 #define FSASTH_bit (*(volatile union un_fsasth *)0xFFF8B).BIT
\r
559 #define FLWL (*(volatile unsigned short *)0xFFF8C)
\r
560 #define FLWH (*(volatile unsigned short *)0xFFF8E)
\r
561 #define ITMC (*(volatile unsigned short *)0xFFF90)
\r
562 #define SEC (*(volatile unsigned char *)0xFFF92)
\r
563 #define MIN (*(volatile unsigned char *)0xFFF93)
\r
564 #define HOUR (*(volatile unsigned char *)0xFFF94)
\r
565 #define WEEK (*(volatile unsigned char *)0xFFF95)
\r
566 #define DAY (*(volatile unsigned char *)0xFFF96)
\r
567 #define MONTH (*(volatile unsigned char *)0xFFF97)
\r
568 #define YEAR (*(volatile unsigned char *)0xFFF98)
\r
569 #define ALARMWM (*(volatile unsigned char *)0xFFF9A)
\r
570 #define ALARMWH (*(volatile unsigned char *)0xFFF9B)
\r
571 #define ALARMWW (*(volatile unsigned char *)0xFFF9C)
\r
572 #define RTCC0 (*(volatile union un_rtcc0 *)0xFFF9D).rtcc0
\r
573 #define RTCC0_bit (*(volatile union un_rtcc0 *)0xFFF9D).BIT
\r
574 #define RTCC1 (*(volatile union un_rtcc1 *)0xFFF9E).rtcc1
\r
575 #define RTCC1_bit (*(volatile union un_rtcc1 *)0xFFF9E).BIT
\r
576 #define CMC (*(volatile unsigned char *)0xFFFA0)
\r
577 #define CSC (*(volatile union un_csc *)0xFFFA1).csc
\r
578 #define CSC_bit (*(volatile union un_csc *)0xFFFA1).BIT
\r
579 #define OSTC (*(volatile union un_ostc *)0xFFFA2).ostc
\r
580 #define OSTC_bit (*(volatile union un_ostc *)0xFFFA2).BIT
\r
581 #define OSTS (*(volatile unsigned char *)0xFFFA3)
\r
582 #define CKC (*(volatile union un_ckc *)0xFFFA4).ckc
\r
583 #define CKC_bit (*(volatile union un_ckc *)0xFFFA4).BIT
\r
584 #define CKS0 (*(volatile union un_cks0 *)0xFFFA5).cks0
\r
585 #define CKS0_bit (*(volatile union un_cks0 *)0xFFFA5).BIT
\r
586 #define CKS1 (*(volatile union un_cks1 *)0xFFFA6).cks1
\r
587 #define CKS1_bit (*(volatile union un_cks1 *)0xFFFA6).BIT
\r
588 #define RESF (*(volatile unsigned char *)0xFFFA8)
\r
589 #define LVIM (*(volatile union un_lvim *)0xFFFA9).lvim
\r
590 #define LVIM_bit (*(volatile union un_lvim *)0xFFFA9).BIT
\r
591 #define LVIS (*(volatile union un_lvis *)0xFFFAA).lvis
\r
592 #define LVIS_bit (*(volatile union un_lvis *)0xFFFAA).BIT
\r
593 #define WDTE (*(volatile unsigned char *)0xFFFAB)
\r
594 #define CRCIN (*(volatile unsigned char *)0xFFFAC)
\r
595 #define RXB (*(volatile unsigned char *)0xFFFAD)
\r
596 #define TXS (*(volatile unsigned char *)0xFFFAD)
\r
597 #define MONSTA0 (*(volatile union un_monsta0 *)0xFFFAE).monsta0
\r
598 #define MONSTA0_bit (*(volatile union un_monsta0 *)0xFFFAE).BIT
\r
599 #define ASIM (*(volatile union un_asim *)0xFFFAF).asim
\r
600 #define ASIM_bit (*(volatile union un_asim *)0xFFFAF).BIT
\r
601 #define DSA0 (*(volatile unsigned char *)0xFFFB0)
\r
602 #define DSA1 (*(volatile unsigned char *)0xFFFB1)
\r
603 #define DRA0 (*(volatile unsigned short *)0xFFFB2)
\r
604 #define DRA0L (*(volatile unsigned char *)0xFFFB2)
\r
605 #define DRA0H (*(volatile unsigned char *)0xFFFB3)
\r
606 #define DRA1 (*(volatile unsigned short *)0xFFFB4)
\r
607 #define DRA1L (*(volatile unsigned char *)0xFFFB4)
\r
608 #define DRA1H (*(volatile unsigned char *)0xFFFB5)
\r
609 #define DBC0 (*(volatile unsigned short *)0xFFFB6)
\r
610 #define DBC0L (*(volatile unsigned char *)0xFFFB6)
\r
611 #define DBC0H (*(volatile unsigned char *)0xFFFB7)
\r
612 #define DBC1 (*(volatile unsigned short *)0xFFFB8)
\r
613 #define DBC1L (*(volatile unsigned char *)0xFFFB8)
\r
614 #define DBC1H (*(volatile unsigned char *)0xFFFB9)
\r
615 #define DMC0 (*(volatile union un_dmc0 *)0xFFFBA).dmc0
\r
616 #define DMC0_bit (*(volatile union un_dmc0 *)0xFFFBA).BIT
\r
617 #define DMC1 (*(volatile union un_dmc1 *)0xFFFBB).dmc1
\r
618 #define DMC1_bit (*(volatile union un_dmc1 *)0xFFFBB).BIT
\r
619 #define DRC0 (*(volatile union un_drc0 *)0xFFFBC).drc0
\r
620 #define DRC0_bit (*(volatile union un_drc0 *)0xFFFBC).BIT
\r
621 #define DRC1 (*(volatile union un_drc1 *)0xFFFBD).drc1
\r
622 #define DRC1_bit (*(volatile union un_drc1 *)0xFFFBD).BIT
\r
623 #define IF2 (*(volatile union un_if2 *)0xFFFD0).if2
\r
624 #define IF2_bit (*(volatile union un_if2 *)0xFFFD0).BIT
\r
625 #define IF2L (*(volatile union un_if2l *)0xFFFD0).if2l
\r
626 #define IF2L_bit (*(volatile union un_if2l *)0xFFFD0).BIT
\r
627 #define IF2H (*(volatile union un_if2h *)0xFFFD1).if2h
\r
628 #define IF2H_bit (*(volatile union un_if2h *)0xFFFD1).BIT
\r
629 #define IF3 (*(volatile union un_if3 *)0xFFFD2).if3
\r
630 #define IF3_bit (*(volatile union un_if3 *)0xFFFD2).BIT
\r
631 #define IF3L (*(volatile union un_if3l *)0xFFFD2).if3l
\r
632 #define IF3L_bit (*(volatile union un_if3l *)0xFFFD2).BIT
\r
633 #define MK2 (*(volatile union un_mk2 *)0xFFFD4).mk2
\r
634 #define MK2_bit (*(volatile union un_mk2 *)0xFFFD4).BIT
\r
635 #define MK2L (*(volatile union un_mk2l *)0xFFFD4).mk2l
\r
636 #define MK2L_bit (*(volatile union un_mk2l *)0xFFFD4).BIT
\r
637 #define MK2H (*(volatile union un_mk2h *)0xFFFD5).mk2h
\r
638 #define MK2H_bit (*(volatile union un_mk2h *)0xFFFD5).BIT
\r
639 #define MK3 (*(volatile union un_mk3 *)0xFFFD6).mk3
\r
640 #define MK3_bit (*(volatile union un_mk3 *)0xFFFD6).BIT
\r
641 #define MK3L (*(volatile union un_mk3l *)0xFFFD6).mk3l
\r
642 #define MK3L_bit (*(volatile union un_mk3l *)0xFFFD6).BIT
\r
643 #define PR02 (*(volatile union un_pr02 *)0xFFFD8).pr02
\r
644 #define PR02_bit (*(volatile union un_pr02 *)0xFFFD8).BIT
\r
645 #define PR02L (*(volatile union un_pr02l *)0xFFFD8).pr02l
\r
646 #define PR02L_bit (*(volatile union un_pr02l *)0xFFFD8).BIT
\r
647 #define PR02H (*(volatile union un_pr02h *)0xFFFD9).pr02h
\r
648 #define PR02H_bit (*(volatile union un_pr02h *)0xFFFD9).BIT
\r
649 #define PR03 (*(volatile union un_pr03 *)0xFFFDA).pr03
\r
650 #define PR03_bit (*(volatile union un_pr03 *)0xFFFDA).BIT
\r
651 #define PR03L (*(volatile union un_pr03l *)0xFFFDA).pr03l
\r
652 #define PR03L_bit (*(volatile union un_pr03l *)0xFFFDA).BIT
\r
653 #define PR12 (*(volatile union un_pr12 *)0xFFFDC).pr12
\r
654 #define PR12_bit (*(volatile union un_pr12 *)0xFFFDC).BIT
\r
655 #define PR12L (*(volatile union un_pr12l *)0xFFFDC).pr12l
\r
656 #define PR12L_bit (*(volatile union un_pr12l *)0xFFFDC).BIT
\r
657 #define PR12H (*(volatile union un_pr12h *)0xFFFDD).pr12h
\r
658 #define PR12H_bit (*(volatile union un_pr12h *)0xFFFDD).BIT
\r
659 #define PR13 (*(volatile union un_pr13 *)0xFFFDE).pr13
\r
660 #define PR13_bit (*(volatile union un_pr13 *)0xFFFDE).BIT
\r
661 #define PR13L (*(volatile union un_pr13l *)0xFFFDE).pr13l
\r
662 #define PR13L_bit (*(volatile union un_pr13l *)0xFFFDE).BIT
\r
663 #define IF0 (*(volatile union un_if0 *)0xFFFE0).if0
\r
664 #define IF0_bit (*(volatile union un_if0 *)0xFFFE0).BIT
\r
665 #define IF0L (*(volatile union un_if0l *)0xFFFE0).if0l
\r
666 #define IF0L_bit (*(volatile union un_if0l *)0xFFFE0).BIT
\r
667 #define IF0H (*(volatile union un_if0h *)0xFFFE1).if0h
\r
668 #define IF0H_bit (*(volatile union un_if0h *)0xFFFE1).BIT
\r
669 #define IF1 (*(volatile union un_if1 *)0xFFFE2).if1
\r
670 #define IF1_bit (*(volatile union un_if1 *)0xFFFE2).BIT
\r
671 #define IF1L (*(volatile union un_if1l *)0xFFFE2).if1l
\r
672 #define IF1L_bit (*(volatile union un_if1l *)0xFFFE2).BIT
\r
673 #define IF1H (*(volatile union un_if1h *)0xFFFE3).if1h
\r
674 #define IF1H_bit (*(volatile union un_if1h *)0xFFFE3).BIT
\r
675 #define MK0 (*(volatile union un_mk0 *)0xFFFE4).mk0
\r
676 #define MK0_bit (*(volatile union un_mk0 *)0xFFFE4).BIT
\r
677 #define MK0L (*(volatile union un_mk0l *)0xFFFE4).mk0l
\r
678 #define MK0L_bit (*(volatile union un_mk0l *)0xFFFE4).BIT
\r
679 #define MK0H (*(volatile union un_mk0h *)0xFFFE5).mk0h
\r
680 #define MK0H_bit (*(volatile union un_mk0h *)0xFFFE5).BIT
\r
681 #define MK1 (*(volatile union un_mk1 *)0xFFFE6).mk1
\r
682 #define MK1_bit (*(volatile union un_mk1 *)0xFFFE6).BIT
\r
683 #define MK1L (*(volatile union un_mk1l *)0xFFFE6).mk1l
\r
684 #define MK1L_bit (*(volatile union un_mk1l *)0xFFFE6).BIT
\r
685 #define MK1H (*(volatile union un_mk1h *)0xFFFE7).mk1h
\r
686 #define MK1H_bit (*(volatile union un_mk1h *)0xFFFE7).BIT
\r
687 #define PR00 (*(volatile union un_pr00 *)0xFFFE8).pr00
\r
688 #define PR00_bit (*(volatile union un_pr00 *)0xFFFE8).BIT
\r
689 #define PR00L (*(volatile union un_pr00l *)0xFFFE8).pr00l
\r
690 #define PR00L_bit (*(volatile union un_pr00l *)0xFFFE8).BIT
\r
691 #define PR00H (*(volatile union un_pr00h *)0xFFFE9).pr00h
\r
692 #define PR00H_bit (*(volatile union un_pr00h *)0xFFFE9).BIT
\r
693 #define PR01 (*(volatile union un_pr01 *)0xFFFEA).pr01
\r
694 #define PR01_bit (*(volatile union un_pr01 *)0xFFFEA).BIT
\r
695 #define PR01L (*(volatile union un_pr01l *)0xFFFEA).pr01l
\r
696 #define PR01L_bit (*(volatile union un_pr01l *)0xFFFEA).BIT
\r
697 #define PR01H (*(volatile union un_pr01h *)0xFFFEB).pr01h
\r
698 #define PR01H_bit (*(volatile union un_pr01h *)0xFFFEB).BIT
\r
699 #define PR10 (*(volatile union un_pr10 *)0xFFFEC).pr10
\r
700 #define PR10_bit (*(volatile union un_pr10 *)0xFFFEC).BIT
\r
701 #define PR10L (*(volatile union un_pr10l *)0xFFFEC).pr10l
\r
702 #define PR10L_bit (*(volatile union un_pr10l *)0xFFFEC).BIT
\r
703 #define PR10H (*(volatile union un_pr10h *)0xFFFED).pr10h
\r
704 #define PR10H_bit (*(volatile union un_pr10h *)0xFFFED).BIT
\r
705 #define PR11 (*(volatile union un_pr11 *)0xFFFEE).pr11
\r
706 #define PR11_bit (*(volatile union un_pr11 *)0xFFFEE).BIT
\r
707 #define PR11L (*(volatile union un_pr11l *)0xFFFEE).pr11l
\r
708 #define PR11L_bit (*(volatile union un_pr11l *)0xFFFEE).BIT
\r
709 #define PR11H (*(volatile union un_pr11h *)0xFFFEF).pr11h
\r
710 #define PR11H_bit (*(volatile union un_pr11h *)0xFFFEF).BIT
\r
711 #define MDAL (*(volatile unsigned short *)0xFFFF0)
\r
712 #define MULA (*(volatile unsigned short *)0xFFFF0)
\r
713 #define MDAH (*(volatile unsigned short *)0xFFFF2)
\r
714 #define MULB (*(volatile unsigned short *)0xFFFF2)
\r
715 #define MDBH (*(volatile unsigned short *)0xFFFF4)
\r
716 #define MULOH (*(volatile unsigned short *)0xFFFF4)
\r
717 #define MDBL (*(volatile unsigned short *)0xFFFF6)
\r
718 #define MULOL (*(volatile unsigned short *)0xFFFF6)
\r
719 #define PMC (*(volatile union un_pmc *)0xFFFFE).pmc
\r
720 #define PMC_bit (*(volatile union un_pmc *)0xFFFFE).BIT
\r
725 #define ADCE ADM0_bit.no0
\r
726 #define ADCS ADM0_bit.no7
\r
727 #define LCDVLM LCDM1_bit.no0
\r
728 #define LCDSEL LCDM1_bit.no3
\r
729 #define BLON LCDM1_bit.no4
\r
730 #define VLCON LCDM1_bit.no5
\r
731 #define SCOC LCDM1_bit.no6
\r
732 #define LCDON LCDM1_bit.no7
\r
733 #define OPTCKE MLCD_bit.no4
\r
734 #define COMEXP MLCD_bit.no6
\r
735 #define MLCDEN MLCD_bit.no7
\r
736 #define SPD0 IICS0_bit.no0
\r
737 #define STD0 IICS0_bit.no1
\r
738 #define ACKD0 IICS0_bit.no2
\r
739 #define TRC0 IICS0_bit.no3
\r
740 #define COI0 IICS0_bit.no4
\r
741 #define EXC0 IICS0_bit.no5
\r
742 #define ALD0 IICS0_bit.no6
\r
743 #define MSTS0 IICS0_bit.no7
\r
744 #define IICRSV0 IICF0_bit.no0
\r
745 #define STCEN0 IICF0_bit.no1
\r
746 #define IICBSY0 IICF0_bit.no6
\r
747 #define STCF0 IICF0_bit.no7
\r
748 #define FSSTP FSSQ_bit.no6
\r
749 #define SQST FSSQ_bit.no7
\r
750 #define SQEND FSASTH_bit.no6
\r
751 #define ESQEND FSASTH_bit.no7
\r
752 #define RCLOE1 RTCC0_bit.no5
\r
753 #define RCLOSEL RTCC0_bit.no6
\r
754 #define RTCE RTCC0_bit.no7
\r
755 #define RWAIT RTCC1_bit.no0
\r
756 #define RWST RTCC1_bit.no1
\r
757 #define RIFG RTCC1_bit.no3
\r
758 #define WAFG RTCC1_bit.no4
\r
759 #define RITE RTCC1_bit.no5
\r
760 #define WALIE RTCC1_bit.no6
\r
761 #define WALE RTCC1_bit.no7
\r
762 #define HIOSTOP CSC_bit.no0
\r
763 #define XTSTOP CSC_bit.no6
\r
764 #define MSTOP CSC_bit.no7
\r
765 #define SDIV CKC_bit.no3
\r
766 #define MCM0 CKC_bit.no4
\r
767 #define MCS CKC_bit.no5
\r
768 #define CSS CKC_bit.no6
\r
769 #define CLS CKC_bit.no7
\r
770 #define PCLOE0 CKS0_bit.no7
\r
771 #define PCLOE1 CKS1_bit.no7
\r
772 #define LVIF LVIM_bit.no0
\r
773 #define LVIOMSK LVIM_bit.no1
\r
774 #define LVISEN LVIM_bit.no7
\r
775 #define LVILV LVIS_bit.no0
\r
776 #define LVIMD LVIS_bit.no7
\r
777 #define DWAIT0 DMC0_bit.no4
\r
778 #define DS0 DMC0_bit.no5
\r
779 #define DRS0 DMC0_bit.no6
\r
780 #define STG0 DMC0_bit.no7
\r
781 #define DWAIT1 DMC1_bit.no4
\r
782 #define DS1 DMC1_bit.no5
\r
783 #define DRS1 DMC1_bit.no6
\r
784 #define STG1 DMC1_bit.no7
\r
785 #define DST0 DRC0_bit.no0
\r
786 #define DEN0 DRC0_bit.no7
\r
787 #define DST1 DRC1_bit.no0
\r
788 #define DEN1 DRC1_bit.no7
\r
789 #define TKBIF2 IF2_bit.no0
\r
790 #define TMIF04 IF2_bit.no1
\r
791 #define TMIF05 IF2_bit.no2
\r
792 #define PIF6 IF2_bit.no3
\r
793 #define PIF7 IF2_bit.no4
\r
794 #define LCDIF0 IF2_bit.no5
\r
795 #define CMPIF0 IF2_bit.no6
\r
796 #define CMPIF1 IF2_bit.no7
\r
797 #define TMIF06 IF2H_bit.no0
\r
798 #define TMIF07 IF2H_bit.no1
\r
799 #define SREIF3 IF2H_bit.no4
\r
800 #define MDIF IF2H_bit.no5
\r
801 #define FLIF IF2H_bit.no7
\r
802 #define DMAIF2 IF3_bit.no0
\r
803 #define DMAIF3 IF3_bit.no1
\r
804 #define TKBMK2 MK2_bit.no0
\r
805 #define TMMK04 MK2_bit.no1
\r
806 #define TMMK05 MK2_bit.no2
\r
807 #define PMK6 MK2_bit.no3
\r
808 #define PMK7 MK2_bit.no4
\r
809 #define LCDMK0 MK2_bit.no5
\r
810 #define CMPMK0 MK2_bit.no6
\r
811 #define CMPMK1 MK2_bit.no7
\r
812 #define TMMK06 MK2H_bit.no0
\r
813 #define TMMK07 MK2H_bit.no1
\r
814 #define SREMK3 MK2H_bit.no4
\r
815 #define MDMK MK2H_bit.no5
\r
816 #define FLMK MK2H_bit.no7
\r
817 #define DMAMK2 MK3_bit.no0
\r
818 #define DMAMK3 MK3_bit.no1
\r
819 #define TKBPR02 PR02_bit.no0
\r
820 #define TMPR004 PR02_bit.no1
\r
821 #define TMPR005 PR02_bit.no2
\r
822 #define PPR06 PR02_bit.no3
\r
823 #define PPR07 PR02_bit.no4
\r
824 #define LCDPR00 PR02_bit.no5
\r
825 #define CMPPR00 PR02_bit.no6
\r
826 #define CMPPR01 PR02_bit.no7
\r
827 #define TPR006 PR02H_bit.no0
\r
828 #define TPR007 PR02H_bit.no1
\r
829 #define SREPR03 PR02H_bit.no4
\r
830 #define MDPR0 PR02H_bit.no5
\r
831 #define FLPR0 PR02H_bit.no7
\r
832 #define DMAPR02 PR03_bit.no0
\r
833 #define DMAPR03 PR03_bit.no1
\r
834 #define TKBPR12 PR12_bit.no0
\r
835 #define TMPR104 PR12_bit.no1
\r
836 #define TMPR105 PR12_bit.no2
\r
837 #define PPR16 PR12_bit.no3
\r
838 #define PPR17 PR12_bit.no4
\r
839 #define LCDPR10 PR12_bit.no5
\r
840 #define CMPPR10 PR12_bit.no6
\r
841 #define CMPPR11 PR12_bit.no7
\r
842 #define TPR106 PR12H_bit.no0
\r
843 #define TPR107 PR12H_bit.no1
\r
844 #define SREPR13 PR12H_bit.no4
\r
845 #define MDPR1 PR12H_bit.no5
\r
846 #define FLPR1 PR12H_bit.no7
\r
847 #define DMAPR12 PR13_bit.no0
\r
848 #define DMAPR13 PR13_bit.no1
\r
849 #define WDTIIF IF0_bit.no0
\r
850 #define LVIIF IF0_bit.no1
\r
851 #define PIF0 IF0_bit.no2
\r
852 #define PIF1 IF0_bit.no3
\r
853 #define PIF2 IF0_bit.no4
\r
854 #define PIF3 IF0_bit.no5
\r
855 #define PIF4 IF0_bit.no6
\r
856 #define PIF5 IF0_bit.no7
\r
857 #define STIF2 IF0H_bit.no0
\r
858 #define SRIF2 IF0H_bit.no1
\r
859 #define SREIF2 IF0H_bit.no2
\r
860 #define DMAIF0 IF0H_bit.no3
\r
861 #define DMAIF1 IF0H_bit.no4
\r
862 #define CSIIF00 IF0H_bit.no5
\r
863 #define IICIF00 IF0H_bit.no5
\r
864 #define STIF0 IF0H_bit.no5
\r
865 #define TMIF00 IF0H_bit.no6
\r
866 #define SRIF0 IF0H_bit.no7
\r
867 #define SREIF0 IF1_bit.no0
\r
868 #define TMIF01H IF1_bit.no0
\r
869 #define CSIIF10 IF1_bit.no1
\r
870 #define IICIF10 IF1_bit.no1
\r
871 #define STIF1 IF1_bit.no1
\r
872 #define SRIF1 IF1_bit.no2
\r
873 #define SREIF1 IF1_bit.no3
\r
874 #define TMIF03H IF1_bit.no3
\r
875 #define IICAIF0 IF1_bit.no4
\r
876 #define RTITIF IF1_bit.no5
\r
877 #define TMIF01 IF1_bit.no7
\r
878 #define TMIF02 IF1H_bit.no0
\r
879 #define TMIF03 IF1H_bit.no1
\r
880 #define ADIF IF1H_bit.no2
\r
881 #define RTCIF IF1H_bit.no3
\r
882 #define TMKAIF IF1H_bit.no4
\r
883 #define KRIF IF1H_bit.no5
\r
884 #define STIF3 IF1H_bit.no6
\r
885 #define SRIF3 IF1H_bit.no7
\r
886 #define WDTIMK MK0_bit.no0
\r
887 #define LVIMK MK0_bit.no1
\r
888 #define PMK0 MK0_bit.no2
\r
889 #define PMK1 MK0_bit.no3
\r
890 #define PMK2 MK0_bit.no4
\r
891 #define PMK3 MK0_bit.no5
\r
892 #define PMK4 MK0_bit.no6
\r
893 #define PMK5 MK0_bit.no7
\r
894 #define STMK2 MK0H_bit.no0
\r
895 #define SRMK2 MK0H_bit.no1
\r
896 #define SREMK2 MK0H_bit.no2
\r
897 #define DMAMK0 MK0H_bit.no3
\r
898 #define DMAMK1 MK0H_bit.no4
\r
899 #define CSIMK00 MK0H_bit.no5
\r
900 #define IICMK00 MK0H_bit.no5
\r
901 #define STMK0 MK0H_bit.no5
\r
902 #define TMMK00 MK0H_bit.no6
\r
903 #define SRMK0 MK0H_bit.no7
\r
904 #define SREMK0 MK1_bit.no0
\r
905 #define TMMK01H MK1_bit.no0
\r
906 #define CSIMK10 MK1_bit.no1
\r
907 #define IICMK10 MK1_bit.no1
\r
908 #define STMK1 MK1_bit.no1
\r
909 #define SRMK1 MK1_bit.no2
\r
910 #define SREMK1 MK1_bit.no3
\r
911 #define TMMK03H MK1_bit.no3
\r
912 #define IICAMK0 MK1_bit.no4
\r
913 #define RTITMK MK1_bit.no5
\r
914 #define TMMK01 MK1_bit.no7
\r
915 #define TMMK02 MK1H_bit.no0
\r
916 #define TMMK03 MK1H_bit.no1
\r
917 #define ADMK MK1H_bit.no2
\r
918 #define RTCMK MK1H_bit.no3
\r
919 #define TMKAMK MK1H_bit.no4
\r
920 #define KRMK MK1H_bit.no5
\r
921 #define STMK3 MK1H_bit.no6
\r
922 #define SRMK3 MK1H_bit.no7
\r
923 #define WDTIPR0 PR00_bit.no0
\r
924 #define LVIPR0 PR00_bit.no1
\r
925 #define PPR00 PR00_bit.no2
\r
926 #define PPR01 PR00_bit.no3
\r
927 #define PPR02 PR00_bit.no4
\r
928 #define PPR03 PR00_bit.no5
\r
929 #define PPR04 PR00_bit.no6
\r
930 #define PPR05 PR00_bit.no7
\r
931 #define STPR02 PR00H_bit.no0
\r
932 #define SRPR02 PR00H_bit.no1
\r
933 #define SREPR02 PR00H_bit.no2
\r
934 #define DMAPR00 PR00H_bit.no3
\r
935 #define DMAPR01 PR00H_bit.no4
\r
936 #define CSIPR000 PR00H_bit.no5
\r
937 #define IICPR000 PR00H_bit.no5
\r
938 #define STPR00 PR00H_bit.no5
\r
939 #define TMPR000 PR00H_bit.no6
\r
940 #define SRPR00 PR00H_bit.no7
\r
941 #define SREPR00 PR01_bit.no0
\r
942 #define TMPR001H PR01_bit.no0
\r
943 #define CSIPR010 PR01_bit.no1
\r
944 #define IICPR010 PR01_bit.no1
\r
945 #define STPR01 PR01_bit.no1
\r
946 #define SRPR01 PR01_bit.no2
\r
947 #define SREPR01 PR01_bit.no3
\r
948 #define TMPR003H PR01_bit.no3
\r
949 #define IICAPR00 PR01_bit.no4
\r
950 #define RTITPR0 PR01_bit.no5
\r
951 #define TMPR001 PR01_bit.no7
\r
952 #define TMPR002 PR01H_bit.no0
\r
953 #define TMPR003 PR01H_bit.no1
\r
954 #define ADPR0 PR01H_bit.no2
\r
955 #define RTCPR0 PR01H_bit.no3
\r
956 #define TMKAPR0 PR01H_bit.no4
\r
957 #define KRPR0 PR01H_bit.no5
\r
958 #define STPR03 PR01H_bit.no6
\r
959 #define SRPR03 PR01H_bit.no7
\r
960 #define WDTIPR1 PR10_bit.no0
\r
961 #define LVIPR1 PR10_bit.no1
\r
962 #define PPR10 PR10_bit.no2
\r
963 #define PPR11 PR10_bit.no3
\r
964 #define PPR12 PR10_bit.no4
\r
965 #define PPR13 PR10_bit.no5
\r
966 #define PPR14 PR10_bit.no6
\r
967 #define PPR15 PR10_bit.no7
\r
968 #define STPR12 PR10H_bit.no0
\r
969 #define SRPR12 PR10H_bit.no1
\r
970 #define SREPR12 PR10H_bit.no2
\r
971 #define DMAPR10 PR10H_bit.no3
\r
972 #define DMAPR11 PR10H_bit.no4
\r
973 #define CSIPR100 PR10H_bit.no5
\r
974 #define IICPR100 PR10H_bit.no5
\r
975 #define STPR10 PR10H_bit.no5
\r
976 #define TMPR100 PR10H_bit.no6
\r
977 #define SRPR10 PR10H_bit.no7
\r
978 #define SREPR10 PR11_bit.no0
\r
979 #define TMPR101H PR11_bit.no0
\r
980 #define CSIPR110 PR11_bit.no1
\r
981 #define IICPR110 PR11_bit.no1
\r
982 #define STPR11 PR11_bit.no1
\r
983 #define SRPR11 PR11_bit.no2
\r
984 #define SREPR11 PR11_bit.no3
\r
985 #define TMPR103H PR11_bit.no3
\r
986 #define IICAPR10 PR11_bit.no4
\r
987 #define RTITPR1 PR11_bit.no5
\r
988 #define TMPR101 PR11_bit.no7
\r
989 #define TMPR102 PR11H_bit.no0
\r
990 #define TMPR103 PR11H_bit.no1
\r
991 #define ADPR1 PR11H_bit.no2
\r
992 #define RTCPR1 PR11H_bit.no3
\r
993 #define TMKAPR1 PR11H_bit.no4
\r
994 #define KRPR1 PR11H_bit.no5
\r
995 #define STPR13 PR11H_bit.no6
\r
996 #define SRPR13 PR11H_bit.no7
\r
997 #define MAA PMC_bit.no0
\r
1000 Interrupt vector addresses
\r
1002 #define RST_vect (0x0)
\r
1003 #define INTDBG_vect (0x2)
\r
1004 #define INTWDTI_vect (0x4)
\r
1005 #define INTLVI_vect (0x6)
\r
1006 #define INTP0_vect (0x8)
\r
1007 #define INTP1_vect (0xA)
\r
1008 #define INTP2_vect (0xC)
\r
1009 #define INTP3_vect (0xE)
\r
1010 #define INTP4_vect (0x10)
\r
1011 #define INTP5_vect (0x12)
\r
1012 #define INTST2_vect (0x14)
\r
1013 #define INTSR2_vect (0x16)
\r
1014 #define INTSRE2_vect (0x18)
\r
1015 #define INTDMA0_vect (0x1A)
\r
1016 #define INTDMA1_vect (0x1C)
\r
1017 #define INTCSI00_vect (0x1E)
\r
1018 #define INTIIC00_vect (0x1E)
\r
1019 #define INTST0_vect (0x1E)
\r
1020 #define INTTM00_vect (0x20)
\r
1021 #define INTSR0_vect (0x22)
\r
1022 #define INTSRE0_vect (0x24)
\r
1023 #define INTTM01H_vect (0x24)
\r
1024 #define INTCSI10_vect (0x26)
\r
1025 #define INTIIC10_vect (0x26)
\r
1026 #define INTST1_vect (0x26)
\r
1027 #define INTSR1_vect (0x28)
\r
1028 #define INTSRE1_vect (0x2A)
\r
1029 #define INTTM03H_vect (0x2A)
\r
1030 #define INTIICA0_vect (0x2C)
\r
1031 #define INTRTIT_vect (0x2E)
\r
1032 #define INTTM01_vect (0x32)
\r
1033 #define INTTM02_vect (0x34)
\r
1034 #define INTTM03_vect (0x36)
\r
1035 #define INTAD_vect (0x38)
\r
1036 #define INTRTC_vect (0x3A)
\r
1037 #define INTIT_vect (0x3C)
\r
1038 #define INTKR_vect (0x3E)
\r
1039 #define INTST3_vect (0x40)
\r
1040 #define INTSR3_vect (0x42)
\r
1041 #define INTTKB20_vect (0x44)
\r
1042 #define INTTM04_vect (0x46)
\r
1043 #define INTTM05_vect (0x48)
\r
1044 #define INTP6_vect (0x4A)
\r
1045 #define INTP7_vect (0x4C)
\r
1046 #define INTLCD0_vect (0x4E)
\r
1047 #define INTCMP0_vect (0x50)
\r
1048 #define INTCMP1_vect (0x52)
\r
1049 #define INTTM06_vect (0x54)
\r
1050 #define INTTM07_vect (0x56)
\r
1051 #define INTSRE3_vect (0x5C)
\r
1052 #define INTMD_vect (0x5E)
\r
1053 #define INTFL_vect (0x62)
\r
1054 #define INTDMA2_vect (0x64)
\r
1055 #define INTDMA3_vect (0x66)
\r
1056 #define BRK_I_vect (0x7E)
\r